aic7xxx_inline.h revision 68623
150397Sobrien/* 2169689Skan * Inline routines shareable across OS platforms. 3132718Skan * 450397Sobrien * Copyright (c) 1994, 1995, 1996, 1997, 1998, 1999, 2000 Justin T. Gibbs. 5132718Skan * All rights reserved. 650397Sobrien * 7132718Skan * Redistribution and use in source and binary forms, with or without 850397Sobrien * modification, are permitted provided that the following conditions 950397Sobrien * are met: 1050397Sobrien * 1. Redistributions of source code must retain the above copyright 1150397Sobrien * notice, this list of conditions, and the following disclaimer, 12132718Skan * without modification. 1350397Sobrien * 2. The name of the author may not be used to endorse or promote products 1450397Sobrien * derived from this software without specific prior written permission. 1550397Sobrien * 1650397Sobrien * Alternatively, this software may be distributed under the terms of the 1750397Sobrien * GNU Public License ("GPL"). 18132718Skan * 19169689Skan * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20169689Skan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2150397Sobrien * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2250397Sobrien * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 2350397Sobrien * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24132718Skan * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25132718Skan * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2690075Sobrien * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2750397Sobrien * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2850397Sobrien * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2950397Sobrien * SUCH DAMAGE. 3050397Sobrien * 3150397Sobrien * $Id: //depot/src/aic7xxx/aic7xxx_inline.h#10 $ 3250397Sobrien * 3350397Sobrien * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx_inline.h 68623 2000-11-12 05:19:46Z gibbs $ 3450397Sobrien */ 3550397Sobrien 3650397Sobrien#ifndef _AIC7XXX_INLINE_H_ 3750397Sobrien#define _AIC7XXX_INLINE_H_ 3896263Sobrien 39169689Skan/************************* Sequencer Execution Control ************************/ 4096263Sobrienstatic __inline int sequencer_paused(struct ahc_softc *ahc); 4152284Sobrienstatic __inline void ahc_pause_bug_fix(struct ahc_softc *ahc); 4252284Sobrienstatic __inline void pause_sequencer(struct ahc_softc *ahc); 4352284Sobrienstatic __inline void unpause_sequencer(struct ahc_softc *ahc); 4450397Sobrien 4596263Sobrien/* 46169689Skan * Work around any chip bugs related to halting sequencer execution. 4796263Sobrien * On Ultra2 controllers, we must clear the CIOBUS stretch signal by 4850397Sobrien * reading a register that will set this signal and deassert it. 4950397Sobrien * Without this workaround, if the chip is paused, by an interrupt or 50132718Skan * manual pause while accessing scb ram, accesses to certain registers 51132718Skan * will hang the system (infinite pci retries). 5250397Sobrien */ 5350397Sobrienstatic __inline void 5450397Sobrienahc_pause_bug_fix(struct ahc_softc *ahc) 55117395Skan{ 5696263Sobrien if ((ahc->features & AHC_ULTRA2) != 0) 5796263Sobrien (void)ahc_inb(ahc, CCSCBCTL); 58117395Skan} 5950397Sobrien 6050397Sobrien/* 61132718Skan * Determine whether the sequencer has halted code execution. 62132718Skan * Returns non-zero status if the sequencer is stopped. 63132718Skan */ 64132718Skanstatic __inline int 65132718Skansequencer_paused(struct ahc_softc *ahc) 6650397Sobrien{ 6750397Sobrien return ((ahc_inb(ahc, HCNTRL) & PAUSE) != 0); 6850397Sobrien} 6950397Sobrien 70132718Skan/* 7150397Sobrien * Request that the sequencer stop and wait, indefinitely, for it 7250397Sobrien * to stop. The sequencer will only acknowledge that it is paused 7350397Sobrien * once it has reached an instruction boundary and PAUSEDIS is 7490075Sobrien * cleared in the SEQCTL register. The sequencer may use PAUSEDIS 7550397Sobrien * for critical sections. 7650397Sobrien */ 7790075Sobrienstatic __inline void 7850397Sobrienpause_sequencer(struct ahc_softc *ahc) 79117395Skan{ 8050397Sobrien ahc_outb(ahc, HCNTRL, ahc->pause); 8150397Sobrien 8250397Sobrien /* 8350397Sobrien * Since the sequencer can disable pausing in a critical section, we 8450397Sobrien * must loop until it actually stops. 8590075Sobrien */ 8650397Sobrien while (sequencer_paused(ahc) == 0) 8750397Sobrien ; 8890075Sobrien 8950397Sobrien ahc_pause_bug_fix(ahc); 9050397Sobrien} 9150397Sobrien 9250397Sobrien/* 9350397Sobrien * Allow the sequencer to continue program execution. 9452284Sobrien * We check here to ensure that no additional interrupt 9552284Sobrien * sources that would cause the sequencer to halt have been 9650397Sobrien * asserted. If, for example, a SCSI bus reset is detected 9790075Sobrien * while we are fielding a different, pausing, interrupt type, 9890075Sobrien * we don't want to release the sequencer before going back 9990075Sobrien * into our interrupt handler and dealing with this new 10050397Sobrien * condition. 10150397Sobrien */ 10250397Sobrienstatic __inline void 10350397Sobrienunpause_sequencer(struct ahc_softc *ahc) 10490075Sobrien{ 10550397Sobrien if ((ahc_inb(ahc, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) == 0) 10650397Sobrien ahc_outb(ahc, HCNTRL, ahc->unpause); 10750397Sobrien} 10850397Sobrien 10950397Sobrien/*********************** Untagged Transaction Routines ************************/ 11050397Sobrienu_int ahc_index_busy_tcl(struct ahc_softc *ahc, 11150397Sobrien u_int tcl, int unbusy); 11250397Sobrienstatic __inline void ahc_freeze_untagged_queues(struct ahc_softc *ahc); 11350397Sobrienstatic __inline void ahc_release_untagged_queues(struct ahc_softc *ahc); 11450397Sobrien 11550397Sobrien/* 116169689Skan * Block our completion routine from starting the next untagged 11750397Sobrien * transaction for this target or target lun. 11850397Sobrien */ 11950397Sobrienstatic __inline void 12050397Sobrienahc_freeze_untagged_queues(struct ahc_softc *ahc) 12150397Sobrien{ 12250397Sobrien if ((ahc->features & AHC_SCB_BTT) == 0) 12350397Sobrien ahc->untagged_queue_lock++; 12450397Sobrien} 12550397Sobrien 12650397Sobrien/* 12750397Sobrien * Allow the next untagged transaction for this target or target lun 12850397Sobrien * to be executed. We use a counting semaphore to allow the lock 12950397Sobrien * to be acquired recursively. Once the count drops to zero, the 13050397Sobrien * transaction queues will be run. 13150397Sobrien */ 13250397Sobrienstatic __inline void 13350397Sobrienahc_release_untagged_queues(struct ahc_softc *ahc) 134132718Skan{ 135132718Skan if ((ahc->features & AHC_SCB_BTT) == 0) { 13650397Sobrien ahc->untagged_queue_lock--; 137132718Skan if (ahc->untagged_queue_lock == 0) 13850397Sobrien ahc_run_untagged_queues(ahc); 139169689Skan } 14050397Sobrien} 14150397Sobrien 14250397Sobrien/************************** Memory mapping routines ***************************/ 14350397Sobrienstatic __inline struct ahc_dma_seg * 14450397Sobrien ahc_sg_bus_to_virt(struct scb *scb, 14550397Sobrien uint32_t sg_busaddr); 14696263Sobrienstatic __inline uint32_t 14796263Sobrien ahc_sg_virt_to_bus(struct scb *scb, 14850397Sobrien struct ahc_dma_seg *sg); 149132718Skanstatic __inline uint32_t 150132718Skan ahc_hscb_busaddr(struct ahc_softc *ahc, u_int index); 15150397Sobrien 152169689Skanstatic __inline struct ahc_dma_seg * 153169689Skanahc_sg_bus_to_virt(struct scb *scb, uint32_t sg_busaddr) 154169689Skan{ 155169689Skan int sg_index; 156169689Skan 157169689Skan sg_index = (sg_busaddr - scb->sg_list_phys)/sizeof(struct ahc_dma_seg); 158169689Skan /* sg_list_phys points to entry 1, not 0 */ 159169689Skan sg_index++; 160169689Skan 161169689Skan return (&scb->sg_list[sg_index]); 162169689Skan} 163169689Skan 164169689Skanstatic __inline uint32_t 165132718Skanahc_sg_virt_to_bus(struct scb *scb, struct ahc_dma_seg *sg) 16650397Sobrien{ 167169689Skan int sg_index; 168169689Skan 169169689Skan /* sg_list_phys points to entry 1, not 0 */ 170169689Skan sg_index = sg - &scb->sg_list[1]; 171169689Skan 172169689Skan return (scb->sg_list_phys + (sg_index * sizeof(*scb->sg_list))); 173169689Skan} 174169689Skan 175169689Skanstatic __inline uint32_t 176169689Skanahc_hscb_busaddr(struct ahc_softc *ahc, u_int index) 177146895Skan{ 178146895Skan return (ahc->scb_data->hscb_busaddr 179146895Skan + (sizeof(struct hardware_scb) * index)); 18050397Sobrien} 181132718Skan 18250397Sobrien/******************************** Debugging ***********************************/ 18350397Sobrienstatic __inline char *ahc_name(struct ahc_softc *ahc); 184132718Skan 185132718Skanstatic __inline char * 186132718Skanahc_name(struct ahc_softc *ahc) 187132718Skan{ 18850397Sobrien return (ahc->name); 18950397Sobrien} 19050397Sobrien 191132718Skan/*********************** Miscelaneous Support Functions ***********************/ 19250397Sobrien 193169689Skanstatic __inline int ahc_check_residual(struct scb *scb); 19490075Sobrienstatic __inline struct ahc_initiator_tinfo * 19590075Sobrien ahc_fetch_transinfo(struct ahc_softc *ahc, 196117395Skan char channel, u_int our_id, 197117395Skan u_int remote_id, 19850397Sobrien struct tmode_tstate **tstate); 19950397Sobrienstatic __inline struct scb* 20050397Sobrien ahc_get_scb(struct ahc_softc *ahc); 20150397Sobrienstatic __inline void ahc_free_scb(struct ahc_softc *ahc, struct scb *scb); 20250397Sobrienstatic __inline void ahc_swap_with_next_hscb(struct ahc_softc *ahc, 20350397Sobrien struct scb *scb); 204169689Skanstatic __inline void ahc_queue_scb(struct ahc_softc *ahc, struct scb *scb); 20550397Sobrien 20650397Sobrien/* 20750397Sobrien * Determine whether the sequencer reported a residual 20850397Sobrien * for this SCB/transaction. 20950397Sobrien */ 21050397Sobrienstatic __inline int 21150397Sobrienahc_check_residual(struct scb *scb) 212132718Skan{ 21350397Sobrien struct status_pkt *sp; 21450397Sobrien 21550397Sobrien sp = &scb->hscb->shared_data.status; 216169689Skan if ((scb->hscb->sgptr & SG_RESID_VALID) != 0) 217132718Skan return (1); 218132718Skan return (0); 21950397Sobrien} 22050397Sobrien 22150397Sobrien/* 22250397Sobrien * Return pointers to the transfer negotiation information 22350397Sobrien * for the specified our_id/remote_id pair. 224169689Skan */ 225132718Skanstatic __inline struct ahc_initiator_tinfo * 226132718Skanahc_fetch_transinfo(struct ahc_softc *ahc, char channel, u_int our_id, 227132718Skan u_int remote_id, struct tmode_tstate **tstate) 228132718Skan{ 229132718Skan /* 230132718Skan * Transfer data structures are stored from the perspective 231132718Skan * of the target role. Since the parameters for a connection 232132718Skan * in the initiator role to a given target are the same as 233132718Skan * when the roles are reversed, we pretend we are the target. 23450397Sobrien */ 23550397Sobrien if (channel == 'B') 23650397Sobrien our_id += 8; 23750397Sobrien *tstate = ahc->enabled_targets[our_id]; 238169689Skan return (&(*tstate)->transinfo[remote_id]); 23950397Sobrien} 24050397Sobrien 241132718Skan/* 24250397Sobrien * Get a free scb. If there are none, see if we can allocate a new SCB. 24350397Sobrien */ 24450397Sobrienstatic __inline struct scb * 24550397Sobrienahc_get_scb(struct ahc_softc *ahc) 24650397Sobrien{ 24790075Sobrien struct scb *scb; 24890075Sobrien 24990075Sobrien if ((scb = SLIST_FIRST(&ahc->scb_data->free_scbs)) == NULL) { 25090075Sobrien ahc_alloc_scbs(ahc); 25190075Sobrien scb = SLIST_FIRST(&ahc->scb_data->free_scbs); 25250397Sobrien if (scb == NULL) 25390075Sobrien return (NULL); 254132718Skan } 255169689Skan SLIST_REMOVE_HEAD(&ahc->scb_data->free_scbs, links.sle); 25690075Sobrien return (scb); 25790075Sobrien} 25890075Sobrien 259169689Skan/* 26090075Sobrien * Return an SCB resource to the free list. 26190075Sobrien */ 26290075Sobrienstatic __inline void 26350397Sobrienahc_free_scb(struct ahc_softc *ahc, struct scb *scb) 26490075Sobrien{ 26550397Sobrien struct hardware_scb *hscb; 26650397Sobrien 26750397Sobrien hscb = scb->hscb; 26850397Sobrien /* Clean up for the next user */ 26950397Sobrien ahc->scb_data->scbindex[hscb->tag] = NULL; 270132718Skan scb->flags = SCB_FREE; 27150397Sobrien hscb->control = 0; 27250397Sobrien 27350397Sobrien SLIST_INSERT_HEAD(&ahc->scb_data->free_scbs, scb, links.sle); 27450397Sobrien 27550397Sobrien /* Notify the OSM that a resource is now available. */ 276132718Skan ahc_platform_scb_free(ahc, scb); 27750397Sobrien} 27850397Sobrien 27950397Sobrienstatic __inline struct scb * 28050397Sobrienahc_lookup_scb(struct ahc_softc *ahc, u_int tag) 28150397Sobrien{ 282132718Skan return (ahc->scb_data->scbindex[tag]); 28350397Sobrien 28450397Sobrien} 28550397Sobrien 28650397Sobrienstatic __inline void 287132718Skanahc_swap_with_next_hscb(struct ahc_softc *ahc, struct scb *scb) 288132718Skan{ 289132718Skan struct hardware_scb *q_hscb; 290132718Skan u_int saved_tag; 291132718Skan 292132718Skan /* 293132718Skan * Our queuing method is a bit tricky. The card 294132718Skan * knows in advance which HSCB to download, and we 295132718Skan * can't disappoint it. To achieve this, the next 296132718Skan * SCB to download is saved off in ahc->next_queued_scb. 297132718Skan * When we are called to queue "an arbitrary scb", 298132718Skan * we copy the contents of the incoming HSCB to the one 299169689Skan * the sequencer knows about, swap HSCB pointers and 300132718Skan * finally assign the SCB to the tag indexed location 30150397Sobrien * in the scb_array. This makes sure that we can still 30250397Sobrien * locate the correct SCB by SCB_TAG. 30350397Sobrien */ 30450397Sobrien q_hscb = ahc->next_queued_scb->hscb; 30590075Sobrien saved_tag = q_hscb->tag; 30690075Sobrien memcpy(q_hscb, scb->hscb, sizeof(*scb->hscb)); 30790075Sobrien if ((scb->flags & SCB_CDB32_PTR) != 0) { 30890075Sobrien q_hscb->shared_data.cdb_ptr = 30950397Sobrien ahc_hscb_busaddr(ahc, q_hscb->tag) 310132718Skan + offsetof(struct hardware_scb, cdb32); 31150397Sobrien } 312169689Skan q_hscb->tag = saved_tag; 313169689Skan q_hscb->next = scb->hscb->tag; 314169689Skan 315169689Skan /* Now swap HSCB pointers. */ 31650397Sobrien ahc->next_queued_scb->hscb = scb->hscb; 31750397Sobrien scb->hscb = q_hscb; 31850397Sobrien 319132718Skan /* Now define the mapping from tag to SCB in the scbindex */ 32050397Sobrien ahc->scb_data->scbindex[scb->hscb->tag] = scb; 321169689Skan} 322169689Skan 323169689Skan/* 324169689Skan * Tell the sequencer about a new transaction to execute. 32550397Sobrien */ 32650397Sobrienstatic __inline void 32750397Sobrienahc_queue_scb(struct ahc_softc *ahc, struct scb *scb) 32890075Sobrien{ 32990075Sobrien ahc_swap_with_next_hscb(ahc, scb); 33050397Sobrien 33150397Sobrien if (scb->hscb->tag == SCB_LIST_NULL 33250397Sobrien || scb->hscb->next == SCB_LIST_NULL) 33350397Sobrien panic("Attempt to queue invalid SCB tag %x:%x\n", 33450397Sobrien scb->hscb->tag, scb->hscb->next); 33550397Sobrien 33650397Sobrien /* 33750397Sobrien * Keep a history of SCBs we've downloaded in the qinfifo. 338117395Skan */ 339132718Skan ahc->qinfifo[ahc->qinfifonext++] = scb->hscb->tag; 34050397Sobrien if ((ahc->features & AHC_QUEUE_REGS) != 0) { 34150397Sobrien ahc_outb(ahc, HNSCB_QOFF, ahc->qinfifonext); 34250397Sobrien } else { 34350397Sobrien if ((ahc->features & AHC_AUTOPAUSE) == 0) 344117395Skan pause_sequencer(ahc); 345117395Skan ahc_outb(ahc, KERNEL_QINPOS, ahc->qinfifonext); 346 if ((ahc->features & AHC_AUTOPAUSE) == 0) 347 unpause_sequencer(ahc); 348 } 349} 350 351/************************** Interrupt Processing ******************************/ 352static __inline void ahc_intr(struct ahc_softc *ahc); 353 354/* 355 * Catch an interrupt from the adapter 356 */ 357static __inline void 358ahc_intr(struct ahc_softc *ahc) 359{ 360 u_int intstat; 361 362 intstat = ahc_inb(ahc, INTSTAT); 363 364 /* 365 * Any interrupts to process? 366 */ 367#if AHC_PCI_CONFIG > 0 368 if ((intstat & INT_PEND) == 0) { 369 if ((ahc->chip & AHC_PCI) != 0 370 && (ahc->unsolicited_ints > 500)) { 371 if ((ahc_inb(ahc, ERROR) & PCIERRSTAT) != 0) 372 ahc_pci_intr(ahc); 373 ahc->unsolicited_ints = 0; 374 } else { 375 ahc->unsolicited_ints++; 376 } 377 return; 378 } else { 379 ahc->unsolicited_ints = 0; 380 } 381#else 382 if ((intstat & INT_PEND) == 0) 383 return; 384#endif 385 386 if (intstat & CMDCMPLT) { 387 ahc_outb(ahc, CLRINT, CLRCMDINT); 388 /* 389 * Ensure that the chip sees that we've cleared 390 * this interrupt before we walk the output fifo. 391 * Otherwise, we may, due to posted bus writes, 392 * clear the interrupt after we finish the scan, 393 * and after the sequencer has added new entries 394 * and asserted the interrupt again. 395 */ 396 ahc_flush_device_writes(ahc); 397 ahc_run_qoutfifo(ahc); 398#ifdef AHC_TARGET_MODE 399 if ((ahc->flags & AHC_TARGETROLE) != 0) 400 ahc_run_tqinfifo(ahc, /*paused*/FALSE); 401#endif 402 } 403 if (intstat & BRKADRINT) { 404 ahc_handle_brkadrint(ahc); 405 /* Fatal error, no more interrupts to handle. */ 406 return; 407 } 408 409 if ((intstat & (SEQINT|SCSIINT)) != 0) 410 ahc_pause_bug_fix(ahc); 411 412 if ((intstat & SEQINT) != 0) 413 ahc_handle_seqint(ahc, intstat); 414 415 if ((intstat & SCSIINT) != 0) 416 ahc_handle_scsiint(ahc, intstat); 417} 418 419#endif /* _AIC7XXX_INLINE_H_ */ 420