aic7xxx_93cx6.c revision 65942
173006Sjulian/* 273006Sjulian * Interface for the 93C66/56/46/26/06 serial eeprom parts. 373006Sjulian * 473006Sjulian * Copyright (c) 1995, 1996 Daniel M. Eischen 573006Sjulian * All rights reserved. 673006Sjulian * 773006Sjulian * Redistribution and use in source and binary forms, with or without 873006Sjulian * modification, are permitted provided that the following conditions 973006Sjulian * are met: 1073006Sjulian * 1. Redistributions of source code must retain the above copyright 1173006Sjulian * notice, this list of conditions, and the following disclaimer, 1273006Sjulian * without modification. 1373006Sjulian * 2. The name of the author may not be used to endorse or promote products 1473006Sjulian * derived from this software without specific prior written permission. 1573006Sjulian * 1673006Sjulian * Alternatively, this software may be distributed under the terms of the 1773006Sjulian * GNU Public License ("GPL"). 1873006Sjulian * 1973006Sjulian * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 2073006Sjulian * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2173006Sjulian * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2273006Sjulian * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 2373006Sjulian * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2473006Sjulian * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2573006Sjulian * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2673006Sjulian * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2773006Sjulian * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2873006Sjulian * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2973006Sjulian * SUCH DAMAGE. 3073006Sjulian * 3173006Sjulian * $Id$ 3273006Sjulian * 3373006Sjulian * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx_93cx6.c 65942 2000-09-16 20:02:28Z gibbs $ 3473006Sjulian */ 3573006Sjulian 3673006Sjulian/* 3773006Sjulian * The instruction set of the 93C66/56/46/26/06 chips are as follows: 3873006Sjulian * 3973006Sjulian * Start OP * 4073006Sjulian * Function Bit Code Address** Data Description 41181803Sbz * ------------------------------------------------------------------- 4273006Sjulian * READ 1 10 A5 - A0 Reads data stored in memory, 4373006Sjulian * starting at specified address 4473006Sjulian * EWEN 1 00 11XXXX Write enable must preceed 4573006Sjulian * all programming modes 46185571Sbz * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0 47195837Srwatson * WRITE 1 01 A5 - A0 D15 - D0 Writes register 4873006Sjulian * ERAL 1 00 10XXXX Erase all registers 4973006Sjulian * WRAL 1 00 01XXXX D15 - D0 Writes to all registers 5073006Sjulian * EWDS 1 00 00XXXX Disables all programming 5173006Sjulian * instructions 5273006Sjulian * *Note: A value of X for address is a don't care condition. 5373006Sjulian * **Note: There are 8 address bits for the 93C56/66 chips unlike 5473006Sjulian * the 93C46/26/06 chips which have 6 address bits. 5573006Sjulian * 5673006Sjulian * The 93C46 has a four wire interface: clock, chip select, data in, and 5773006Sjulian * data out. In order to perform one of the above functions, you need 5873035Sjulian * to enable the chip select for a clock period (typically a minimum of 5973035Sjulian * 1 usec, with the clock high and low a minimum of 750 and 250 nsec 6073035Sjulian * respectively). While the chip select remains high, you can clock in 61141193Sru * the instructions (above) starting with the start bit, followed by the 62141193Sru * OP code, Address, and Data (if needed). For the READ instruction, the 63141193Sru * requested 16-bit register contents is read from the data out line but 64141193Sru * is preceded by an initial zero (leading 0, followed by 16-bits, MSB 65141193Sru * first). The clock cycling from low to high initiates the next data 66141193Sru * bit to be sent from the chip. 67141193Sru * 6873035Sjulian */ 6973035Sjulian 70123601Sru#ifdef __linux__ 7173035Sjulian#include "aic7xxx_linux.h" 7273035Sjulian#include "aic7xxx_inline.h" 7373035Sjulian#include "aic7xxx_93cx6.h" 7473035Sjulian#endif 7573035Sjulian 7673006Sjulian#ifdef __FreeBSD__ 7773006Sjulian#include <dev/aic7xxx/aic7xxx_freebsd.h> 78147256Sbrooks#include <dev/aic7xxx/aic7xxx_inline.h> 79141140Sru#include <dev/aic7xxx/aic7xxx_93cx6.h> 80141140Sru#endif 81141140Sru 8273006Sjulian/* 8373006Sjulian * Right now, we only have to read the SEEPROM. But we make it easier to 8473006Sjulian * add other 93Cx6 functions. 8573006Sjulian */ 86141140Srustatic struct seeprom_cmd { 87141140Sru uint8_t len; 88141140Sru uint8_t bits[3]; 8973006Sjulian} seeprom_read = {3, {1, 1, 0}}; 90141140Sru 9173006Sjulian/* 9273006Sjulian * Wait for the SEERDY to go high; about 800 ns. 9373006Sjulian */ 94141341Sru#define CLOCK_PULSE(sd, rdy) \ 95141140Sru while ((SEEPROM_STATUS_INB(sd) & rdy) == 0) { \ 96141140Sru ; /* Do nothing */ \ 97141140Sru } \ 98141140Sru (void)SEEPROM_INB(sd); /* Clear clock */ 99141140Sru 100141140Sru/* 10173006Sjulian * Read the serial EEPROM and returns 1 if successful and 0 if 10273006Sjulian * not successful. 10373006Sjulian */ 104129823Sjulianint 105129823Sjulianread_seeprom(sd, buf, start_addr, count) 106141341Sru struct seeprom_descriptor *sd; 107129823Sjulian uint16_t *buf; 108129823Sjulian u_int start_addr; 109129823Sjulian u_int count; 110129823Sjulian{ 111129823Sjulian int i = 0; 112129823Sjulian u_int k = 0; 113129823Sjulian uint16_t v; 11473006Sjulian uint8_t temp; 11573006Sjulian 11673006Sjulian /* 117195699Srwatson * Read the requested registers of the seeprom. The loop 118195727Srwatson * will range from 0 to count-1. 11973006Sjulian */ 12073006Sjulian for (k = start_addr; k < count + start_addr; k++) { 12173006Sjulian /* Send chip select for one clock cycle. */ 12273006Sjulian temp = sd->sd_MS ^ sd->sd_CS; 12373006Sjulian SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 12473006Sjulian CLOCK_PULSE(sd, sd->sd_RDY); 12573006Sjulian 12673006Sjulian /* 12773006Sjulian * Now we're ready to send the read command followed by the 12873006Sjulian * address of the 16-bit register we want to read. 12973006Sjulian */ 130141140Sru for (i = 0; i < seeprom_read.len; i++) { 131141140Sru if (seeprom_read.bits[i] != 0) 13273006Sjulian temp ^= sd->sd_DO; 13373006Sjulian SEEPROM_OUTB(sd, temp); 13473006Sjulian CLOCK_PULSE(sd, sd->sd_RDY); 13573006Sjulian SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 13673006Sjulian CLOCK_PULSE(sd, sd->sd_RDY); 137141140Sru if (seeprom_read.bits[i] != 0) 138141140Sru temp ^= sd->sd_DO; 13973006Sjulian } 14073006Sjulian /* Send the 6 or 8 bit address (MSB first, LSB last). */ 14173006Sjulian for (i = (sd->sd_chip - 1); i >= 0; i--) { 14273006Sjulian if ((k & (1 << i)) != 0) 14373006Sjulian temp ^= sd->sd_DO; 14473006Sjulian SEEPROM_OUTB(sd, temp); 14573006Sjulian CLOCK_PULSE(sd, sd->sd_RDY); 14673006Sjulian SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 14773006Sjulian CLOCK_PULSE(sd, sd->sd_RDY); 14873006Sjulian if ((k & (1 << i)) != 0) 149141140Sru temp ^= sd->sd_DO; 150141140Sru } 15173006Sjulian 152162323Sru /* 153148887Srwatson * Now read the 16 bit register. An initial 0 precedes the 154148887Srwatson * register contents which begins with bit 15 (MSB) and ends 155148887Srwatson * with bit 0 (LSB). The initial 0 will be shifted off the 15673006Sjulian * top of our word as we let the loop run from 0 to 16. 15773006Sjulian */ 158148887Srwatson v = 0; 159148887Srwatson for (i = 16; i >= 0; i--) { 160148887Srwatson SEEPROM_OUTB(sd, temp); 16173006Sjulian CLOCK_PULSE(sd, sd->sd_RDY); 16273006Sjulian v <<= 1; 16373006Sjulian if (SEEPROM_DATA_INB(sd) & sd->sd_DI) 16473006Sjulian v |= 1; 16573006Sjulian SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 166141140Sru CLOCK_PULSE(sd, sd->sd_RDY); 167141140Sru } 16873006Sjulian 16973006Sjulian buf[k - start_addr] = v; 17073006Sjulian 17173006Sjulian /* Reset the chip select for the next command cycle. */ 17273006Sjulian temp = sd->sd_MS; 17373006Sjulian SEEPROM_OUTB(sd, temp); 17473006Sjulian CLOCK_PULSE(sd, sd->sd_RDY); 17573006Sjulian SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 17673006Sjulian CLOCK_PULSE(sd, sd->sd_RDY); 17773006Sjulian SEEPROM_OUTB(sd, temp); 17873006Sjulian CLOCK_PULSE(sd, sd->sd_RDY); 17973006Sjulian } 18073006Sjulian#ifdef AHC_DUMP_EEPROM 18173006Sjulian printf("\nSerial EEPROM:\n\t"); 18273006Sjulian for (k = 0; k < count; k = k + 1) { 18373006Sjulian if (((k % 8) == 0) && (k != 0)) { 18473006Sjulian printf ("\n\t"); 18573006Sjulian } 186141140Sru printf (" 0x%x", buf[k]); 18773006Sjulian } 18873006Sjulian printf ("\n"); 18973006Sjulian#endif 19073006Sjulian return (1); 19173006Sjulian} 19273006Sjulian 193141140Sruint 194147256Sbrooksverify_cksum(struct seeprom_config *sc) 195141140Sru{ 19673006Sjulian int i; 19773006Sjulian int maxaddr; 19873006Sjulian uint32_t checksum; 199148887Srwatson uint16_t *scarray; 200148887Srwatson 20173006Sjulian maxaddr = (sizeof(*sc)/2) - 1; 20273006Sjulian checksum = 0; 20373006Sjulian scarray = (uint16_t *)sc; 20473006Sjulian 20573006Sjulian for (i = 0; i < maxaddr; i++) 206141142Sru checksum = checksum + scarray[i]; 207141142Sru if (checksum == 0 20873035Sjulian || (checksum & 0xFFFF) != sc->checksum) { 20973006Sjulian return (0); 21073006Sjulian } else { 21173035Sjulian return(1); 21273006Sjulian } 21373035Sjulian} 214141140Sru