aic7xxx_93cx6.c revision 47507
1184610Salfred/*
2184610Salfred * Interface for the 93C66/56/46/26/06 serial eeprom parts.
3184610Salfred *
4184610Salfred * Copyright (c) 1995, 1996 Daniel M. Eischen
5184610Salfred * All rights reserved.
6184610Salfred *
7184610Salfred * Redistribution and use in source and binary forms, with or without
8184610Salfred * modification, are permitted provided that the following conditions
9184610Salfred * are met:
10184610Salfred * 1. Redistributions of source code must retain the above copyright
11184610Salfred *    notice immediately at the beginning of the file, without modification,
12184610Salfred *    this list of conditions, and the following disclaimer.
13184610Salfred * 2. Redistributions in binary form must reproduce the above copyright
14184610Salfred *    notice, this list of conditions and the following disclaimer in the
15184610Salfred *    documentation and/or other materials provided with the distribution.
16184610Salfred * 3. Absolutely no warranty of function or purpose is made by the author
17184610Salfred *    Daniel M. Eischen.
18184610Salfred * 4. Modifications may be freely made to this file if the above conditions
19184610Salfred *    are met.
20184610Salfred *
21184610Salfred *      $Id: 93cx6.c,v 1.2 1999/04/07 23:02:45 gibbs Exp $
22184610Salfred */
23184610Salfred
24184610Salfred/*
25184610Salfred *   The instruction set of the 93C66/56/46/26/06 chips are as follows:
26184610Salfred *
27184610Salfred *               Start  OP	    *
28184610Salfred *     Function   Bit  Code  Address**  Data     Description
29184610Salfred *     -------------------------------------------------------------------
30184610Salfred *     READ        1    10   A5 - A0             Reads data stored in memory,
31184610Salfred *                                               starting at specified address
32184610Salfred *     EWEN        1    00   11XXXX              Write enable must preceed
33184610Salfred *                                               all programming modes
34184610Salfred *     ERASE       1    11   A5 - A0             Erase register A5A4A3A2A1A0
35184610Salfred *     WRITE       1    01   A5 - A0   D15 - D0  Writes register
36184610Salfred *     ERAL        1    00   10XXXX              Erase all registers
37184610Salfred *     WRAL        1    00   01XXXX    D15 - D0  Writes to all registers
38184610Salfred *     EWDS        1    00   00XXXX              Disables all programming
39184610Salfred *                                               instructions
40184610Salfred *     *Note: A value of X for address is a don't care condition.
41187183Sthompsa *    **Note: There are 8 address bits for the 93C56/66 chips unlike
42187183Sthompsa *	      the 93C46/26/06 chips which have 6 address bits.
43187183Sthompsa *
44184610Salfred *   The 93C46 has a four wire interface: clock, chip select, data in, and
45184610Salfred *   data out.  In order to perform one of the above functions, you need
46184610Salfred *   to enable the chip select for a clock period (typically a minimum of
47184610Salfred *   1 usec, with the clock high and low a minimum of 750 and 250 nsec
48184610Salfred *   respectively).  While the chip select remains high, you can clock in
49184610Salfred *   the instructions (above) starting with the start bit, followed by the
50184610Salfred *   OP code, Address, and Data (if needed).  For the READ instruction, the
51184610Salfred *   requested 16-bit register contents is read from the data out line but
52184610Salfred *   is preceded by an initial zero (leading 0, followed by 16-bits, MSB
53184610Salfred *   first).  The clock cycling from low to high initiates the next data
54184610Salfred *   bit to be sent from the chip.
55184610Salfred *
56184610Salfred */
57184610Salfred
58184610Salfred#include "opt_aic7xxx.h"
59184610Salfred
60184610Salfred#include <sys/param.h>
61184610Salfred#include <sys/systm.h>
62184610Salfred#include <machine/bus_memio.h>
63184610Salfred#include <machine/bus_pio.h>
64184610Salfred#include <machine/bus.h>
65184610Salfred#include <dev/aic7xxx/93cx6.h>
66184610Salfred
67184610Salfred/*
68184610Salfred * Right now, we only have to read the SEEPROM.  But we make it easier to
69184610Salfred * add other 93Cx6 functions.
70184610Salfred */
71184610Salfredstatic struct seeprom_cmd {
72184610Salfred  	unsigned char len;
73184610Salfred 	unsigned char bits[3];
74184610Salfred} seeprom_read = {3, {1, 1, 0}};
75184610Salfred
76184610Salfred/*
77184610Salfred * Wait for the SEERDY to go high; about 800 ns.
78184610Salfred */
79184610Salfred#define CLOCK_PULSE(sd, rdy)				\
80184610Salfred	while ((SEEPROM_STATUS_INB(sd) & rdy) == 0) {	\
81184610Salfred		;  /* Do nothing */			\
82184610Salfred	}						\
83184610Salfred	(void)SEEPROM_INB(sd);	/* Clear clock */
84184610Salfred
85184610Salfred/*
86184610Salfred * Read the serial EEPROM and returns 1 if successful and 0 if
87184610Salfred * not successful.
88184610Salfred */
89184610Salfredint
90184610Salfredread_seeprom(sd, buf, start_addr, count)
91184610Salfred	struct seeprom_descriptor *sd;
92184610Salfred	u_int16_t *buf;
93184610Salfred	bus_size_t start_addr;
94184610Salfred	bus_size_t count;
95184610Salfred{
96184610Salfred	int i = 0;
97184610Salfred	u_int k = 0;
98184610Salfred	u_int16_t v;
99185948Sthompsa	u_int8_t temp;
100185948Sthompsa
101184610Salfred	/*
102184610Salfred	 * Read the requested registers of the seeprom.  The loop
103	 * will range from 0 to count-1.
104	 */
105	for (k = start_addr; k < count + start_addr; k++) {
106		/* Send chip select for one clock cycle. */
107		temp = sd->sd_MS ^ sd->sd_CS;
108		SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
109		CLOCK_PULSE(sd, sd->sd_RDY);
110
111		/*
112		 * Now we're ready to send the read command followed by the
113		 * address of the 16-bit register we want to read.
114		 */
115		for (i = 0; i < seeprom_read.len; i++) {
116			if (seeprom_read.bits[i] != 0)
117				temp ^= sd->sd_DO;
118			SEEPROM_OUTB(sd, temp);
119			CLOCK_PULSE(sd, sd->sd_RDY);
120			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
121			CLOCK_PULSE(sd, sd->sd_RDY);
122			if (seeprom_read.bits[i] != 0)
123				temp ^= sd->sd_DO;
124		}
125		/* Send the 6 or 8 bit address (MSB first, LSB last). */
126		for (i = (sd->sd_chip - 1); i >= 0; i--) {
127			if ((k & (1 << i)) != 0)
128				temp ^= sd->sd_DO;
129			SEEPROM_OUTB(sd, temp);
130			CLOCK_PULSE(sd, sd->sd_RDY);
131			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
132			CLOCK_PULSE(sd, sd->sd_RDY);
133			if ((k & (1 << i)) != 0)
134				temp ^= sd->sd_DO;
135		}
136
137		/*
138		 * Now read the 16 bit register.  An initial 0 precedes the
139		 * register contents which begins with bit 15 (MSB) and ends
140		 * with bit 0 (LSB).  The initial 0 will be shifted off the
141		 * top of our word as we let the loop run from 0 to 16.
142		 */
143		v = 0;
144		for (i = 16; i >= 0; i--) {
145			SEEPROM_OUTB(sd, temp);
146			CLOCK_PULSE(sd, sd->sd_RDY);
147			v <<= 1;
148			if (SEEPROM_DATA_INB(sd) & sd->sd_DI)
149				v |= 1;
150			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
151			CLOCK_PULSE(sd, sd->sd_RDY);
152		}
153
154		buf[k - start_addr] = v;
155
156		/* Reset the chip select for the next command cycle. */
157		temp = sd->sd_MS;
158		SEEPROM_OUTB(sd, temp);
159		CLOCK_PULSE(sd, sd->sd_RDY);
160		SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
161		CLOCK_PULSE(sd, sd->sd_RDY);
162		SEEPROM_OUTB(sd, temp);
163		CLOCK_PULSE(sd, sd->sd_RDY);
164	}
165#ifdef AHC_DUMP_EEPROM
166	printf("\nSerial EEPROM:");
167	for (k = 0; k < count; k = k + 1) {
168		if (((k % 8) == 0) && (k != 0)) {
169			printf ("\n              ");
170		}
171		printf (" 0x%x", buf[k]);
172	}
173	printf ("\n");
174#endif
175	return (1);
176}
177