aic7xxx.seq revision 16260
113177Sgibbs/*+M*********************************************************************** 213177Sgibbs *Adaptec 274x/284x/294x device driver for Linux and FreeBSD. 313177Sgibbs * 413177Sgibbs *Copyright (c) 1994 John Aycock 513177Sgibbs * The University of Calgary Department of Computer Science. 613177Sgibbs * All rights reserved. 713177Sgibbs * 815328Sgibbs *FreeBSD, Twin, Wide, 2 command per target support, tagged queuing, 915328Sgibbs *SCB paging and other optimizations: 1015328Sgibbs *Copyright (c) 1994, 1995, 1996 Justin Gibbs. All rights reserved. 1113177Sgibbs * 1213177Sgibbs *Redistribution and use in source and binary forms, with or without 1313177Sgibbs *modification, are permitted provided that the following conditions 1413177Sgibbs *are met: 1513177Sgibbs *1. Redistributions of source code must retain the above copyright 1613177Sgibbs * notice, this list of conditions, and the following disclaimer. 1713177Sgibbs *2. Redistributions in binary form must reproduce the above copyright 1813177Sgibbs * notice, this list of conditions and the following disclaimer in the 1913177Sgibbs * documentation and/or other materials provided with the distribution. 2013177Sgibbs *3. All advertising materials mentioning features or use of this software 2113177Sgibbs * must display the following acknowledgement: 2213177Sgibbs * This product includes software developed by the University of Calgary 2313177Sgibbs * Department of Computer Science and its contributors. 2413177Sgibbs *4. Neither the name of the University nor the names of its contributors 2513177Sgibbs * may be used to endorse or promote products derived from this software 2613177Sgibbs * without specific prior written permission. 2713177Sgibbs * 2813177Sgibbs *THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 2913177Sgibbs *ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 3013177Sgibbs *IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 3113177Sgibbs *ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 3213177Sgibbs *FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 3313177Sgibbs *DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 3413177Sgibbs *OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3513177Sgibbs *HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3613177Sgibbs *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3713177Sgibbs *OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3813177Sgibbs *SUCH DAMAGE. 3913177Sgibbs * 4013177Sgibbs *-M************************************************************************/ 414568Sgibbs 4216260SgibbsVERSION AIC7XXX_SEQ_VER "$Id: aic7xxx.seq,v 1.41 1996/06/08 06:54:06 gibbs Exp $" 435647Sgibbs 4415998Sgibbs#if defined(__NetBSD__) 4515998Sgibbs#include "../../../../dev/ic/aic7xxxreg.h" 4615998Sgibbs#elif defined(__FreeBSD__) 4713177Sgibbs#include "../../dev/aic7xxx/aic7xxx_reg.h" 4815998Sgibbs#endif 494568Sgibbs 5013177Sgibbs/* 5113177Sgibbs * We can't just use ACCUM in the sequencer code because it 5213177Sgibbs * must be treated specially by the assembler, and it currently 5313690Sgibbs * looks for the symbol 'A'. This is the only register defined in 5413177Sgibbs * the assembler's symbol space. 5513177Sgibbs */ 5613177SgibbsA = ACCUM 574568Sgibbs 5813690Sgibbs/* After starting the selection hardware, we check for reconnecting targets 5913690Sgibbs * as well as for our selection to complete just in case the reselection wins 6013690Sgibbs * bus arbitration. The problem with this is that we must keep track of the 6113690Sgibbs * SCB that we've already pulled from the QINFIFO and started the selection 6213690Sgibbs * on just in case the reselection wins so that we can retry the selection at 6313690Sgibbs * a later time. This problem cannot be resolved by holding a single entry 6413690Sgibbs * in scratch ram since a reconnecting target can request sense and this will 6513690Sgibbs * create yet another SCB waiting for selection. The solution used here is to 6613690Sgibbs * use byte 27 of the SCB as a psuedo-next pointer and to thread a list 6713177Sgibbs * of SCBs that are awaiting selection. Since 0-0xfe are valid SCB offsets, 6813177Sgibbs * SCB_LIST_NULL is 0xff which is out of range. The kernel driver must 6913177Sgibbs * add an entry to this list everytime a request sense occurs. The sequencer 7013177Sgibbs * will automatically consume the entries. 7113177Sgibbs */ 724568Sgibbs 7313177Sgibbs/* 7414449Sgibbs * We assume that the kernel driver may reset us at any time, even in the 7514449Sgibbs * middle of a DMA, so clear DFCNTRL too. 7613177Sgibbs */ 7714449Sgibbsreset: 7814449Sgibbs clr DFCNTRL 7914449Sgibbs clr SCSISIGO /* De-assert BSY */ 8014449Sgibbs/* 8114449Sgibbs * We jump to start after every bus free. 8214449Sgibbs */ 8313177Sgibbsstart: 8415328Sgibbs and FLAGS,0x0f /* clear target specific flags */ 8513177Sgibbs mvi SCSISEQ,ENRSELI /* Always allow reselection */ 8616198Sgibbs clr SCSIRATE /* 8716198Sgibbs * We don't know the target we will 8816198Sgibbs * connect to, so default to narrow 8916198Sgibbs * transfers to avoid parity problems. 9016198Sgibbs */ 918104Sgibbspoll_for_work: 9213177Sgibbs /* 9313177Sgibbs * Are we a twin channel device? 9413177Sgibbs * For fairness, we check the other bus first, 9513177Sgibbs * since we just finished a transaction on the 9613177Sgibbs * current channel. 9713177Sgibbs */ 9813177Sgibbs test FLAGS,TWIN_BUS jz start2 9913177Sgibbs xor SBLKCTL,SELBUSB /* Toggle to the other bus */ 1008104Sgibbs test SSTAT0,SELDI jnz reselect 10113177Sgibbs xor SBLKCTL,SELBUSB /* Toggle to the original bus */ 1025326Sgibbsstart2: 1038104Sgibbs test SSTAT0,SELDI jnz reselect 1049395Sgibbs cmp WAITING_SCBH,SCB_LIST_NULL jne start_waiting 10514934Sgibbs mov A, QCNTMASK 10614934Sgibbs test QINCNT,A jz poll_for_work 1074568Sgibbs 10813690Sgibbs/* 10913690Sgibbs * We have at least one queued SCB now and we don't have any 11013177Sgibbs * SCBs in the list of SCBs awaiting selection. Set the SCB 11113177Sgibbs * pointer from the FIFO so we see the right bank of SCB 11213177Sgibbs * registers. 11313177Sgibbs */ 1144568Sgibbs mov SCBPTR,QINFIFO 1154568Sgibbs 11613177Sgibbs/* 11713177Sgibbs * See if there is not already an active SCB for this target. This code 11813177Sgibbs * locks out on a per target basis instead of target/lun. Although this 11913177Sgibbs * is not ideal for devices that have multiple luns active at the same 12013177Sgibbs * time, it is faster than looping through all SCB's looking for active 12113177Sgibbs * commands. It may be benificial to make findscb a more general procedure 12213177Sgibbs * to see if the added cost of the search is negligible. This code also 12313177Sgibbs * assumes that the kernel driver will clear the active flags on board 12413177Sgibbs * initialization, board reset, and a target SELTO. Tagged commands 12513690Sgibbs * don't set the active bits since you can queue more than one command 12613690Sgibbs * at a time. We do, however, look to see if there are any non-tagged 12713690Sgibbs * I/Os in progress, and requeue the command if there are. Tagged and 12813690Sgibbs * non-tagged commands cannot be mixed to a single target. 12913177Sgibbs */ 1304568Sgibbs 1315647Sgibbstest_busy: 13213177Sgibbs mov FUNCTION1,SCB_TCL 1334568Sgibbs mov A,FUNCTION1 13413177Sgibbs test SCB_TCL,0x88 jz test_a /* Id < 8 && A channel */ 1355326Sgibbs 1365326Sgibbs test ACTIVE_B,A jnz requeue 13713177Sgibbs test SCB_CONTROL,TAG_ENB jnz start_scb 13813177Sgibbs /* Mark the current target as busy */ 13913177Sgibbs or ACTIVE_B,A 1405326Sgibbs jmp start_scb 1415326Sgibbs 14213177Sgibbs/* Place the currently active SCB back on the queue for later processing */ 1435326Sgibbsrequeue: 1444568Sgibbs mov QINFIFO, SCBPTR 1458104Sgibbs jmp poll_for_work 1464568Sgibbs 14713177Sgibbs/* 14813177Sgibbs * Pull the first entry off of the waiting for selection list 14913177Sgibbs * We don't have to "test_busy" because only transactions that 15013177Sgibbs * have passed that test can be in the waiting_scb list. 15113177Sgibbs */ 1528104Sgibbsstart_waiting: 1538104Sgibbs mov SCBPTR,WAITING_SCBH 15413177Sgibbs jmp start_scb2 1558104Sgibbs 1565326Sgibbstest_a: 15713177Sgibbs test ACTIVE_A,A jnz requeue 15813177Sgibbs test SCB_CONTROL,TAG_ENB jnz start_scb 15913177Sgibbs /* Mark the current target as busy */ 16013177Sgibbs or ACTIVE_A,A 1615326Sgibbs 1625326Sgibbsstart_scb: 16315328Sgibbs mov SCB_NEXT,WAITING_SCBH 16413177Sgibbs mov WAITING_SCBH, SCBPTR 16513177Sgibbsstart_scb2: 16613177Sgibbs and SINDEX,0xf7,SBLKCTL /* Clear the channel select bit */ 16713177Sgibbs and A,0x08,SCB_TCL /* Get new channel bit */ 16813177Sgibbs or SINDEX,A 16913177Sgibbs mov SBLKCTL,SINDEX /* select channel */ 17013177Sgibbs mov SCB_TCL call initialize_scsiid 1718104Sgibbs 17213177Sgibbs/* 17313177Sgibbs * Enable selection phase as an initiator, and do automatic ATN 17413177Sgibbs * after the selection. We do this now so that we can overlap the 17513177Sgibbs * rest of our work to set up this target with the arbitration and 17613177Sgibbs * selection bus phases. 17713177Sgibbs */ 1788104Sgibbsstart_selection: 17913177Sgibbs mvi SCSISEQ,0x58 /* ENSELO|ENAUTOATNO|ENRSELI */ 1804568Sgibbs 18113177Sgibbs/* 18213177Sgibbs * As soon as we get a successful selection, the target should go 18313177Sgibbs * into the message out phase since we have ATN asserted. Prepare 18413177Sgibbs * the message to send. 18513177Sgibbs * 18613177Sgibbs * Messages are stored in scratch RAM starting with a length byte 18713177Sgibbs * followed by the message itself. 18813177Sgibbs */ 18913177Sgibbs test SCB_CMDLEN,0xff jnz mk_identify /* 0 Length Command? */ 1908567Sdg 19113177Sgibbs/* 19213177Sgibbs * The kernel has sent us an SCB with no command attached. This implies 19313177Sgibbs * that the kernel wants to send a message of some sort to this target, 19413177Sgibbs * so we interrupt the driver, allow it to fill the message buffer, and 19513177Sgibbs * then go back into the arbitration loop 19613177Sgibbs */ 1978567Sdg mvi INTSTAT,AWAITING_MSG 1989917Sgibbs jmp wait_for_selection 1998567Sdg 20013177Sgibbsmk_identify: 20113177Sgibbs and A,DISCENB,SCB_CONTROL /* mask off disconnect privledge */ 2024568Sgibbs 20313690Sgibbs and MSG0,0x7,SCB_TCL /* lun */ 20413690Sgibbs or MSG0,A /* or in disconnect privledge */ 20513690Sgibbs or MSG0,MSG_IDENTIFY 20613690Sgibbs mvi MSG_LEN, 1 2074568Sgibbs 20813177Sgibbs test SCB_CONTROL,0xb0 jz !message /* WDTR, SDTR or TAG?? */ 20913177Sgibbs/* 21015328Sgibbs * Send a tag message if TAG_ENB is set in the SCB control block. 21115328Sgibbs * Use SCB_TAG (the position in the kernel's SCB array) as the tag value. 21213177Sgibbs */ 2134568Sgibbs 2146608Sgibbsmk_tag: 21513177Sgibbs mvi DINDEX, MSG1 21613177Sgibbs test SCB_CONTROL,TAG_ENB jz mk_tag_done 21715328Sgibbs and DINDIR,0x23,SCB_CONTROL 21815328Sgibbs mov DINDIR,SCB_TAG 2196608Sgibbs 22013177Sgibbs add MSG_LEN,COMP_MSG0,DINDEX /* update message length */ 2216608Sgibbs 2226608Sgibbsmk_tag_done: 2236608Sgibbs 22413690Sgibbs test SCB_CONTROL,0x90 jz !message /* NEEDWDTR|NEEDSDTR */ 22513177Sgibbs mov DINDEX call mk_dtr /* build DTR message if needed */ 2266608Sgibbs 2274568Sgibbs!message: 2289917Sgibbswait_for_selection: 22913177Sgibbs test SSTAT0,SELDO jnz select 23013177Sgibbs test SSTAT0,SELDI jz wait_for_selection 2314568Sgibbs 23213177Sgibbs/* 23313177Sgibbs * Reselection has been initiated by a target. Make a note that we've been 23413177Sgibbs * reselected, but haven't seen an IDENTIFY message from the target 23513177Sgibbs * yet. 23613177Sgibbs */ 2374568Sgibbsreselect: 23813177Sgibbs clr MSG_LEN /* Don't have anything in the mesg buffer */ 2398104Sgibbs mov SELID call initialize_scsiid 24013177Sgibbs or FLAGS,RESELECTED 24113177Sgibbs jmp select2 2424568Sgibbs 24313177Sgibbs/* 24413177Sgibbs * After the selection, remove this SCB from the "waiting for selection" 24513177Sgibbs * list. This is achieved by simply moving our "next" pointer into 24613177Sgibbs * WAITING_SCBH. Our next pointer will be set to null the next time this 24713177Sgibbs * SCB is used, so don't bother with it now. 24813177Sgibbs */ 2498104Sgibbsselect: 25015328Sgibbs mov WAITING_SCBH,SCB_NEXT 25115328Sgibbs or FLAGS,SELECTED 2528104Sgibbsselect2: 25313177Sgibbs/* 25413177Sgibbs * Set CLRCHN here before the target has entered a data transfer mode - 25513177Sgibbs * with synchronous SCSI, if you do it later, you blow away some 25613177Sgibbs * data in the SCSI FIFO that the target has already sent to you. 25713177Sgibbs */ 25813177Sgibbs or SXFRCTL0,CLRCHN 25913177Sgibbs/* 26013177Sgibbs * Initialize SCSIRATE with the appropriate value for this target. 26113177Sgibbs */ 26213177Sgibbs call ndx_dtr 26313177Sgibbs mov SCSIRATE,SINDIR 26413177Sgibbs 26515843Sgibbs/* 26615881Sgibbs * Initialize Ultra mode setting. 26715843Sgibbs */ 26815881Sgibbs mov FUNCTION1,SCSIID 26915881Sgibbs mov A,FUNCTION1 27015843Sgibbs and SINDEX,0xdf,SXFRCTL0 /* default to Ultra disabled */ 27115843Sgibbs test SCSIID, 0x80 jnz ultra_b /* Target ID > 7 */ 27215843Sgibbs test SBLKCTL, SELBUSB jnz ultra_b /* Second channel device */ 27315843Sgibbs test ULTRA_ENB,A jz set_sxfrctl0 27415843Sgibbs or SINDEX, ULTRAEN jmp set_sxfrctl0 27515843Sgibbsultra_b: 27615843Sgibbs test ULTRA_ENB_B,A jz set_sxfrctl0 27715843Sgibbs or SINDEX, ULTRAEN 27815843Sgibbs 27915843Sgibbsset_sxfrctl0: 28015843Sgibbs mov SXFRCTL0,SINDEX 28115843Sgibbs 28216198Sgibbs mvi SCSISEQ,ENAUTOATNP /* 28316198Sgibbs * ATN on parity errors 28416198Sgibbs * for "in" phases 28513177Sgibbs */ 28613177Sgibbs mvi CLRSINT1,CLRBUSFREE 28713177Sgibbs mvi CLRSINT0,0x60 /* CLRSELDI|CLRSELDO */ 28813177Sgibbs/* 28913177Sgibbs * Main loop for information transfer phases. If BSY is false, then 29013177Sgibbs * we have a bus free condition, expected or not. Otherwise, wait 29113177Sgibbs * for the target to assert REQ before checking MSG, C/D and I/O 29213177Sgibbs * for the bus phase. 29313177Sgibbs * 29413177Sgibbs */ 2954568SgibbsITloop: 29613177Sgibbs test SSTAT1,BUSFREE jnz p_busfree 29713177Sgibbs test SSTAT1,REQINIT jz ITloop 2984568Sgibbs 29913177Sgibbs and A,PHASE_MASK,SCSISIGI 30013690Sgibbs mov LASTPHASE,A 30113690Sgibbs mov SCSISIGO,A 3024568Sgibbs 3034568Sgibbs cmp ALLZEROS,A je p_dataout 30413177Sgibbs cmp A,P_DATAIN je p_datain 30513177Sgibbs cmp A,P_COMMAND je p_command 30613177Sgibbs cmp A,P_MESGOUT je p_mesgout 30713177Sgibbs cmp A,P_STATUS je p_status 30813177Sgibbs cmp A,P_MESGIN je p_mesgin 3094568Sgibbs 31013177Sgibbs mvi INTSTAT,BAD_PHASE /* unknown phase - signal driver */ 31115843Sgibbs jmp ITloop /* Try reading the bus again. */ 3124568Sgibbs 3134568Sgibbsp_dataout: 31413177Sgibbs mvi DMAPARAMS,0x7d /* 31513177Sgibbs * WIDEODD|SCSIEN|SDMAEN|HDMAEN| 31613177Sgibbs * DIRECTION|FIFORESET 31713177Sgibbs */ 3189928Sgibbs jmp data_phase_init 3194568Sgibbs 32013177Sgibbs/* 32113177Sgibbs * If we re-enter the data phase after going through another phase, the 32213177Sgibbs * STCNT may have been cleared, so restore it from the residual field. 32313177Sgibbs */ 3249928Sgibbsdata_phase_reinit: 32513690Sgibbs mov STCNT0,SCB_RESID_DCNT0 32613690Sgibbs mov STCNT1,SCB_RESID_DCNT1 32713690Sgibbs mov STCNT2,SCB_RESID_DCNT2 3289928Sgibbs jmp data_phase_loop 3294568Sgibbs 3309928Sgibbsp_datain: 33113177Sgibbs mvi DMAPARAMS,0x79 /* 33213177Sgibbs * WIDEODD|SCSIEN|SDMAEN|HDMAEN| 33313177Sgibbs * !DIRECTION|FIFORESET 33413177Sgibbs */ 3359928Sgibbsdata_phase_init: 3369928Sgibbs call assert 3375775Sgibbs 3389928Sgibbs test FLAGS, DPHASE jnz data_phase_reinit 3399928Sgibbs call sg_scb2ram 34013177Sgibbs or FLAGS, DPHASE /* We have seen a data phase */ 3414568Sgibbs 3429928Sgibbsdata_phase_loop: 34316260Sgibbs/* Guard against overruns */ 34416260Sgibbs test SG_COUNT, 0xff jnz data_phase_inbounds 34516260Sgibbs/* 34616260Sgibbs * Turn on 'Bit Bucket' mode, set the transfer count to 34716260Sgibbs * 16meg and let the target run until it changes phase. 34816260Sgibbs * When the transfer completes, notify the host that we 34916260Sgibbs * had an overrun. 35016260Sgibbs */ 35116260Sgibbs or SXFRCTL1,BITBUCKET 35216260Sgibbs mvi STCNT0,0xff 35316260Sgibbs mvi STCNT1,0xff 35416260Sgibbs mvi STCNT2,0xff 35516260Sgibbs 35616260Sgibbsdata_phase_inbounds: 35713177Sgibbs/* If we are the last SG block, don't set wideodd. */ 3589928Sgibbs cmp SG_COUNT,0x01 jne data_phase_wideodd 35913177Sgibbs and DMAPARAMS, 0xbf /* Turn off WIDEODD */ 3609928Sgibbsdata_phase_wideodd: 3619928Sgibbs mov DMAPARAMS call dma 3624568Sgibbs 36316260Sgibbs/* Go tell the host about any overruns */ 36416260Sgibbs test SXFRCTL1,BITBUCKET jnz data_phase_overrun 36516260Sgibbs 36613177Sgibbs/* Exit if we had an underrun */ 36713177Sgibbs test SSTAT0,SDONE jz data_phase_finish /* underrun STCNT != 0 */ 3687532Sgibbs 36913177Sgibbs/* 37013177Sgibbs * Advance the scatter-gather pointers if needed 37113177Sgibbs */ 3729928Sgibbssg_advance: 37313177Sgibbs dec SG_COUNT /* one less segment to go */ 3744568Sgibbs 37513177Sgibbs test SG_COUNT, 0xff jz data_phase_finish /* Are we done? */ 3764568Sgibbs 37713177Sgibbs clr A /* add sizeof(struct scatter) */ 37813177Sgibbs add SG_NEXT0,SG_SIZEOF,SG_NEXT0 37913177Sgibbs adc SG_NEXT1,A,SG_NEXT1 3804568Sgibbs 38113177Sgibbs/* 38213177Sgibbs * Load a struct scatter and set up the data address and length. 38313177Sgibbs * If the working value of the SG count is nonzero, then 38413177Sgibbs * we need to load a new set of values. 38513177Sgibbs * 38615328Sgibbs * This, like all DMA's, assumes little-endian host data storage. 38713177Sgibbs */ 3889928Sgibbssg_load: 38913177Sgibbs clr HCNT2 39013177Sgibbs clr HCNT1 39113177Sgibbs mvi HCNT0,SG_SIZEOF 3924568Sgibbs 39313690Sgibbs mov HADDR0,SG_NEXT0 39413690Sgibbs mov HADDR1,SG_NEXT1 39513690Sgibbs mov HADDR2,SG_NEXT2 39613690Sgibbs mov HADDR3,SG_NEXT3 3974568Sgibbs 39813690Sgibbs or DFCNTRL,0xd /* HDMAEN|DIRECTION|FIFORESET */ 3999928Sgibbs 40013177Sgibbs/* 40113177Sgibbs * Wait for DMA from host memory to data FIFO to complete, then disable 40213177Sgibbs * DMA and wait for it to acknowledge that it's off. 40313177Sgibbs */ 40413690Sgibbsdma_finish: 40513690Sgibbs test DFSTATUS,HDONE jz dma_finish 40613690Sgibbs /* Turn off DMA preserving WIDEODD */ 40713690Sgibbs and DFCNTRL,WIDEODD 40813690Sgibbsdma_finish2: 40913690Sgibbs test DFCNTRL,HDMAENACK jnz dma_finish2 4109928Sgibbs 41113177Sgibbs/* 41213177Sgibbs * Copy data from FIFO into SCB data pointer and data count. This assumes 41313177Sgibbs * that the struct scatterlist has this structure (this and sizeof(struct 41414449Sgibbs * scatterlist) == 12 are asserted in aic7xxx.c for the Linux driver): 41513177Sgibbs * 41613177Sgibbs * struct scatterlist { 41713177Sgibbs * char *address; four bytes, little-endian order 41813177Sgibbs * ... four bytes, ignored 41913177Sgibbs * unsigned short length; two bytes, little-endian order 42013177Sgibbs * } 42113177Sgibbs * 42213177Sgibbs * 42314449Sgibbs * In FreeBSD, the scatter list entry is only 8 bytes. 42413177Sgibbs * 42513177Sgibbs * struct ahc_dma_seg { 42613177Sgibbs * physaddr addr; four bytes, little-endian order 42713177Sgibbs * long len; four bytes, little endian order 42813177Sgibbs * }; 42913177Sgibbs */ 4309928Sgibbs 43114449Sgibbs mov HADDR0,DFDAT 43214449Sgibbs mov HADDR1,DFDAT 43314449Sgibbs mov HADDR2,DFDAT 43414449Sgibbs mov HADDR3,DFDAT 43513177Sgibbs/* 43613177Sgibbs * For Linux, we must throw away four bytes since there is a 32bit gap 43714449Sgibbs * in the middle of a struct scatterlist. 43813177Sgibbs */ 43915709Sgibbs#ifdef __linux__ 44013177Sgibbs mov NONE,DFDAT 44113177Sgibbs mov NONE,DFDAT 44213177Sgibbs mov NONE,DFDAT 44313177Sgibbs mov NONE,DFDAT 44414449Sgibbs#endif 44513690Sgibbs mov HCNT0,DFDAT 44613690Sgibbs mov HCNT1,DFDAT 44713690Sgibbs mov HCNT2,DFDAT 4484568Sgibbs 44913177Sgibbs/* Load STCNT as well. It is a mirror of HCNT */ 45013690Sgibbs mov STCNT0,HCNT0 45113690Sgibbs mov STCNT1,HCNT1 45213690Sgibbs mov STCNT2,HCNT2 4539928Sgibbs test SSTAT1,PHASEMIS jz data_phase_loop 4544568Sgibbs 4559928Sgibbsdata_phase_finish: 45613177Sgibbs/* 45713177Sgibbs * After a DMA finishes, save the SG and STCNT residuals back into the SCB 45813177Sgibbs * We use STCNT instead of HCNT, since it's a reflection of how many bytes 45913177Sgibbs * were transferred on the SCSI (as opposed to the host) bus. 46013177Sgibbs */ 46113690Sgibbs mov SCB_RESID_DCNT0,STCNT0 46213690Sgibbs mov SCB_RESID_DCNT1,STCNT1 46313690Sgibbs mov SCB_RESID_DCNT2,STCNT2 46413177Sgibbs mov SCB_RESID_SGCNT, SG_COUNT 4654568Sgibbs jmp ITloop 4664568Sgibbs 46716260Sgibbsdata_phase_overrun: 46813177Sgibbs/* 46916260Sgibbs * Turn off BITBUCKET mode and notify the host 47016260Sgibbs */ 47116260Sgibbs and SXFRCTL1,0x7f /* ~BITBUCKET */ 47216260Sgibbs mvi INTSTAT,DATA_OVERRUN 47316260Sgibbs jmp ITloop 47416260Sgibbs 47516260Sgibbs/* 47615328Sgibbs * Command phase. Set up the DMA registers and let 'er rip. 47713177Sgibbs */ 4784568Sgibbsp_command: 4794568Sgibbs call assert 4804568Sgibbs 48113177Sgibbs/* 48215328Sgibbs * Load HADDR and HCNT. 48313177Sgibbs */ 48413690Sgibbs mov HADDR0, SCB_CMDPTR0 48513690Sgibbs mov HADDR1, SCB_CMDPTR1 48613690Sgibbs mov HADDR2, SCB_CMDPTR2 48713690Sgibbs mov HADDR3, SCB_CMDPTR3 48813690Sgibbs mov HCNT0, SCB_CMDLEN 48913690Sgibbs clr HCNT1 49013690Sgibbs clr HCNT2 4914568Sgibbs 49213690Sgibbs mov STCNT0, HCNT0 49313690Sgibbs mov STCNT1, HCNT1 49413690Sgibbs mov STCNT2, HCNT2 4954568Sgibbs 4964568Sgibbs mvi 0x3d call dma # SCSIEN|SDMAEN|HDMAEN| 4974568Sgibbs # DIRECTION|FIFORESET 4984568Sgibbs jmp ITloop 4994568Sgibbs 50013177Sgibbs/* 50113177Sgibbs * Status phase. Wait for the data byte to appear, then read it 50213177Sgibbs * and store it into the SCB. 50313177Sgibbs */ 5044568Sgibbsp_status: 50513177Sgibbs mvi SCB_TARGET_STATUS call inb_first 5069954Sgibbs jmp mesgin_done 5074568Sgibbs 50813177Sgibbs/* 50915328Sgibbs * Message out phase. If there is not an active message, but the target 51013177Sgibbs * took us into this phase anyway, build a no-op message and send it. 51113177Sgibbs */ 5124568Sgibbsp_mesgout: 51313177Sgibbs test MSG_LEN, 0xff jnz p_mesgout_start 51413177Sgibbs mvi MSG_NOP call mk_mesg /* build NOP message */ 5154568Sgibbs 51613177Sgibbsp_mesgout_start: 51713177Sgibbs/* 51813177Sgibbs * Set up automatic PIO transfer from MSG0. Bit 3 in 51913177Sgibbs * SXFRCTL0 (SPIOEN) is already on. 52013177Sgibbs */ 52113177Sgibbs mvi SINDEX,MSG0 5224568Sgibbs mov DINDEX,MSG_LEN 5234568Sgibbs 52413177Sgibbs/* 52513177Sgibbs * When target asks for a byte, drop ATN if it's the last one in 52613177Sgibbs * the message. Otherwise, keep going until the message is exhausted. 52713177Sgibbs * 52813177Sgibbs * Keep an eye out for a phase change, in case the target issues 52913177Sgibbs * a MESSAGE REJECT. 53013177Sgibbs */ 53113177Sgibbsp_mesgout_loop: 53216198Sgibbs test SSTAT1,PHASEMIS jnz p_mesgout_phasemis 53313177Sgibbs test SSTAT0,SPIORDY jz p_mesgout_loop 53416198Sgibbs test SSTAT1,PHASEMIS jnz p_mesgout_phasemis 53513177Sgibbs cmp DINDEX,1 jne p_mesgout_outb /* last byte? */ 53613177Sgibbs mvi CLRSINT1,CLRATNO /* drop ATN */ 53713177Sgibbsp_mesgout_outb: 53813177Sgibbs dec DINDEX 53913386Sgibbs or CLRSINT0, CLRSPIORDY 5404568Sgibbs mov SCSIDATL,SINDIR 54113313Sgibbs 5424568Sgibbsp_mesgout4: 54313177Sgibbs test DINDEX,0xff jnz p_mesgout_loop 5444568Sgibbs 54513177Sgibbs/* 54613177Sgibbs * If the next bus phase after ATN drops is a message out, it means 54713177Sgibbs * that the target is requesting that the last message(s) be resent. 54813177Sgibbs */ 54913177Sgibbsp_mesgout_snoop: 55013177Sgibbs test SSTAT1,BUSFREE jnz p_mesgout_done 55113177Sgibbs test SSTAT1,REQINIT jz p_mesgout_snoop 5524568Sgibbs 55313177Sgibbs test SSTAT1,PHASEMIS jnz p_mesgout_done 5544568Sgibbs 55513690Sgibbs or SCSISIGO,ATNO /* turn on ATNO */ 55613177Sgibbs 5574568Sgibbs jmp ITloop 5584568Sgibbs 55913177Sgibbsp_mesgout_phasemis: 56015328Sgibbs mvi CLRSINT1,CLRATNO /* Be sure to turn ATNO off */ 56113177Sgibbsp_mesgout_done: 56213177Sgibbs clr MSG_LEN /* no active msg */ 5634568Sgibbs jmp ITloop 5644568Sgibbs 56513177Sgibbs/* 56613177Sgibbs * Message in phase. Bytes are read using Automatic PIO mode. 56713177Sgibbs */ 5684568Sgibbsp_mesgin: 56913177Sgibbs mvi A call inb_first /* read the 1st message byte */ 57013177Sgibbs mov REJBYTE,A /* save it for the driver */ 5714568Sgibbs 57213177Sgibbs test A,MSG_IDENTIFY jnz mesgin_identify 57313177Sgibbs cmp A,MSG_DISCONNECT je mesgin_disconnect 57413177Sgibbs cmp A,MSG_SDPTRS je mesgin_sdptrs 57513177Sgibbs cmp ALLZEROS,A je mesgin_complete 57613177Sgibbs cmp A,MSG_RDPTRS je mesgin_rdptrs 57713177Sgibbs cmp A,MSG_EXTENDED je mesgin_extended 57813177Sgibbs cmp A,MSG_REJECT je mesgin_reject 5794568Sgibbs 5809954Sgibbsrej_mesgin: 58113177Sgibbs/* 58213177Sgibbs * We have no idea what this message in is, and there's no way 58313177Sgibbs * to pass it up to the kernel, so we issue a message reject and 58413177Sgibbs * hope for the best. Since we're now using manual PIO mode to 58513177Sgibbs * read in the message, there should no longer be a race condition 58613177Sgibbs * present when we assert ATN. In any case, rejection should be a 58713177Sgibbs * rare occurrence - signal the driver when it happens. 58813177Sgibbs */ 58913690Sgibbs or SCSISIGO,ATNO /* turn on ATNO */ 59013177Sgibbs mvi INTSTAT,SEND_REJECT /* let driver know */ 5919954Sgibbs 59213177Sgibbs mvi MSG_REJECT call mk_mesg 5939954Sgibbs 5949954Sgibbsmesgin_done: 59513177Sgibbs call inb_last /*ack & turn auto PIO back on*/ 5969954Sgibbs jmp ITloop 5979954Sgibbs 5989954Sgibbs 5999954Sgibbsmesgin_complete: 60013177Sgibbs/* 60115328Sgibbs * We got a "command complete" message, so put the SCB_TAG into QUEUEOUT, 60215328Sgibbs * and trigger a completion interrupt. Check status for non zero return 60315328Sgibbs * and interrupt driver if needed. This allows the driver to interpret 60415328Sgibbs * errors only when they occur instead of always uploading the scb. If 60515328Sgibbs * the status is SCSI_CHECK, the driver will download a new scb requesting 60615328Sgibbs * sense to replace the old one, modify the "waiting for selection" SCB list 60715328Sgibbs * and set RETURN_1 to SEND_SENSE. If RETURN_1 is set to SEND_SENSE the 60815328Sgibbs * sequencer imediately jumps to main loop where it will run down the waiting 60915328Sgibbs * SCB list and process the sense request. If the kernel driver does not 61015328Sgibbs * wish to request sense, it need only clear RETURN_1, and the command is 61115328Sgibbs * allowed to complete. We don't bother to post to the QOUTFIFO in the 61215328Sgibbs * error case since it would require extra work in the kernel driver to 61315328Sgibbs * ensure that the entry was removed before the command complete code tried 61415328Sgibbs * processing it. 61513177Sgibbs * 61613177Sgibbs * First check for residuals 61713177Sgibbs */ 61813177Sgibbs test SCB_RESID_SGCNT,0xff jz check_status 61913177Sgibbs/* 62013177Sgibbs * If we have a residual count, interrupt and tell the host. Other 62113177Sgibbs * alternatives are to pause the sequencer on all command completes (yuck), 62213177Sgibbs * dma the resid directly to the host (slick, we may have space to do it now) 62313177Sgibbs * or have the sequencer pause itself when it encounters a non-zero resid 62413177Sgibbs * (unecessary pause just to flag the command -yuck-, but takes one instruction 62513177Sgibbs * and since it shouldn't happen that often is good enough for our purposes). 62613177Sgibbs */ 62713177Sgibbsresid: 62813177Sgibbs mvi INTSTAT,RESIDUAL 6294568Sgibbs 6307532Sgibbscheck_status: 63113177Sgibbs test SCB_TARGET_STATUS,0xff jz status_ok /* Good Status? */ 63213177Sgibbs mvi INTSTAT,BAD_STATUS /* let driver know */ 63313177Sgibbs cmp RETURN_1, SEND_SENSE jne status_ok 6349954Sgibbs jmp mesgin_done 6355326Sgibbs 6364568Sgibbsstatus_ok: 63713177Sgibbs/* First, mark this target as free. */ 63813177Sgibbs test SCB_CONTROL,TAG_ENB jnz test_immediate /* 63913177Sgibbs * Tagged commands 64013177Sgibbs * don't busy the 64113177Sgibbs * target. 64213177Sgibbs */ 64313177Sgibbs mov FUNCTION1,SCB_TCL 6445326Sgibbs mov A,FUNCTION1 64513177Sgibbs test SCB_TCL,0x88 jz clear_a 6465326Sgibbs xor ACTIVE_B,A 64713177Sgibbs jmp test_immediate 6485326Sgibbs 6495326Sgibbsclear_a: 6505326Sgibbs xor ACTIVE_A,A 6515326Sgibbs 65213177Sgibbstest_immediate: 65313177Sgibbs test SCB_CMDLEN,0xff jnz complete /* Immediate message complete */ 65413177Sgibbs/* 65513177Sgibbs * Pause the sequencer until the driver gets around to handling the command 65613177Sgibbs * complete. This is so that any action that might require carefull timing 65713177Sgibbs * with the completion of this command can occur. 65813177Sgibbs */ 6599810Sgibbs mvi INTSTAT,IMMEDDONE 66013177Sgibbs jmp start 6615326Sgibbscomplete: 66215328Sgibbs mov QOUTFIFO,SCB_TAG 6637532Sgibbs mvi INTSTAT,CMDCMPLT 6649954Sgibbs jmp mesgin_done 6654568Sgibbs 6667532Sgibbs 66713177Sgibbs/* 66813177Sgibbs * Is it an extended message? We only support the synchronous and wide data 66913177Sgibbs * transfer request messages, which will probably be in response to 67013177Sgibbs * WDTR or SDTR message outs from us. If it's not SDTR or WDTR, reject it - 67113177Sgibbs * apparently this can be done after any message in byte, according 67213177Sgibbs * to the SCSI-2 spec. 67313177Sgibbs */ 6749954Sgibbsmesgin_extended: 67513177Sgibbs mvi ARG_1 call inb_next /* extended message length */ 67615328Sgibbs mvi REJBYTE_EXT call inb_next /* extended message code */ 6774568Sgibbs 67815328Sgibbs cmp REJBYTE_EXT,MSG_SDTR je p_mesginSDTR 67915328Sgibbs cmp REJBYTE_EXT,MSG_WDTR je p_mesginWDTR 6809954Sgibbs jmp rej_mesgin 6815562Sgibbs 6825562Sgibbsp_mesginWDTR: 68313177Sgibbs cmp ARG_1,2 jne rej_mesgin /* extended mesg length=2 */ 68413177Sgibbs mvi ARG_1 call inb_next /* Width of bus */ 68513177Sgibbs mvi INTSTAT,WDTR_MSG /* let driver know */ 68613177Sgibbs test RETURN_1,0xff jz mesgin_done /* Do we need to send WDTR? */ 68713177Sgibbs cmp RETURN_1,SEND_REJ je rej_mesgin /* 68813177Sgibbs * Bus width was too large 68913177Sgibbs * Reject it. 69013177Sgibbs */ 6915562Sgibbs 69213177Sgibbs/* We didn't initiate the wide negotiation, so we must respond to the request */ 69313177Sgibbs and RETURN_1,0x7f /* Clear the SEND_WDTR Flag */ 69413177Sgibbs mvi DINDEX,MSG0 69513177Sgibbs mvi MSG0 call mk_wdtr /* build WDTR message */ 69613690Sgibbs or SCSISIGO,ATNO /* turn on ATNO */ 6979954Sgibbs jmp mesgin_done 6985562Sgibbs 6995562Sgibbsp_mesginSDTR: 70013177Sgibbs cmp ARG_1,3 jne rej_mesgin /* extended mesg length=3 */ 70113177Sgibbs mvi ARG_1 call inb_next /* xfer period */ 70213177Sgibbs mvi A call inb_next /* REQ/ACK offset */ 70313177Sgibbs mvi INTSTAT,SDTR_MSG /* call driver to convert */ 7044568Sgibbs 70513177Sgibbs test RETURN_1,0xff jz mesgin_done /* Do we need to mk_sdtr/rej */ 70613177Sgibbs cmp RETURN_1,SEND_REJ je rej_mesgin /* 70713177Sgibbs * Requested SDTR too small 70813177Sgibbs * Reject it. 70913177Sgibbs */ 71015328Sgibbs clr ARG_1 /* Use the scratch ram rate */ 71113177Sgibbs mvi DINDEX, MSG0 71213177Sgibbs mvi MSG0 call mk_sdtr 71313690Sgibbs or SCSISIGO,ATNO /* turn on ATNO */ 7149954Sgibbs jmp mesgin_done 7154568Sgibbs 71613177Sgibbs/* 71713177Sgibbs * Is it a disconnect message? Set a flag in the SCB to remind us 71813177Sgibbs * and await the bus going free. 71913177Sgibbs */ 7209954Sgibbsmesgin_disconnect: 72113177Sgibbs or SCB_CONTROL,DISCONNECTED 72215328Sgibbs test FLAGS, PAGESCBS jz mesgin_done 72315328Sgibbs/* 72415328Sgibbs * Link this SCB into the DISCONNECTED list. This list holds the 72515328Sgibbs * candidates for paging out an SCB if one is needed for a new command. 72615328Sgibbs * Modifying the disconnected list is a critical(pause dissabled) section. 72715328Sgibbs */ 72815328Sgibbs mvi SCB_PREV, SCB_LIST_NULL 72915328Sgibbs mvi SEQCTL,0x50 /* PAUSEDIS|FASTMODE */ 73015328Sgibbs mov SCB_NEXT, DISCONNECTED_SCBH 73115328Sgibbs mov DISCONNECTED_SCBH, SCBPTR 73215328Sgibbs cmp SCB_NEXT,SCB_LIST_NULL je linkdone 73315328Sgibbs mov SCBPTR,SCB_NEXT 73415328Sgibbs mov SCB_PREV,DISCONNECTED_SCBH 73515328Sgibbs mov SCBPTR,DISCONNECTED_SCBH 73615328Sgibbslinkdone: 73715328Sgibbs mvi SEQCTL,0x10 /* !PAUSEDIS|FASTMODE */ 7389954Sgibbs jmp mesgin_done 7394568Sgibbs 74013177Sgibbs/* 74113177Sgibbs * Save data pointers message? Copy working values into the SCB, 74213177Sgibbs * usually in preparation for a disconnect. 74313177Sgibbs */ 7449954Sgibbsmesgin_sdptrs: 7454568Sgibbs call sg_ram2scb 7469954Sgibbs jmp mesgin_done 7474568Sgibbs 74813177Sgibbs/* 74913177Sgibbs * Restore pointers message? Data pointers are recopied from the 75013177Sgibbs * SCB anytime we enter a data phase for the first time, so all 75113177Sgibbs * we need to do is clear the DPHASE flag and let the data phase 75213177Sgibbs * code do the rest. 75313177Sgibbs */ 7549954Sgibbsmesgin_rdptrs: 75515328Sgibbs and FLAGS,0xef /* 75613177Sgibbs * !DPHASE we'll reload them 75713177Sgibbs * the next time through 75813177Sgibbs */ 7599954Sgibbs jmp mesgin_done 7604568Sgibbs 76113177Sgibbs/* 76213177Sgibbs * Identify message? For a reconnecting target, this tells us the lun 76313177Sgibbs * that the reconnection is for - find the correct SCB and switch to it, 76413177Sgibbs * clearing the "disconnected" bit so we don't "find" it by accident later. 76513177Sgibbs */ 7669954Sgibbsmesgin_identify: 76713177Sgibbs test A,0x78 jnz rej_mesgin /*!DiscPriv|!LUNTAR|!Reserved*/ 7684568Sgibbs 76913177Sgibbs and A,0x07 /* lun in lower three bits */ 7706608Sgibbs or SAVED_TCL,A,SELID 7716608Sgibbs and SAVED_TCL,0xf7 77213177Sgibbs and A,SELBUSB,SBLKCTL /* B Channel?? */ 7736608Sgibbs or SAVED_TCL,A 77413177Sgibbs call inb_last /* ACK */ 77513177Sgibbs 77613177Sgibbs/* 77713177Sgibbs * Here we "snoop" the bus looking for a SIMPLE QUEUE TAG message. 77815328Sgibbs * If we get one, we use the tag returned to switch to find the proper 77915328Sgibbs * SCB. With SCB paging, this requires using findSCB for both tagged 78015328Sgibbs * and non-tagged transactions since the SCB may exist in any slot. 78115328Sgibbs * If we're not using SCB paging, we can use the tag as the direct 78215328Sgibbs * index to the SCB. 78313177Sgibbs */ 78415328Sgibbs mvi ARG_1,SCB_LIST_NULL /* Default to no-tag */ 78513177Sgibbssnoop_tag_loop: 78613177Sgibbs test SSTAT1,BUSFREE jnz use_findSCB 78713177Sgibbs test SSTAT1,REQINIT jz snoop_tag_loop 78813177Sgibbs test SSTAT1,PHASEMIS jnz use_findSCB 78913177Sgibbs mvi A call inb_first 79015328Sgibbs cmp A,MSG_SIMPLE_TAG jne use_findSCB 7916608Sgibbsget_tag: 79213177Sgibbs mvi ARG_1 call inb_next /* tag value */ 79313177Sgibbs/* 79413177Sgibbs * See if the tag is in range. The tag is < SCBCOUNT if we add 79513177Sgibbs * the complement of SCBCOUNT to the incomming tag and there is 79613177Sgibbs * no carry. 79713177Sgibbs */ 79813177Sgibbs mov A,COMP_SCBCOUNT 79913177Sgibbs add SINDEX,A,ARG_1 80013177Sgibbs jc abort_tag 80113177Sgibbs 80213177Sgibbs/* 80315328Sgibbs * Ensure that the SCB the tag points to is for an SCB transaction 80413177Sgibbs * to the reconnecting target. 80513177Sgibbs */ 80615328Sgibbs test FLAGS, PAGESCBS jz index_by_tag 80715328Sgibbs call inb_last /* Ack Tag */ 80815328Sgibbsuse_findSCB: 80915328Sgibbs mov ALLZEROS call findSCB /* Have to search */ 81015328Sgibbssetup_SCB: 81115328Sgibbs and SCB_CONTROL,0xfb /* clear disconnect bit in SCB */ 81215328Sgibbs or FLAGS,IDENTIFY_SEEN /* make note of IDENTIFY */ 81315328Sgibbs jmp ITloop 81415328Sgibbsindex_by_tag: 81513177Sgibbs mov SCBPTR,ARG_1 8166608Sgibbs mov A,SAVED_TCL 81713177Sgibbs cmp SCB_TCL,A jne abort_tag 81813177Sgibbs test SCB_CONTROL,TAG_ENB jz abort_tag 81913177Sgibbs call inb_last /* Ack Successful tag */ 82013177Sgibbs jmp setup_SCB 82115328Sgibbs 8227700Sgibbsabort_tag: 82313690Sgibbs or SCSISIGO,ATNO /* turn on ATNO */ 82413177Sgibbs mvi INTSTAT,ABORT_TAG /* let driver know */ 82515328Sgibbs mvi MSG_ABORT_TAG call mk_mesg /* ABORT TAG message */ 82613177Sgibbs jmp mesgin_done 8276608Sgibbs 82813177Sgibbs/* 82913177Sgibbs * Message reject? Let the kernel driver handle this. If we have an 83013177Sgibbs * outstanding WDTR or SDTR negotiation, assume that it's a response from 83113177Sgibbs * the target selecting 8bit or asynchronous transfer, otherwise just ignore 83213177Sgibbs * it since we have no clue what it pertains to. 83313177Sgibbs */ 8349954Sgibbsmesgin_reject: 83513177Sgibbs mvi INTSTAT, REJECT_MSG 8369954Sgibbs jmp mesgin_done 8375562Sgibbs 83813177Sgibbs/* 83913177Sgibbs * [ ADD MORE MESSAGE HANDLING HERE ] 84013177Sgibbs */ 8414568Sgibbs 84213177Sgibbs/* 84313177Sgibbs * Bus free phase. It might be useful to interrupt the device 84413177Sgibbs * driver if we aren't expecting this. For now, make sure that 84513177Sgibbs * ATN isn't being asserted and look for a new command. 84613177Sgibbs */ 8474568Sgibbsp_busfree: 84813177Sgibbs mvi CLRSINT1,CLRATNO 84914449Sgibbs clr LASTPHASE 8508567Sdg 85113177Sgibbs/* 85213177Sgibbs * if this is an immediate command, perform a psuedo command complete to 85313177Sgibbs * notify the driver. 85413177Sgibbs */ 85513177Sgibbs test SCB_CMDLEN,0xff jz status_ok 85613177Sgibbs jmp start 8574568Sgibbs 85813177Sgibbs/* 85913177Sgibbs * Locking the driver out, build a one-byte message passed in SINDEX 86013177Sgibbs * if there is no active message already. SINDEX is returned intact. 86113177Sgibbs */ 8624568Sgibbsmk_mesg: 86313177Sgibbs mvi SEQCTL,0x50 /* PAUSEDIS|FASTMODE */ 86413177Sgibbs test MSG_LEN,0xff jz mk_mesg1 /* Should always succeed */ 86513177Sgibbs 86613177Sgibbs /* 86713177Sgibbs * Hmmm. For some reason the mesg buffer is in use. 86813177Sgibbs * Tell the driver. It should look at SINDEX to find 86913177Sgibbs * out what we wanted to use the buffer for and resolve 87013177Sgibbs * the conflict. 87113177Sgibbs */ 87213177Sgibbs mvi SEQCTL,0x10 /* !PAUSEDIS|FASTMODE */ 87313690Sgibbs mvi INTSTAT,MSG_BUFFER_BUSY 8744568Sgibbs 8754568Sgibbsmk_mesg1: 87613177Sgibbs mvi MSG_LEN,1 /* length = 1 */ 87713177Sgibbs mov MSG0,SINDEX /* 1-byte message */ 87813177Sgibbs mvi SEQCTL,0x10 ret /* !PAUSEDIS|FASTMODE */ 8794568Sgibbs 88013177Sgibbs/* 88113177Sgibbs * Functions to read data in Automatic PIO mode. 88213177Sgibbs * 88313177Sgibbs * According to Adaptec's documentation, an ACK is not sent on input from 88413177Sgibbs * the target until SCSIDATL is read from. So we wait until SCSIDATL is 88513177Sgibbs * latched (the usual way), then read the data byte directly off the bus 88613177Sgibbs * using SCSIBUSL. When we have pulled the ATN line, or we just want to 88713177Sgibbs * acknowledge the byte, then we do a dummy read from SCISDATL. The SCSI 88813177Sgibbs * spec guarantees that the target will hold the data byte on the bus until 88913177Sgibbs * we send our ACK. 89013177Sgibbs * 89113177Sgibbs * The assumption here is that these are called in a particular sequence, 89213177Sgibbs * and that REQ is already set when inb_first is called. inb_{first,next} 89313177Sgibbs * use the same calling convention as inb. 89413177Sgibbs */ 89513177Sgibbs 89613177Sgibbsinb_next: 89713386Sgibbs or CLRSINT0, CLRSPIORDY 89813360Sgibbs mov NONE,SCSIDATL /*dummy read from latch to ACK*/ 89913360Sgibbsinb_next_wait: 90016198Sgibbs test SSTAT1,PHASEMIS jnz mesgin_phasemis 90115951Sgibbs test SSTAT0,SPIORDY jz inb_next_wait /* wait for next byte */ 90213313Sgibbsinb_first: 9034568Sgibbs mov DINDEX,SINDEX 90416002Sgibbs test SSTAT1,PHASEMIS jnz mesgin_phasemis 90513177Sgibbs mov DINDIR,SCSIBUSL ret /*read byte directly from bus*/ 90613177Sgibbsinb_last: 90713360Sgibbs mov NONE,SCSIDATL ret /*dummy read from latch to ACK*/ 9084568Sgibbs 90913177Sgibbsmesgin_phasemis: 91013177Sgibbs/* 91113177Sgibbs * We expected to receive another byte, but the target changed phase 91213177Sgibbs */ 91313177Sgibbs mvi INTSTAT, MSGIN_PHASEMIS 91413177Sgibbs jmp ITloop 9154568Sgibbs 91613177Sgibbs/* 91713177Sgibbs * DMA data transfer. HADDR and HCNT must be loaded first, and 91813177Sgibbs * SINDEX should contain the value to load DFCNTRL with - 0x3d for 91913177Sgibbs * host->scsi, or 0x39 for scsi->host. The SCSI channel is cleared 92013177Sgibbs * during initialization. 92113177Sgibbs */ 9224568Sgibbsdma: 9234568Sgibbs mov DFCNTRL,SINDEX 9244568Sgibbsdma1: 92513177Sgibbs test SSTAT0,DMADONE jnz dma3 92613177Sgibbs test SSTAT1,PHASEMIS jz dma1 /* ie. underrun */ 9274568Sgibbs 92813177Sgibbs/* 92913177Sgibbs * We will be "done" DMAing when the transfer count goes to zero, or 93013177Sgibbs * the target changes the phase (in light of this, it makes sense that 93113177Sgibbs * the DMA circuitry doesn't ACK when PHASEMIS is active). If we are 93213177Sgibbs * doing a SCSI->Host transfer, the data FIFO should be flushed auto- 93313177Sgibbs * magically on STCNT=0 or a phase change, so just wait for FIFO empty 93413177Sgibbs * status. 93513177Sgibbs */ 9364568Sgibbsdma3: 93713177Sgibbs test SINDEX,DIRECTION jnz dma5 9384568Sgibbsdma4: 93913177Sgibbs test DFSTATUS,FIFOEMP jz dma4 9404568Sgibbs 94113177Sgibbs/* 94213177Sgibbs * Now shut the DMA enables off and make sure that the DMA enables are 94313177Sgibbs * actually off first lest we get an ILLSADDR. 94413177Sgibbs */ 9454568Sgibbsdma5: 94613177Sgibbs /* disable DMA, but maintain WIDEODD */ 94713690Sgibbs and DFCNTRL,WIDEODD 9484568Sgibbsdma6: 94913177Sgibbs test DFCNTRL,0x38 jnz dma6 /* SCSIENACK|SDMAENACK|HDMAENACK */ 9504568Sgibbs 9514568Sgibbs ret 9524568Sgibbs 95313177Sgibbs/* 95413177Sgibbs * Common SCSI initialization for selection and reselection. Expects 95513177Sgibbs * the target SCSI ID to be in the upper four bits of SINDEX, and A's 95613177Sgibbs * contents are stomped on return. 95713177Sgibbs */ 9588104Sgibbsinitialize_scsiid: 95913177Sgibbs and SINDEX,0xf0 /* Get target ID */ 9605775Sgibbs and A,0x0f,SCSIID 9615775Sgibbs or SINDEX,A 9628104Sgibbs mov SCSIID,SINDEX ret 9635326Sgibbs 96413177Sgibbs/* 96513177Sgibbs * Assert that if we've been reselected, then we've seen an IDENTIFY 96613177Sgibbs * message. 96713177Sgibbs */ 9684568Sgibbsassert: 96913177Sgibbs test FLAGS,RESELECTED jz return /* reselected? */ 97013177Sgibbs test FLAGS,IDENTIFY_SEEN jnz return /* seen IDENTIFY? */ 9714568Sgibbs 97213177Sgibbs mvi INTSTAT,NO_IDENT ret /* no - cause a kernel panic */ 9734568Sgibbs 97413177Sgibbs/* 97515328Sgibbs * Locate the SCB matching the target ID/channel/lun in SAVED_TCL, and the tag 97615328Sgibbs * value in ARG_1. If ARG_1 == SCB_LIST_NULL, we're looking for a non-tagged 97715328Sgibbs * SCB. Have the kernel print a warning message if it can't be found, and 97815328Sgibbs * generate an ABORT/ABORT_TAG message to the target. SINDEX should be 97913177Sgibbs * cleared on call. 98013177Sgibbs */ 9814568SgibbsfindSCB: 9826608Sgibbs mov A,SAVED_TCL 98315328Sgibbs mov SCBPTR,SINDEX /* switch to next SCB */ 98415328Sgibbs mvi SEQCTL,0x50 /* PAUSEDIS|FASTMODE */ 98513177Sgibbs cmp SCB_TCL,A jne findSCB1 /* target ID/channel/lun match? */ 98613177Sgibbs test SCB_CONTROL,DISCONNECTED jz findSCB1 /*should be disconnected*/ 98715328Sgibbs test SCB_CONTROL,TAG_ENB jnz findTaggedSCB 98815328Sgibbs cmp ARG_1,SCB_LIST_NULL je foundSCB 98915328Sgibbs jmp findSCB1 99015328SgibbsfindTaggedSCB: 99115328Sgibbs mov A, ARG_1 /* Tag passed in ARG_1 */ 99215328Sgibbs cmp SCB_TAG,A jne findSCB1 /* Found it? */ 99315328SgibbsfoundSCB: 99415328Sgibbs test FLAGS,PAGESCBS jz foundSCB_ret 99515328Sgibbs/* Remove this SCB from the disconnection list */ 99615328Sgibbs cmp SCB_NEXT,SCB_LIST_NULL je unlink_prev 99715328Sgibbs mov SAVED_LINKPTR, SCB_PREV 99815328Sgibbs mov SCBPTR, SCB_NEXT 99915328Sgibbs mov SCB_PREV, SAVED_LINKPTR 100015328Sgibbs mov SCBPTR, SINDEX 100115328Sgibbsunlink_prev: 100215328Sgibbs cmp SCB_PREV,SCB_LIST_NULL je rHead/* At the head of the list */ 100315328Sgibbs mov SAVED_LINKPTR, SCB_NEXT 100415328Sgibbs mov SCBPTR, SCB_PREV 100515328Sgibbs mov SCB_NEXT, SAVED_LINKPTR 100615328Sgibbs mov SCBPTR, SINDEX 100715328Sgibbs mvi SEQCTL,0x10 ret /* !PAUSEDIS|FASTMODE */ 100815328SgibbsrHead: 100915328Sgibbs mov DISCONNECTED_SCBH,SCB_NEXT 101015328SgibbsfoundSCB_ret: 101115328Sgibbs mvi SEQCTL,0x10 ret /* !PAUSEDIS|FASTMODE */ 10124568Sgibbs 10136608SgibbsfindSCB1: 101415328Sgibbs mvi SEQCTL,0x10 /* !PAUSEDIS|FASTMODE */ 10154568Sgibbs inc SINDEX 10164568Sgibbs mov A,SCBCOUNT 10176608Sgibbs cmp SINDEX,A jne findSCB 10184568Sgibbs 101913177Sgibbs mvi INTSTAT,NO_MATCH /* not found - signal kernel */ 102015328Sgibbs cmp RETURN_1,SCB_PAGEDIN je return 102115328Sgibbs or SCSISIGO,ATNO /* assert ATNO */ 102215328Sgibbs cmp ARG_1,SCB_LIST_NULL jne find_abort_tag 102315328Sgibbs mvi MSG_ABORT call mk_mesg 102415328Sgibbs jmp ITloop 102515328Sgibbsfind_abort_tag: 102615328Sgibbs mvi MSG_ABORT_TAG call mk_mesg 102715328Sgibbs jmp ITloop 10284568Sgibbs 102913177Sgibbs/* 103013177Sgibbs * Make a working copy of the scatter-gather parameters from the SCB. 103113177Sgibbs */ 10324568Sgibbssg_scb2ram: 103313690Sgibbs mov HADDR0, SCB_DATAPTR0 103413690Sgibbs mov HADDR1, SCB_DATAPTR1 103513690Sgibbs mov HADDR2, SCB_DATAPTR2 103613690Sgibbs mov HADDR3, SCB_DATAPTR3 103713690Sgibbs mov HCNT0, SCB_DATACNT0 103813690Sgibbs mov HCNT1, SCB_DATACNT1 103913690Sgibbs mov HCNT2, SCB_DATACNT2 10409928Sgibbs 104113690Sgibbs mov STCNT0, HCNT0 104213690Sgibbs mov STCNT1, HCNT1 104313690Sgibbs mov STCNT2, HCNT2 10449928Sgibbs 104513177Sgibbs mov SG_COUNT,SCB_SGCOUNT 10464568Sgibbs 104713690Sgibbs mov SG_NEXT0, SCB_SGPTR0 104813690Sgibbs mov SG_NEXT1, SCB_SGPTR1 104913690Sgibbs mov SG_NEXT2, SCB_SGPTR2 105013690Sgibbs mov SG_NEXT3, SCB_SGPTR3 ret 10514568Sgibbs 105213177Sgibbs/* 105313177Sgibbs * Copying RAM values back to SCB, for Save Data Pointers message, but 105413177Sgibbs * only if we've actually been into a data phase to change them. This 105513177Sgibbs * protects against bogus data in scratch ram and the residual counts 105613177Sgibbs * since they are only initialized when we go into data_in or data_out. 105713177Sgibbs */ 10584568Sgibbssg_ram2scb: 10599928Sgibbs test FLAGS, DPHASE jz return 106013177Sgibbs mov SCB_SGCOUNT,SG_COUNT 10614568Sgibbs 106213690Sgibbs mov SCB_SGPTR0,SG_NEXT0 106313690Sgibbs mov SCB_SGPTR1,SG_NEXT1 106413690Sgibbs mov SCB_SGPTR2,SG_NEXT2 106513690Sgibbs mov SCB_SGPTR3,SG_NEXT3 10669928Sgibbs 106713690Sgibbs mov SCB_DATAPTR0,SHADDR0 106813690Sgibbs mov SCB_DATAPTR1,SHADDR1 106913690Sgibbs mov SCB_DATAPTR2,SHADDR2 107013690Sgibbs mov SCB_DATAPTR3,SHADDR3 10714568Sgibbs 107213177Sgibbs/* 107313177Sgibbs * Use the residual number since STCNT is corrupted by any message transfer 107413177Sgibbs */ 107513690Sgibbs mov SCB_DATACNT0,SCB_RESID_DCNT0 107613690Sgibbs mov SCB_DATACNT1,SCB_RESID_DCNT1 107713690Sgibbs mov SCB_DATACNT2,SCB_RESID_DCNT2 ret 10784568Sgibbs 107913177Sgibbs/* 108013177Sgibbs * Add the array base TARG_SCRATCH to the target offset (the target address 108113177Sgibbs * is in SCSIID), and return the result in SINDEX. The accumulator 108213177Sgibbs * contains the 3->8 decoding of the target ID on return. 108313177Sgibbs */ 10845562Sgibbsndx_dtr: 10854568Sgibbs shr A,SCSIID,4 108613177Sgibbs test SBLKCTL,SELBUSB jz ndx_dtr_2 108713177Sgibbs or A,0x08 /* Channel B entries add 8 */ 10885562Sgibbsndx_dtr_2: 108913690Sgibbs add SINDEX,TARG_SCRATCH,A ret 10904568Sgibbs 109113177Sgibbs/* 109213177Sgibbs * If we need to negotiate transfer parameters, build the WDTR or SDTR message 109313177Sgibbs * starting at the address passed in SINDEX. DINDEX is modified on return. 109413177Sgibbs * The SCSI-II spec requires that Wide negotiation occur first and you can 109513177Sgibbs * only negotiat one or the other at a time otherwise in the event of a message 109613177Sgibbs * reject, you wouldn't be able to tell which message was the culpret. 109713177Sgibbs */ 10985562Sgibbsmk_dtr: 109913177Sgibbs test SCB_CONTROL,NEEDWDTR jnz mk_wdtr_16bit 110015328Sgibbs mvi ARG_1, MAXOFFSET /* Force an offset of 15 or 8 if WIDE */ 11014568Sgibbs 11027532Sgibbsmk_sdtr: 110313177Sgibbs mvi DINDIR,1 /* extended message */ 110413177Sgibbs mvi DINDIR,3 /* extended message length = 3 */ 110513177Sgibbs mvi DINDIR,1 /* SDTR code */ 11067532Sgibbs call sdtr_to_rate 110713177Sgibbs mov DINDIR,RETURN_1 /* REQ/ACK transfer period */ 110815328Sgibbs cmp ARG_1, MAXOFFSET je mk_sdtr_max_offset 110913177Sgibbs and DINDIR,0x0f,SINDIR /* Sync Offset */ 11107532Sgibbs 11117532Sgibbsmk_sdtr_done: 111213177Sgibbs add MSG_LEN,COMP_MSG0,DINDEX ret /* update message length */ 11137532Sgibbs 11148567Sdgmk_sdtr_max_offset: 111513177Sgibbs/* 111613177Sgibbs * We're initiating sync negotiation, so request the max offset we can (15 or 8) 111713177Sgibbs */ 111813177Sgibbs /* Talking to a WIDE device? */ 111913177Sgibbs test SCSIRATE, WIDEXFER jnz wmax_offset 11208567Sdg mvi DINDIR, MAX_OFFSET_8BIT 11217532Sgibbs jmp mk_sdtr_done 11227532Sgibbs 11238567Sdgwmax_offset: 112413177Sgibbs mvi DINDIR, MAX_OFFSET_16BIT 11258567Sdg jmp mk_sdtr_done 11268567Sdg 11275647Sgibbsmk_wdtr_16bit: 11285647Sgibbs mvi ARG_1,BUS_16_BIT 11295562Sgibbsmk_wdtr: 113013177Sgibbs mvi DINDIR,1 /* extended message */ 113113177Sgibbs mvi DINDIR,2 /* extended message length = 2 */ 113213177Sgibbs mvi DINDIR,3 /* WDTR code */ 113313177Sgibbs mov DINDIR,ARG_1 /* bus width */ 11345562Sgibbs 113513177Sgibbs add MSG_LEN,COMP_MSG0,DINDEX ret /* update message length */ 11365562Sgibbs 11375562Sgibbssdtr_to_rate: 113813177Sgibbs call ndx_dtr /* index scratch space for target */ 11395562Sgibbs shr A,SINDIR,0x4 114013177Sgibbs dec SINDEX /* Preserve SINDEX */ 11415562Sgibbs and A,0x7 11425562Sgibbs clr RETURN_1 11435562Sgibbssdtr_to_rate_loop: 11445562Sgibbs test A,0x0f jz sdtr_to_rate_done 114513177Sgibbs add RETURN_1,0x19 11465562Sgibbs dec A 11475562Sgibbs jmp sdtr_to_rate_loop 11485562Sgibbssdtr_to_rate_done: 11495562Sgibbs shr RETURN_1,0x2 115013177Sgibbs add RETURN_1,0x19 115111829Sgibbs test SXFRCTL0,ULTRAEN jz return 115211829Sgibbs shr RETURN_1,0x1 11537532Sgibbsreturn: 11547532Sgibbs ret 1155