cvmx-smi-defs.h revision 232812
1/***********************license start*************** 2 * Copyright (c) 2003-2012 Cavium Inc. (support@cavium.com). All rights 3 * reserved. 4 * 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 13 * * Redistributions in binary form must reproduce the above 14 * copyright notice, this list of conditions and the following 15 * disclaimer in the documentation and/or other materials provided 16 * with the distribution. 17 18 * * Neither the name of Cavium Inc. nor the names of 19 * its contributors may be used to endorse or promote products 20 * derived from this software without specific prior written 21 * permission. 22 23 * This Software, including technical data, may be subject to U.S. export control 24 * laws, including the U.S. Export Administration Act and its associated 25 * regulations, and may be subject to export or import regulations in other 26 * countries. 27 28 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29 * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR 30 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32 * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38 ***********************license end**************************************/ 39 40 41/** 42 * cvmx-smi-defs.h 43 * 44 * Configuration and status register (CSR) type definitions for 45 * Octeon smi. 46 * 47 * This file is auto generated. Do not edit. 48 * 49 * <hr>$Revision$<hr> 50 * 51 */ 52#ifndef __CVMX_SMI_DEFS_H__ 53#define __CVMX_SMI_DEFS_H__ 54 55#if CVMX_ENABLE_CSR_ADDRESS_CHECKING 56#define CVMX_SMI_DRV_CTL CVMX_SMI_DRV_CTL_FUNC() 57static inline uint64_t CVMX_SMI_DRV_CTL_FUNC(void) 58{ 59 if (!(OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))) 60 cvmx_warn("CVMX_SMI_DRV_CTL not supported on this chip\n"); 61 return CVMX_ADD_IO_SEG(0x0001180000001828ull); 62} 63#else 64#define CVMX_SMI_DRV_CTL (CVMX_ADD_IO_SEG(0x0001180000001828ull)) 65#endif 66 67/** 68 * cvmx_smi_drv_ctl 69 * 70 * SMI_DRV_CTL = SMI Drive Strength Control 71 * 72 */ 73union cvmx_smi_drv_ctl { 74 uint64_t u64; 75 struct cvmx_smi_drv_ctl_s { 76#ifdef __BIG_ENDIAN_BITFIELD 77 uint64_t reserved_14_63 : 50; 78 uint64_t pctl : 6; /**< PCTL Drive strength control bits 79 Assuming a 50ohm termination 80 3.3v supply = 19 81 2.5v supply = TBD */ 82 uint64_t reserved_6_7 : 2; 83 uint64_t nctl : 6; /**< NCTL Drive strength control bits 84 Assuming a 50ohm termination 85 3.3v supply = 15 86 2.5v supply = TBD */ 87#else 88 uint64_t nctl : 6; 89 uint64_t reserved_6_7 : 2; 90 uint64_t pctl : 6; 91 uint64_t reserved_14_63 : 50; 92#endif 93 } s; 94 struct cvmx_smi_drv_ctl_s cn61xx; 95 struct cvmx_smi_drv_ctl_s cn63xx; 96 struct cvmx_smi_drv_ctl_s cn63xxp1; 97 struct cvmx_smi_drv_ctl_s cn66xx; 98 struct cvmx_smi_drv_ctl_s cn68xx; 99 struct cvmx_smi_drv_ctl_s cn68xxp1; 100 struct cvmx_smi_drv_ctl_s cnf71xx; 101}; 102typedef union cvmx_smi_drv_ctl cvmx_smi_drv_ctl_t; 103 104#endif 105