acgcc.h revision 70243
1235368Sgnn/****************************************************************************** 2235368Sgnn * 3235368Sgnn * Name: acgcc.h - GCC specific defines, etc. 4235368Sgnn * $Revision: 3 $ 5235368Sgnn * 6235368Sgnn *****************************************************************************/ 7235368Sgnn 8235368Sgnn/****************************************************************************** 9235368Sgnn * 10235368Sgnn * 1. Copyright Notice 11235368Sgnn * 12235368Sgnn * Some or all of this work - Copyright (c) 1999, 2000, Intel Corp. 13235368Sgnn * All rights reserved. 14235368Sgnn * 15235368Sgnn * 2. License 16235368Sgnn * 17235368Sgnn * 2.1. This is your license from Intel Corp. under its intellectual property 18235368Sgnn * rights. You may have additional license terms from the party that provided 19235368Sgnn * you this software, covering your right to use that party's intellectual 20235368Sgnn * property rights. 21235368Sgnn * 22235368Sgnn * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 23235368Sgnn * copy of the source code appearing in this file ("Covered Code") an 24235368Sgnn * irrevocable, perpetual, worldwide license under Intel's copyrights in the 25235368Sgnn * base code distributed originally by Intel ("Original Intel Code") to copy, 26235368Sgnn * make derivatives, distribute, use and display any portion of the Covered 27235368Sgnn * Code in any form, with the right to sublicense such rights; and 28235368Sgnn * 29235368Sgnn * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 30235368Sgnn * license (with the right to sublicense), under only those claims of Intel 31235368Sgnn * patents that are infringed by the Original Intel Code, to make, use, sell, 32235368Sgnn * offer to sell, and import the Covered Code and derivative works thereof 33235368Sgnn * solely to the minimum extent necessary to exercise the above copyright 34235368Sgnn * license, and in no event shall the patent license extend to any additions 35235368Sgnn * to or modifications of the Original Intel Code. No other license or right 36235368Sgnn * is granted directly or by implication, estoppel or otherwise; 37235368Sgnn * 38235368Sgnn * The above copyright and patent license is granted only if the following 39235368Sgnn * conditions are met: 40235368Sgnn * 41235368Sgnn * 3. Conditions 42235368Sgnn * 43235368Sgnn * 3.1. Redistribution of Source with Rights to Further Distribute Source. 44235368Sgnn * Redistribution of source code of any substantial portion of the Covered 45235368Sgnn * Code or modification with rights to further distribute source must include 46235368Sgnn * the above Copyright Notice, the above License, this list of Conditions, 47235368Sgnn * and the following Disclaimer and Export Compliance provision. In addition, 48235368Sgnn * Licensee must cause all Covered Code to which Licensee contributes to 49235368Sgnn * contain a file documenting the changes Licensee made to create that Covered 50235368Sgnn * Code and the date of any change. Licensee must include in that file the 51235368Sgnn * documentation of any changes made by any predecessor Licensee. Licensee 52235368Sgnn * must include a prominent statement that the modification is derived, 53235368Sgnn * directly or indirectly, from Original Intel Code. 54235368Sgnn * 55235368Sgnn * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 56235368Sgnn * Redistribution of source code of any substantial portion of the Covered 57235368Sgnn * Code or modification without rights to further distribute source must 58235368Sgnn * include the following Disclaimer and Export Compliance provision in the 59235368Sgnn * documentation and/or other materials provided with distribution. In 60235368Sgnn * addition, Licensee may not authorize further sublicense of source of any 61235368Sgnn * portion of the Covered Code, and must include terms to the effect that the 62235368Sgnn * license from Licensee to its licensee is limited to the intellectual 63235368Sgnn * property embodied in the software Licensee provides to its licensee, and 64235368Sgnn * not to intellectual property embodied in modifications its licensee may 65235368Sgnn * make. 66235368Sgnn * 67235368Sgnn * 3.3. Redistribution of Executable. Redistribution in executable form of any 68235368Sgnn * substantial portion of the Covered Code or modification must reproduce the 69235368Sgnn * above Copyright Notice, and the following Disclaimer and Export Compliance 70235368Sgnn * provision in the documentation and/or other materials provided with the 71235368Sgnn * distribution. 72235368Sgnn * 73235368Sgnn * 3.4. Intel retains all right, title, and interest in and to the Original 74235368Sgnn * Intel Code. 75235368Sgnn * 76235368Sgnn * 3.5. Neither the name Intel nor any other trademark owned or controlled by 77235368Sgnn * Intel shall be used in advertising or otherwise to promote the sale, use or 78235368Sgnn * other dealings in products derived from or relating to the Covered Code 79235368Sgnn * without prior written authorization from Intel. 80235368Sgnn * 81235368Sgnn * 4. Disclaimer and Export Compliance 82235368Sgnn * 83235368Sgnn * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 84235368Sgnn * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 85235368Sgnn * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 86235368Sgnn * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 87235368Sgnn * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 88235368Sgnn * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 89235368Sgnn * PARTICULAR PURPOSE. 90235368Sgnn * 91235368Sgnn * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 92235368Sgnn * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 93235368Sgnn * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 94235368Sgnn * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 95235368Sgnn * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 96235368Sgnn * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 97235368Sgnn * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 98235368Sgnn * LIMITED REMEDY. 99235368Sgnn * 100235368Sgnn * 4.3. Licensee shall not export, either directly or indirectly, any of this 101235368Sgnn * software or system incorporating such software without first obtaining any 102235368Sgnn * required license or other approval from the U. S. Department of Commerce or 103235368Sgnn * any other agency or department of the United States Government. In the 104235368Sgnn * event Licensee exports any such software from the United States or 105235368Sgnn * re-exports any such software from a foreign destination, Licensee shall 106235368Sgnn * ensure that the distribution and export/re-export of the software is in 107235368Sgnn * compliance with all laws, regulations, orders, or other restrictions of the 108235368Sgnn * U.S. Export Administration Regulations. Licensee agrees that neither it nor 109235368Sgnn * any of its subsidiaries will export/re-export any technical data, process, 110235368Sgnn * software, or service, directly or indirectly, to any country for which the 111235368Sgnn * United States government or any agency thereof requires an export license, 112235368Sgnn * other governmental approval, or letter of assurance, without first obtaining 113235368Sgnn * such license, approval or letter. 114235368Sgnn * 115235368Sgnn *****************************************************************************/ 116235368Sgnn 117235368Sgnn#ifndef __ACGCC_H__ 118235368Sgnn#define __ACGCC_H__ 119235368Sgnn 120235368Sgnn#define COMPILER_DEPENDENT_UINT64 unsigned long long 121235368Sgnn 122235368Sgnn 123235368Sgnn#ifdef __ia64__ 124235368Sgnn#define _IA64 125235368Sgnn 126235368Sgnn/* Single threaded */ 127235368Sgnn#define ACPI_APPLICATION 128235368Sgnn 129235368Sgnn#define ACPI_ASM_MACROS 130235368Sgnn#define causeinterrupt(level) 131235368Sgnn#define BREAKPOINT3 132235368Sgnn#define disable() __cli() 133235368Sgnn#define enable() __sti() 134235368Sgnn#define wbinvd() 135235368Sgnn 136235368Sgnn/*! [Begin] no source code translation */ 137235368Sgnn 138235368Sgnn#include <asm/pal.h> 139235368Sgnn 140235368Sgnn#define halt() ia64_pal_halt_light() /* PAL_HALT[_LIGHT] */ 141235368Sgnn#define safe_halt() ia64_pal_halt(1) /* PAL_HALT */ 142235368Sgnn 143235368Sgnn 144235368Sgnn#define ACPI_ACQUIRE_GLOBAL_LOCK(GLptr, Acq) \ 145235368Sgnn do { \ 146235368Sgnn __asm__ volatile ("1: ld4 r29=%1\n" \ 147235368Sgnn ";;\n" \ 148235368Sgnn "mov ar.ccv=r29\n" \ 149235368Sgnn "mov r2=r29\n" \ 150235368Sgnn "shr.u r30=r29,1\n" \ 151235368Sgnn "and r29=-4,r29\n" \ 152235368Sgnn ";;\n" \ 153235368Sgnn "add r29=2,r29\n" \ 154235368Sgnn "and r30=1,r30\n" \ 155235368Sgnn ";;\n" \ 156235368Sgnn "add r29=r29,r30\n" \ 157235368Sgnn ";;\n" \ 158235368Sgnn "cmpxchg4.acq r30=%1,r29,ar.ccv\n" \ 159235368Sgnn ";;\n" \ 160235368Sgnn "cmp.eq p6,p7=r2,r30\n" \ 161235368Sgnn "(p7) br.dpnt.few 1b\n" \ 162235368Sgnn "cmp.gt p8,p9=3,r29\n" \ 163235368Sgnn ";;\n" \ 164235368Sgnn "(p8) mov %0=-1\n" \ 165235368Sgnn "(p9) mov %0=r0\n" \ 166235368Sgnn :"=r"(Acq):"m"(GLptr):"r2","r29","r30","memory"); \ 167235368Sgnn } while (0) 168235368Sgnn 169235368Sgnn#define ACPI_RELEASE_GLOBAL_LOCK(GLptr, Acq) \ 170235368Sgnn do { \ 171235368Sgnn __asm__ volatile ("1: ld4 r29=%1\n" \ 172235368Sgnn ";;\n" \ 173235368Sgnn "mov ar.ccv=r29\n" \ 174235368Sgnn "mov r2=r29\n" \ 175235368Sgnn "and r29=-4,r29\n" \ 176235368Sgnn ";;\n" \ 177235368Sgnn "cmpxchg4.acq r30=%1,r29,ar.ccv\n" \ 178235368Sgnn ";;\n" \ 179235368Sgnn "cmp.eq p6,p7=r2,r30\n" \ 180235368Sgnn "(p7) br.dpnt.few 1b\n" \ 181235368Sgnn "and %0=1,r2\n" \ 182235368Sgnn ";;\n" \ 183235368Sgnn :"=r"(Acq):"m"(GLptr):"r2","r29","r30","memory"); \ 184235368Sgnn } while (0) 185235368Sgnn/*! [End] no source code translation !*/ 186235368Sgnn 187235368Sgnn 188235368Sgnn#else /* DO IA32 */ 189235368Sgnn 190235368Sgnn 191235368Sgnn#define ACPI_ASM_MACROS 192235368Sgnn#define causeinterrupt(level) 193235368Sgnn#define BREAKPOINT3 194235368Sgnn#define disable() __cli() 195235368Sgnn#define enable() __sti() 196235368Sgnn#define halt() __asm__ __volatile__ ("sti; hlt":::"memory") 197235368Sgnn#define wbinvd() 198235368Sgnn 199235368Sgnn/*! [Begin] no source code translation 200235368Sgnn * 201235368Sgnn * A brief explanation as GNU inline assembly is a bit hairy 202235368Sgnn * %0 is the output parameter in EAX ("=a") 203235368Sgnn * %1 and %2 are the input parameters in ECX ("c") 204235368Sgnn * and an immediate value ("i") respectively 205235368Sgnn * All actual register references are preceded with "%%" as in "%%edx" 206235368Sgnn * Immediate values in the assembly are preceded by "$" as in "$0x1" 207235368Sgnn * The final asm parameter are the operation altered non-output registers. 208235368Sgnn */ 209235368Sgnn#define ACPI_ACQUIRE_GLOBAL_LOCK(GLptr, Acq) \ 210235368Sgnn do { \ 211235368Sgnn int dummy; \ 212235368Sgnn asm("1: movl (%1),%%eax;" \ 213235368Sgnn "movl %%eax,%%edx;" \ 214235368Sgnn "andl %2,%%edx;" \ 215235368Sgnn "btsl $0x1,%%edx;" \ 216235368Sgnn "adcl $0x0,%%edx;" \ 217235368Sgnn "lock; cmpxchgl %%edx,(%1);" \ 218235368Sgnn "jnz 1b;" \ 219235368Sgnn "cmpb $0x3,%%dl;" \ 220235368Sgnn "sbbl %%eax,%%eax" \ 221235368Sgnn :"=a"(Acq),"=c"(dummy):"c"(GLptr),"i"(~1L):"dx"); \ 222235368Sgnn } while(0) 223235368Sgnn 224235368Sgnn#define ACPI_RELEASE_GLOBAL_LOCK(GLptr, Acq) \ 225235368Sgnn do { \ 226235368Sgnn int dummy; \ 227235368Sgnn asm("1: movl (%1),%%eax;" \ 228235368Sgnn "movl %%eax,%%edx;" \ 229235368Sgnn "andl %2,%%edx;" \ 230235368Sgnn "lock; cmpxchgl %%edx,(%1);" \ 231235368Sgnn "jnz 1b;" \ 232235368Sgnn "andl $0x1,%%eax" \ 233235368Sgnn :"=a"(Acq),"=c"(dummy):"c"(GLptr),"i"(~3L):"dx"); \ 234235368Sgnn } while(0) 235235368Sgnn 236235368Sgnn/*! [End] no source code translation !*/ 237235368Sgnn 238235368Sgnn#endif /* IA 32 */ 239235368Sgnn 240235368Sgnn#endif /* __ACGCC_H__ */ 241235368Sgnn