1208561Sraj$FreeBSD: releng/10.2/sys/boot/fdt/dts/bindings-gpio.txt 266105 2014-05-15 01:27:53Z loos $
2208561Sraj
3208561SrajGPIO configuration.
4208561Sraj===================
5208561Sraj
6208561Sraj1. Properties for GPIO Controllers
7208561Sraj
8208561Sraj1.1 #gpio-cells
9208561Sraj
10208561SrajProperty:	#gpio-cells
11208561Sraj
12208561SrajValue type:	<u32>
13208561Sraj
14208561SrajDescription:	The #gpio-cells property defines the number of cells required
15208561Sraj		to encode a gpio specifier.
16208561Sraj
17208561Sraj
18208561Sraj1.2 gpio-controller
19208561Sraj
20208561SrajProperty:	gpio-controller
21208561Sraj
22208561SrajValue type:	<empty>
23208561Sraj
24208561SrajDescription:	The presence of a gpio-controller property defines a node as a
25208561Sraj		GPIO controller node.
26208561Sraj
27208561Sraj
28208561Sraj1.3 pin-count
29208561Sraj
30208561SrajProperty:	pin-count
31208561Sraj
32208561SrajValue type:	<u32>
33208561Sraj
34208561SrajDescription:	The pin-count property defines the number of GPIO pins.
35208561Sraj
36208561Sraj
37208561Sraj1.4 Example
38208561Sraj
39208561Sraj	GPIO: gpio@10100 {
40208561Sraj		#gpio-cells = <3>;
41208561Sraj		compatible = "mrvl,gpio";
42208561Sraj		reg = <0x10100 0x20>;
43208561Sraj		gpio-controller;
44208561Sraj		interrupts = <6 7 8 9>;
45208561Sraj		interrupt-parent = <&PIC>;
46208561Sraj		pin-count = <50>
47208561Sraj	};
48208561Sraj
49208561Sraj2. Properties for GPIO consumer nodes.
50208561Sraj
51208561Sraj2.1 gpios
52208561Sraj
53208561SrajProperty:	gpios
54208561Sraj
55208561SrajValue type:	<prop-encoded-array> encoded as arbitrary number of GPIO
56208561Sraj		specifiers.
57208561Sraj
58208561SrajDescription:	The gpios property of a device node defines the GPIO or GPIOs
59208561Sraj		that are used by the device. The value of the gpios property
60208561Sraj		consists of an arbitrary number of GPIO specifiers.
61208561Sraj		
62208561Sraj		The first cell of the GPIO specifier is phandle of the node's
63208561Sraj		parent GPIO controller and remaining cells are defined by the
64208561Sraj		binding describing the GPIO parent, typically include
65208561Sraj		information like pin number, direction and various flags.
66208561Sraj
67208561SrajExample:
68208561Sraj		gpios = <&GPIO 0 1 0		/* GPIO[0]:  IN,  NONE */
69208561Sraj			 &GPIO 1 2 0>;		/* GPIO[1]:  OUT, NONE */
70208561Sraj
71208561Sraj
72208561Sraj3. "mrvl,gpio" controller GPIO specifier
73208561Sraj
74208561Sraj	<phandle pin dir flags>
75208561Sraj
76208561Sraj
77208561Srajpin:	0-MAX				GPIO pin number.
78208561Sraj
79208561Srajdir:
80208561Sraj	1		IN		Input direction.
81208561Sraj	2		OUT		Output direction.
82208561Sraj
83208561Srajflags:
84208561Sraj	0x0000----	IN_NONE
85266105Sloos	0x0001----	IN_POL_LOW	Polarity low (active-low).
86208561Sraj	0x0002----	IN_IRQ_EDGE	Interrupt, edge triggered.
87208561Sraj	0x0004----	IN_IRQ_LEVEL	Interrupt, level triggered.
88208561Sraj	
89208561Sraj	0x----0000	OUT_NONE
90208561Sraj	0x----0001	OUT_BLINK	Blink on the pin.
91208561Sraj	0x----0002	OUT_OPEN_DRAIN	Open drain output line.
92208561Sraj	0x----0004	OUT_OPEN_SRC	Open source output line.
93208561Sraj
94208561Sraj
95208561SrajExample:
96208561Sraj	gpios = <&GPIO 0  1 0x00000000		/* GPIO[0]:   IN */
97208561Sraj		 &GPIO 1  2 0x00000000		/* GPIO[1]:   OUT */
98208561Sraj		 &GPIO 2  1 0x00020000		/* GPIO[2]:   IN, IRQ (edge) */
99208561Sraj		 &GPIO 3  1 0x00040000		/* GPIO[3]:   IN, IRQ (level) */
100208561Sraj		 ...
101208561Sraj		 &GPIO 10 2 0x00000001>;	/* GPIO[10]:  OUT, blink */
102