1227506Smarcel/* 2227506Smarcel * P3041DS Device Tree Source 3227506Smarcel * 4227506Smarcel * Copyright 2010-2011 Freescale Semiconductor Inc. 5227506Smarcel * 6227506Smarcel * Redistribution and use in source and binary forms, with or without 7227506Smarcel * modification, are permitted provided that the following conditions are met: 8227506Smarcel * * Redistributions of source code must retain the above copyright 9227506Smarcel * notice, this list of conditions and the following disclaimer. 10227506Smarcel * * Redistributions in binary form must reproduce the above copyright 11227506Smarcel * notice, this list of conditions and the following disclaimer in the 12227506Smarcel * documentation and/or other materials provided with the distribution. 13227506Smarcel * * Neither the name of Freescale Semiconductor nor the 14227506Smarcel * names of its contributors may be used to endorse or promote products 15227506Smarcel * derived from this software without specific prior written permission. 16227506Smarcel * 17227506Smarcel * 18227506Smarcel * ALTERNATIVELY, this software may be distributed under the terms of the 19227506Smarcel * GNU General Public License ("GPL") as published by the Free Software 20227506Smarcel * Foundation, either version 2 of that License or (at your option) any 21227506Smarcel * later version. 22227506Smarcel * 23227506Smarcel * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24227506Smarcel * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25227506Smarcel * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26227506Smarcel * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27227506Smarcel * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28227506Smarcel * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29227506Smarcel * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30227506Smarcel * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31227506Smarcel * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32227506Smarcel * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33227506Smarcel */ 34227506Smarcel/* $FreeBSD: releng/10.2/sys/boot/fdt/dts/arm/p3041ds.dts 262614 2014-02-28 18:29:09Z imp $ */ 35227506Smarcel 36236024Sraj/include/ "p3041si.dtsi" 37227506Smarcel 38227506Smarcel/ { 39227506Smarcel model = "fsl,P3041DS"; 40227506Smarcel compatible = "fsl,P3041DS"; 41227506Smarcel #address-cells = <2>; 42227506Smarcel #size-cells = <2>; 43227506Smarcel interrupt-parent = <&mpic>; 44227506Smarcel 45227506Smarcel aliases { 46236024Sraj phy_rgmii_0 = &phy_rgmii_0; 47236024Sraj phy_rgmii_1 = &phy_rgmii_1; 48236024Sraj phy_sgmii_1c = &phy_sgmii_1c; 49236024Sraj phy_sgmii_1d = &phy_sgmii_1d; 50236024Sraj phy_sgmii_1e = &phy_sgmii_1e; 51236024Sraj phy_sgmii_1f = &phy_sgmii_1f; 52236024Sraj phy_xgmii_1 = &phy_xgmii_1; 53236024Sraj phy_xgmii_2 = &phy_xgmii_2; 54236024Sraj emi1_rgmii = &hydra_mdio_rgmii; 55236024Sraj emi1_sgmii = &hydra_mdio_sgmii; 56236024Sraj emi2_xgmii = &hydra_mdio_xgmii; 57236024Sraj }; 58227506Smarcel 59236024Sraj memory { 60236024Sraj device_type = "memory"; 61236024Sraj reg = <0x00000000 0x00000000 0x00000000 0x80000000>; 62236024Sraj }; 63227506Smarcel 64236024Sraj dcsr: dcsr@f00000000 { 65236024Sraj ranges = <0x00000000 0xf 0x00000000 0x01008000>; 66227506Smarcel }; 67227506Smarcel 68236024Sraj bman-portals@ff4000000 { 69236024Sraj bman-portal@0 { 70236024Sraj cpu-handle = <&cpu0>; 71227506Smarcel }; 72236024Sraj bman-portal@4000 { 73236024Sraj cpu-handle = <&cpu1>; 74227506Smarcel }; 75236024Sraj bman-portal@8000 { 76236024Sraj cpu-handle = <&cpu2>; 77227506Smarcel }; 78236024Sraj bman-portal@c000 { 79236024Sraj cpu-handle = <&cpu3>; 80227506Smarcel }; 81236024Sraj bman-portal@10000 { 82227506Smarcel }; 83236024Sraj bman-portal@14000 { 84227506Smarcel }; 85236024Sraj bman-portal@18000 { 86227506Smarcel }; 87236024Sraj bman-portal@1c000 { 88227506Smarcel }; 89236024Sraj bman-portal@20000 { 90227506Smarcel }; 91236024Sraj bman-portal@24000 { 92227506Smarcel }; 93227506Smarcel 94236024Sraj buffer-pool@0 { 95236024Sraj compatible = "fsl,p3041-bpool", "fsl,bpool"; 96236024Sraj fsl,bpid = <0>; 97236024Sraj fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; 98227506Smarcel }; 99236024Sraj }; 100227506Smarcel 101236024Sraj qman-portals@ff4200000 { 102236024Sraj qportal0: qman-portal@0 { 103236024Sraj cpu-handle = <&cpu0>; 104236024Sraj fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 105236024Sraj &qpool4 &qpool5 &qpool6 106236024Sraj &qpool7 &qpool8 &qpool9 107236024Sraj &qpool10 &qpool11 &qpool12 108236024Sraj &qpool13 &qpool14 &qpool15>; 109227506Smarcel }; 110227506Smarcel 111236024Sraj qportal1: qman-portal@4000 { 112236024Sraj cpu-handle = <&cpu1>; 113236024Sraj fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 114236024Sraj &qpool4 &qpool5 &qpool6 115236024Sraj &qpool7 &qpool8 &qpool9 116236024Sraj &qpool10 &qpool11 &qpool12 117236024Sraj &qpool13 &qpool14 &qpool15>; 118227506Smarcel }; 119227506Smarcel 120236024Sraj qportal2: qman-portal@8000 { 121236024Sraj cpu-handle = <&cpu2>; 122236024Sraj fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 123236024Sraj &qpool4 &qpool5 &qpool6 124236024Sraj &qpool7 &qpool8 &qpool9 125236024Sraj &qpool10 &qpool11 &qpool12 126236024Sraj &qpool13 &qpool14 &qpool15>; 127227506Smarcel }; 128227506Smarcel 129236024Sraj qportal3: qman-portal@c000 { 130236024Sraj cpu-handle = <&cpu3>; 131236024Sraj fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 132236024Sraj &qpool4 &qpool5 &qpool6 133236024Sraj &qpool7 &qpool8 &qpool9 134236024Sraj &qpool10 &qpool11 &qpool12 135236024Sraj &qpool13 &qpool14 &qpool15>; 136227506Smarcel }; 137227506Smarcel 138236024Sraj qportal4: qman-portal@10000 { 139236024Sraj fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 140236024Sraj &qpool4 &qpool5 &qpool6 141236024Sraj &qpool7 &qpool8 &qpool9 142236024Sraj &qpool10 &qpool11 &qpool12 143236024Sraj &qpool13 &qpool14 &qpool15>; 144227506Smarcel }; 145227506Smarcel 146236024Sraj qportal5: qman-portal@14000 { 147236024Sraj fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 148236024Sraj &qpool4 &qpool5 &qpool6 149236024Sraj &qpool7 &qpool8 &qpool9 150236024Sraj &qpool10 &qpool11 &qpool12 151236024Sraj &qpool13 &qpool14 &qpool15>; 152227506Smarcel }; 153227506Smarcel 154236024Sraj qportal6: qman-portal@18000 { 155236024Sraj fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 156236024Sraj &qpool4 &qpool5 &qpool6 157236024Sraj &qpool7 &qpool8 &qpool9 158236024Sraj &qpool10 &qpool11 &qpool12 159236024Sraj &qpool13 &qpool14 &qpool15>; 160227506Smarcel }; 161227506Smarcel 162236024Sraj qportal7: qman-portal@1c000 { 163236024Sraj fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 164236024Sraj &qpool4 &qpool5 &qpool6 165236024Sraj &qpool7 &qpool8 &qpool9 166236024Sraj &qpool10 &qpool11 &qpool12 167236024Sraj &qpool13 &qpool14 &qpool15>; 168227506Smarcel }; 169227506Smarcel 170236024Sraj qportal8: qman-portal@20000 { 171236024Sraj fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 172236024Sraj &qpool4 &qpool5 &qpool6 173236024Sraj &qpool7 &qpool8 &qpool9 174236024Sraj &qpool10 &qpool11 &qpool12 175236024Sraj &qpool13 &qpool14 &qpool15>; 176227506Smarcel }; 177227506Smarcel 178236024Sraj qportal9: qman-portal@24000 { 179236024Sraj fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 180236024Sraj &qpool4 &qpool5 &qpool6 181236024Sraj &qpool7 &qpool8 &qpool9 182236024Sraj &qpool10 &qpool11 &qpool12 183236024Sraj &qpool13 &qpool14 &qpool15>; 184227506Smarcel }; 185236024Sraj }; 186227506Smarcel 187236024Sraj soc: soc@ffe000000 { 188227506Smarcel spi@110000 { 189227506Smarcel flash@0 { 190227506Smarcel #address-cells = <1>; 191227506Smarcel #size-cells = <1>; 192227506Smarcel compatible = "spansion,s25sl12801"; 193227506Smarcel reg = <0>; 194236024Sraj spi-max-frequency = <35000000>; /* input clock */ 195227506Smarcel partition@u-boot { 196227506Smarcel label = "u-boot"; 197227506Smarcel reg = <0x00000000 0x00100000>; 198227506Smarcel read-only; 199227506Smarcel }; 200227506Smarcel partition@kernel { 201227506Smarcel label = "kernel"; 202227506Smarcel reg = <0x00100000 0x00500000>; 203227506Smarcel read-only; 204227506Smarcel }; 205227506Smarcel partition@dtb { 206227506Smarcel label = "dtb"; 207227506Smarcel reg = <0x00600000 0x00100000>; 208227506Smarcel read-only; 209227506Smarcel }; 210227506Smarcel partition@fs { 211227506Smarcel label = "file system"; 212227506Smarcel reg = <0x00700000 0x00900000>; 213227506Smarcel }; 214227506Smarcel }; 215227506Smarcel }; 216227506Smarcel 217227506Smarcel i2c@118100 { 218227506Smarcel eeprom@51 { 219227506Smarcel compatible = "at24,24c256"; 220227506Smarcel reg = <0x51>; 221227506Smarcel }; 222227506Smarcel eeprom@52 { 223227506Smarcel compatible = "at24,24c256"; 224227506Smarcel reg = <0x52>; 225227506Smarcel }; 226227506Smarcel }; 227227506Smarcel 228227506Smarcel i2c@119100 { 229227506Smarcel rtc@68 { 230227506Smarcel compatible = "dallas,ds3232"; 231227506Smarcel reg = <0x68>; 232227506Smarcel interrupts = <0x1 0x1 0 0>; 233227506Smarcel }; 234227506Smarcel }; 235227506Smarcel 236236024Sraj pme: pme@316000 { 237236024Sraj /* Commented out, use default allocation */ 238236024Sraj /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ 239236024Sraj /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ 240227506Smarcel }; 241227506Smarcel 242236024Sraj qman: qman@318000 { 243236024Sraj /* Commented out, use default allocation */ 244236024Sraj /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ 245236024Sraj /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ 246227506Smarcel }; 247227506Smarcel 248236024Sraj bman: bman@31a000 { 249236024Sraj /* Same as fsl,qman-*, use default allocation */ 250236024Sraj /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ 251227506Smarcel }; 252227506Smarcel 253236024Sraj fman0: fman@400000 { 254236024Sraj enet0: ethernet@e0000 { 255236024Sraj tbi-handle = <&tbi0>; 256236024Sraj phy-handle = <&phy_rgmii_0>; 257236024Sraj phy-connection-type = "rgmii"; 258236024Sraj }; 259227506Smarcel 260236024Sraj mdio0: mdio@e1120 { 261236024Sraj tbi0: tbi-phy@8 { 262236024Sraj reg = <0x8>; 263236024Sraj device_type = "tbi-phy"; 264236024Sraj }; 265227506Smarcel 266236024Sraj /* 267236024Sraj * Virtual MDIO for the two on-board RGMII 268236024Sraj * ports. The fsl,hydra-mdio-muxval property 269236024Sraj * is already correct. 270236024Sraj */ 271236024Sraj hydra_mdio_rgmii: hydra-mdio-rgmii { 272236024Sraj #address-cells = <1>; 273236024Sraj #size-cells = <0>; 274236024Sraj compatible = "fsl,hydra-mdio"; 275236024Sraj fsl,mdio-handle = <&mdio0>; 276236024Sraj fsl,hydra-mdio-muxval = <0x00>; 277236024Sraj status = "disabled"; 278227506Smarcel 279236024Sraj phy_rgmii_0: ethernet-phy@0 { 280236024Sraj reg = <0x0>; 281236024Sraj }; 282236024Sraj phy_rgmii_1: ethernet-phy@1 { 283236024Sraj reg = <0x1>; 284236024Sraj }; 285236024Sraj }; 286227506Smarcel 287236024Sraj /* 288236024Sraj * Virtual MDIO for the four-port SGMII card. 289236024Sraj * The fsl,hydra-mdio-muxval property will be 290236024Sraj * fixed-up by U-Boot based on the slot that 291236024Sraj * the SGMII card is in. 292236024Sraj * 293236024Sraj * Note: we do not support DTSEC5 connected to 294236024Sraj * SGMII, so this is the only SGMII node. 295236024Sraj */ 296236024Sraj hydra_mdio_sgmii: hydra-mdio-sgmii { 297236024Sraj #address-cells = <1>; 298236024Sraj #size-cells = <0>; 299236024Sraj compatible = "fsl,hydra-mdio"; 300236024Sraj fsl,mdio-handle = <&mdio0>; 301236024Sraj fsl,hydra-mdio-muxval = <0x00>; 302236024Sraj status = "disabled"; 303227506Smarcel 304236024Sraj phy_sgmii_1c: ethernet-phy@1c { 305236024Sraj reg = <0x1c>; 306236024Sraj }; 307236024Sraj phy_sgmii_1d: ethernet-phy@1d { 308236024Sraj reg = <0x1d>; 309236024Sraj }; 310236024Sraj phy_sgmii_1e: ethernet-phy@1e { 311236024Sraj reg = <0x1e>; 312236024Sraj }; 313236024Sraj phy_sgmii_1f: ethernet-phy@1f { 314236024Sraj reg = <0x1f>; 315236024Sraj }; 316236024Sraj }; 317236024Sraj }; 318227506Smarcel 319236024Sraj enet1: ethernet@e2000 { 320236024Sraj tbi-handle = <&tbi1>; 321236024Sraj phy-handle = <&phy_sgmii_1d>; 322236024Sraj phy-connection-type = "sgmii"; 323236024Sraj }; 324227506Smarcel 325236024Sraj mdio@e3120 { 326236024Sraj tbi1: tbi-phy@8 { 327236024Sraj reg = <8>; 328236024Sraj device_type = "tbi-phy"; 329236024Sraj }; 330227506Smarcel }; 331227506Smarcel 332236024Sraj enet2: ethernet@e4000 { 333236024Sraj tbi-handle = <&tbi2>; 334236024Sraj phy-handle = <&phy_sgmii_1e>; 335236024Sraj phy-connection-type = "sgmii"; 336227506Smarcel }; 337227506Smarcel 338236024Sraj mdio@e5120 { 339236024Sraj tbi2: tbi-phy@8 { 340236024Sraj reg = <8>; 341236024Sraj device_type = "tbi-phy"; 342236024Sraj }; 343227506Smarcel }; 344227506Smarcel 345236024Sraj enet3: ethernet@e6000 { 346236024Sraj tbi-handle = <&tbi3>; 347236024Sraj phy-handle = <&phy_sgmii_1f>; 348236024Sraj phy-connection-type = "sgmii"; 349227506Smarcel }; 350227506Smarcel 351236024Sraj mdio@e7120 { 352227506Smarcel #address-cells = <1>; 353236024Sraj #size-cells = <0>; 354236024Sraj compatible = "fsl,fman-tbi"; 355236024Sraj reg = <0xe7120 0xee0>; 356236024Sraj interrupts = <100 1 0 0>; 357227506Smarcel 358236024Sraj tbi3: tbi-phy@8 { 359236024Sraj reg = <8>; 360236024Sraj device_type = "tbi-phy"; 361227506Smarcel }; 362236024Sraj }; 363227506Smarcel 364236024Sraj enet4: ethernet@e8000 { 365236024Sraj tbi-handle = <&tbi4>; 366236024Sraj phy-handle = <&phy_rgmii_1>; 367236024Sraj phy-connection-type = "rgmii"; 368236024Sraj }; 369236024Sraj 370236024Sraj mdio@e9120 { 371236024Sraj tbi4: tbi-phy@8 { 372236024Sraj reg = <8>; 373236024Sraj device_type = "tbi-phy"; 374227506Smarcel }; 375236024Sraj }; 376227506Smarcel 377236024Sraj enet5: ethernet@f0000 { 378236024Sraj /* 379236024Sraj * phy-handle will be updated by U-Boot to 380236024Sraj * reflect the actual slot the XAUI card is in. 381236024Sraj */ 382236024Sraj phy-handle = <&phy_xgmii_1>; 383236024Sraj phy-connection-type = "xgmii"; 384236024Sraj }; 385236024Sraj 386236024Sraj /* 387236024Sraj * We only support one XAUI card, so the MDIO muxing 388236024Sraj * is set by U-Boot, and Linux never touches it. 389236024Sraj * Therefore, we don't need a virtual MDIO node. 390236024Sraj * However, the phy address depends on the slot, so 391236024Sraj * only one of the ethernet-phy nodes below will be 392236024Sraj * used. 393236024Sraj */ 394236024Sraj hydra_mdio_xgmii: mdio@f1000 { 395236024Sraj status = "disabled"; 396236024Sraj 397236024Sraj /* XAUI card in slot 1 */ 398236024Sraj phy_xgmii_1: ethernet-phy@4 { 399236024Sraj reg = <0x4>; 400227506Smarcel }; 401227506Smarcel 402236024Sraj /* XAUI card in slot 2 */ 403236024Sraj phy_xgmii_2: ethernet-phy@0 { 404236024Sraj reg = <0x0>; 405227506Smarcel }; 406227506Smarcel }; 407227506Smarcel }; 408236024Sraj }; 409227506Smarcel 410236024Sraj rapidio@ffe0c0000 { 411236024Sraj reg = <0xf 0xfe0c0000 0 0x11000>; 412236024Sraj 413236024Sraj port1 { 414236024Sraj ranges = <0 0 0xc 0x20000000 0 0x10000000>; 415227506Smarcel }; 416236024Sraj port2 { 417236024Sraj ranges = <0 0 0xc 0x30000000 0 0x10000000>; 418236024Sraj }; 419227506Smarcel }; 420227506Smarcel 421227506Smarcel localbus@ffe124000 { 422227506Smarcel reg = <0xf 0xfe124000 0 0x1000>; 423236024Sraj ranges = <0 0 0xf 0xb8000000 0x04000000>; 424227506Smarcel 425227506Smarcel flash@0,0 { 426227506Smarcel compatible = "cfi-flash"; 427236024Sraj /* 428236024Sraj * Map 64Mb of 128MB NOR flash memory. Since highest 429236024Sraj * line of address of NOR flash memory are set by 430236024Sraj * FPGA, memory are divided into two pages equal to 431236024Sraj * 64MB. One of the pages can be accessed at once. 432236024Sraj */ 433236024Sraj reg = <0 0 0x04000000>; 434227506Smarcel bank-width = <2>; 435227506Smarcel device-width = <2>; 436227506Smarcel }; 437227506Smarcel 438236024Sraj nand@2,0 { 439236024Sraj #address-cells = <1>; 440236024Sraj #size-cells = <1>; 441236024Sraj compatible = "fsl,elbc-fcm-nand"; 442236024Sraj reg = <0x2 0x0 0x40000>; 443236024Sraj 444236024Sraj partition@0 { 445236024Sraj label = "NAND U-Boot Image"; 446236024Sraj reg = <0x0 0x02000000>; 447236024Sraj read-only; 448236024Sraj }; 449236024Sraj 450236024Sraj partition@2000000 { 451236024Sraj label = "NAND Root File System"; 452236024Sraj reg = <0x02000000 0x10000000>; 453236024Sraj }; 454236024Sraj 455236024Sraj partition@12000000 { 456236024Sraj label = "NAND Compressed RFS Image"; 457236024Sraj reg = <0x12000000 0x08000000>; 458236024Sraj }; 459236024Sraj 460236024Sraj partition@1a000000 { 461236024Sraj label = "NAND Linux Kernel Image"; 462236024Sraj reg = <0x1a000000 0x04000000>; 463236024Sraj }; 464236024Sraj 465236024Sraj partition@1e000000 { 466236024Sraj label = "NAND DTB Image"; 467236024Sraj reg = <0x1e000000 0x01000000>; 468236024Sraj }; 469236024Sraj 470236024Sraj partition@1f000000 { 471236024Sraj label = "NAND Writable User area"; 472236024Sraj reg = <0x1f000000 0x21000000>; 473236024Sraj }; 474236024Sraj }; 475236024Sraj 476227506Smarcel board-control@3,0 { 477236024Sraj compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis"; 478236024Sraj reg = <3 0 0x30>; 479227506Smarcel }; 480227506Smarcel }; 481227506Smarcel 482227506Smarcel pci0: pcie@ffe200000 { 483227506Smarcel reg = <0xf 0xfe200000 0 0x1000>; 484236024Sraj ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 485236024Sraj 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; 486227506Smarcel pcie@0 { 487236024Sraj ranges = <0x02000000 0 0x80000000 488236024Sraj 0x02000000 0 0x80000000 489236024Sraj 0 0x10000000 490227506Smarcel 491227506Smarcel 0x01000000 0 0x00000000 492236024Sraj 0x01000000 0 0xff000000 493227506Smarcel 0 0x00010000>; 494227506Smarcel }; 495227506Smarcel }; 496227506Smarcel 497227506Smarcel pci1: pcie@ffe201000 { 498227506Smarcel reg = <0xf 0xfe201000 0 0x1000>; 499236024Sraj ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 500236024Sraj 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; 501227506Smarcel pcie@0 { 502236024Sraj ranges = <0x02000000 0 0x90000000 503236024Sraj 0x02000000 0 0x90000000 504236024Sraj 0 0x10000000 505227506Smarcel 506227506Smarcel 0x01000000 0 0x00000000 507236024Sraj 0x01000000 0 0xff010000 508227506Smarcel 0 0x00010000>; 509227506Smarcel }; 510227506Smarcel }; 511227506Smarcel 512227506Smarcel pci2: pcie@ffe202000 { 513227506Smarcel reg = <0xf 0xfe202000 0 0x1000>; 514236024Sraj ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 515236024Sraj 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; 516227506Smarcel pcie@0 { 517236024Sraj ranges = <0x02000000 0 0xa0000000 518236024Sraj 0x02000000 0 0xa0000000 519236024Sraj 0 0x10000000 520227506Smarcel 521227506Smarcel 0x01000000 0 0x00000000 522236024Sraj 0x01000000 0 0xff020000 523227506Smarcel 0 0x00010000>; 524227506Smarcel }; 525227506Smarcel }; 526227506Smarcel 527227506Smarcel pci3: pcie@ffe203000 { 528227506Smarcel reg = <0xf 0xfe203000 0 0x1000>; 529236024Sraj ranges = <0x02000000 0 0xb0000000 0x0 0xb0000000 0 0x08000000 530236024Sraj 0x01000000 0 0x00000000 0x0 0xff030000 0 0x00010000>; 531227506Smarcel pcie@0 { 532236024Sraj ranges = <0x02000000 0 0xb0000000 533236024Sraj 0x02000000 0 0xb0000000 534236024Sraj 0 0x08000000 535227506Smarcel 536227506Smarcel 0x01000000 0 0x00000000 537236024Sraj 0x01000000 0 0xff030000 538227506Smarcel 0 0x00010000>; 539227506Smarcel }; 540227506Smarcel }; 541236024Sraj 542236024Sraj fsl,dpaa { 543236024Sraj compatible = "fsl,p3041-dpaa", "fsl,dpaa"; 544236024Sraj 545236024Sraj ethernet@0 { 546236024Sraj compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet"; 547236024Sraj fsl,qman-channel = <&qpool1>; 548236024Sraj fsl,fman-mac = <&enet0>; 549236024Sraj status="okay"; 550236024Sraj }; 551236024Sraj ethernet@1 { 552236024Sraj compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet"; 553236024Sraj fsl,qman-channel = <&qpool1>; 554236024Sraj fsl,fman-mac = <&enet1>; 555236024Sraj status = "disabled"; 556236024Sraj }; 557236024Sraj ethernet@2 { 558236024Sraj compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet"; 559236024Sraj fsl,qman-channel = <&qpool1>; 560236024Sraj fsl,fman-mac = <&enet2>; 561236024Sraj status = "disabled"; 562236024Sraj }; 563236024Sraj ethernet@3 { 564236024Sraj compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet"; 565236024Sraj fsl,qman-channel = <&qpool1>; 566236024Sraj fsl,fman-mac = <&enet3>; 567236024Sraj status = "disabled"; 568236024Sraj }; 569236024Sraj ethernet@4 { 570236024Sraj compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet"; 571236024Sraj fsl,qman-channel = <&qpool1>; 572236024Sraj fsl,fman-mac = <&enet4>; 573236024Sraj status = "okay"; 574236024Sraj }; 575236024Sraj ethernet@5 { 576236024Sraj compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet"; 577236024Sraj fsl,qman-channel = <&qpool1>; 578236024Sraj fsl,fman-mac = <&enet5>; 579236024Sraj status = "disabled"; 580236024Sraj }; 581236024Sraj }; 582236024Sraj 583236024Sraj chosen { 584236024Sraj stdin = "serial0"; 585236024Sraj stdout = "serial0"; 586236024Sraj }; 587227506Smarcel}; 588