ixp425var.h revision 229125 
1/*	$NetBSD: ixp425var.h,v 1.10 2006/04/10 03:36:03 simonb Exp $ */
2
3/*
4 * Copyright (c) 2003
5 *	Ichiro FUKUHARA <ichiro@ichiro.org>.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 *    must display the following acknowledgement:
18 *	This product includes software developed by Ichiro FUKUHARA.
19 * 4. The name of the company nor the name of the author may be used to
20 *    endorse or promote products derived from this software without specific
21 *    prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 * $FreeBSD: head/sys/arm/xscale/ixp425/ixp425var.h 229125 2011-12-31 15:53:34Z marius $
36 *
37 */
38
39#ifndef _IXP425VAR_H_
40#define _IXP425VAR_H_
41
42#include <sys/conf.h>
43#include <sys/queue.h>
44
45#include <machine/bus.h>
46
47#include <sys/rman.h>
48
49/* NB: cputype is setup by set_cpufuncs */
50#define	cpu_is_ixp42x()	(cputype == CPU_ID_IXP425)
51#define	cpu_is_ixp43x()	(cputype == CPU_ID_IXP435)
52#define	cpu_is_ixp46x()	(cputype == CPU_ID_IXP465)
53
54struct ixp425_softc {
55	device_t sc_dev;
56	bus_space_tag_t sc_iot;
57	bus_space_handle_t sc_gpio_ioh;
58	bus_space_handle_t sc_exp_ioh;
59
60	u_int32_t sc_intrmask;
61
62	struct rman sc_irq_rman;
63	struct rman sc_mem_rman;
64	bus_dma_tag_t sc_dmat;
65};
66
67void	ixp425_set_gpio(struct ixp425_softc *sc, int pin, int type);
68
69struct ixppcib_softc {
70	device_t                sc_dev;
71
72	u_int                   sc_bus;
73
74	struct resource         *sc_csr;
75	struct resource         *sc_mem;
76
77	struct rman             sc_io_rman;
78	struct rman             sc_mem_rman;
79	struct rman             sc_irq_rman;
80
81	struct bus_space        sc_pci_memt;
82	struct bus_space        sc_pci_iot;
83	bus_dma_tag_t 		sc_dmat;
84};
85
86#define EXP_BUS_WRITE_4(sc, reg, data) \
87	bus_space_write_4(sc->sc_iot, sc->sc_exp_ioh, reg, data)
88#define EXP_BUS_READ_4(sc, reg) \
89	bus_space_read_4(sc->sc_iot, sc->sc_exp_ioh, reg)
90
91#define	GPIO_CONF_WRITE_4(sc, reg, data)	\
92	bus_space_write_4(sc->sc_iot, sc->sc_gpio_ioh, reg, data)
93#define	GPIO_CONF_READ_4(sc, reg) \
94	bus_space_read_4(sc->sc_iot, sc->sc_gpio_ioh, reg)
95#define	IXP4XX_GPIO_LOCK()	mtx_lock(&ixp425_gpio_mtx)
96#define	IXP4XX_GPIO_UNLOCK()	mtx_unlock(&ixp425_gpio_mtx)
97extern struct mtx ixp425_gpio_mtx;
98
99extern struct bus_space ixp425_bs_tag;
100extern struct bus_space ixp425_a4x_bs_tag;
101
102extern struct bus_space cambria_exp_bs_tag;
103void	cambria_exp_bus_init(struct ixp425_softc *);
104
105void	ixp425_io_bs_init(bus_space_tag_t, void *);
106void	ixp425_mem_bs_init(bus_space_tag_t, void *);
107
108uint32_t ixp425_sdram_size(void);
109uint32_t ixp435_ddram_size(void);
110uint32_t ixp4xx_read_feature_bits(void);
111void	ixp4xx_write_feature_bits(uint32_t);
112
113int	ixp425_md_route_interrupt(device_t, device_t, int);
114void	ixp425_md_attach(device_t);
115
116int	getvbase(uint32_t, uint32_t, uint32_t *);
117
118struct ixp425_ivar {
119	uint32_t	addr;
120	int		irq;
121};
122#define	IXP425_IVAR(d)	((struct ixp425_ivar *) device_get_ivars(d))
123
124enum {
125	IXP425_IVAR_ADDR,		/* base physical address */
126	IXP425_IVAR_IRQ			/* irq/gpio pin assignment */
127};
128#endif /* _IXP425VAR_H_ */
129