ti_prcm.h revision 253830
1249259Sdim/* 2249259Sdim * Copyright (c) 2010 3249259Sdim * Ben Gray <ben.r.gray@gmail.com>. 4249259Sdim * All rights reserved. 5249259Sdim * 6249259Sdim * Redistribution and use in source and binary forms, with or without 7249259Sdim * modification, are permitted provided that the following conditions 8249259Sdim * are met: 9249259Sdim * 1. Redistributions of source code must retain the above copyright 10249259Sdim * notice, this list of conditions and the following disclaimer. 11249259Sdim * 2. Redistributions in binary form must reproduce the above copyright 12249259Sdim * notice, this list of conditions and the following disclaimer in the 13249259Sdim * documentation and/or other materials provided with the distribution. 14249259Sdim * 3. All advertising materials mentioning features or use of this software 15249259Sdim * must display the following acknowledgement: 16249259Sdim * This product includes software developed by Ben Gray. 17249259Sdim * 4. The name of the company nor the name of the author may be used to 18249259Sdim * endorse or promote products derived from this software without specific 19249259Sdim * prior written permission. 20249259Sdim * 21249259Sdim * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR 22249259Sdim * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23249259Sdim * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24249259Sdim * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25249259Sdim * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26249259Sdim * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 27249259Sdim * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28249259Sdim * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 29249259Sdim * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 30249259Sdim * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31263508Sdim * 32249259Sdim * $FreeBSD: head/sys/arm/ti/ti_prcm.h 253830 2013-07-31 05:52:03Z rpaulo $ 33249259Sdim */ 34249259Sdim 35249259Sdim 36249259Sdim/* 37249259Sdim * Texas Instruments - OMAP3xxx series processors 38249259Sdim * 39249259Sdim * Reference: 40249259Sdim * OMAP35x Applications Processor 41249259Sdim * Technical Reference Manual 42249259Sdim * (omap35xx_techref.pdf) 43249259Sdim */ 44249259Sdim#ifndef _TI_PRCM_H_ 45249259Sdim#define _TI_PRCM_H_ 46249259Sdim 47249259Sdimtypedef enum { 48249259Sdim 49249259Sdim /* System clocks, typically you can only call ti_prcm_clk_get_source_freq() 50249259Sdim * on these clocks as they are enabled by default. 51249259Sdim */ 52249259Sdim SYS_CLK = 1, 53249259Sdim 54249259Sdim /* The MPU (ARM) core clock */ 55249259Sdim MPU_CLK = 20, 56263508Sdim 57249259Sdim /* MMC modules */ 58249259Sdim MMC0_CLK = 100, 59249259Sdim MMC1_CLK, 60249259Sdim MMC2_CLK, 61249259Sdim MMC3_CLK, 62249259Sdim MMC4_CLK, 63249259Sdim MMC5_CLK, 64249259Sdim 65249259Sdim /* I2C modules */ 66249259Sdim I2C0_CLK = 200, 67249259Sdim I2C1_CLK, 68249259Sdim I2C2_CLK, 69249259Sdim I2C3_CLK, 70251662Sdim I2C4_CLK, 71251662Sdim 72249259Sdim /* USB module(s) */ 73249259Sdim USBTLL_CLK = 300, 74249259Sdim USBHSHOST_CLK, 75249259Sdim USBFSHOST_CLK, 76249259Sdim USBP1_PHY_CLK, 77249259Sdim USBP2_PHY_CLK, 78249259Sdim USBP1_UTMI_CLK, 79249259Sdim USBP2_UTMI_CLK, 80249259Sdim USBP1_HSIC_CLK, 81249259Sdim USBP2_HSIC_CLK, 82249259Sdim 83249259Sdim /* UART modules */ 84249259Sdim UART1_CLK = 400, 85249259Sdim UART2_CLK, 86249259Sdim UART3_CLK, 87249259Sdim UART4_CLK, 88249259Sdim 89249259Sdim /* General purpose timer modules */ 90249259Sdim GPTIMER1_CLK = 500, 91249259Sdim GPTIMER2_CLK, 92249259Sdim GPTIMER3_CLK, 93249259Sdim GPTIMER4_CLK, 94249259Sdim GPTIMER5_CLK, 95249259Sdim GPTIMER6_CLK, 96249259Sdim GPTIMER7_CLK, 97249259Sdim GPTIMER8_CLK, 98249259Sdim GPTIMER9_CLK, 99249259Sdim GPTIMER10_CLK, 100249259Sdim GPTIMER11_CLK, 101249259Sdim GPTIMER12_CLK, 102249259Sdim 103249259Sdim /* McBSP module(s) */ 104249259Sdim MCBSP1_CLK = 600, 105249259Sdim MCBSP2_CLK, 106249259Sdim MCBSP3_CLK, 107249259Sdim MCBSP4_CLK, 108249259Sdim MCBSP5_CLK, 109249259Sdim 110249259Sdim /* General purpose I/O modules */ 111249259Sdim GPIO0_CLK = 700, 112251662Sdim GPIO1_CLK, 113251662Sdim GPIO2_CLK, 114251662Sdim GPIO3_CLK, 115251662Sdim GPIO4_CLK, 116251662Sdim GPIO5_CLK, 117251662Sdim GPIO6_CLK, 118251662Sdim 119251662Sdim /* sDMA module */ 120251662Sdim SDMA_CLK = 800, 121251662Sdim 122251662Sdim /* DMTimer modules */ 123251662Sdim DMTIMER0_CLK = 900, 124251662Sdim DMTIMER1_CLK, 125251662Sdim DMTIMER2_CLK, 126251662Sdim DMTIMER3_CLK, 127251662Sdim DMTIMER4_CLK, 128251662Sdim DMTIMER5_CLK, 129251662Sdim DMTIMER6_CLK, 130251662Sdim DMTIMER7_CLK, 131251662Sdim 132251662Sdim /* CPSW modules */ 133251662Sdim CPSW_CLK = 1000, 134251662Sdim 135251662Sdim /* Mentor USB modules */ 136251662Sdim MUSB0_CLK = 1100, 137251662Sdim 138251662Sdim /* EDMA module */ 139251662Sdim EDMA_TPCC_CLK = 1200, 140251662Sdim EDMA_TPTC0_CLK, 141263508Sdim EDMA_TPTC1_CLK, 142263508Sdim EDMA_TPTC2_CLK, 143251662Sdim 144251662Sdim /* LCD controller module */ 145251662Sdim LCDC_CLK = 1300, 146251662Sdim 147251662Sdim /* PWM modules */ 148249259Sdim PWMSS0_CLK = 1400, 149249259Sdim PWMSS1_CLK, 150249259Sdim PWMSS2_CLK, 151249259Sdim 152249259Sdim /* Mailbox modules */ 153249259Sdim MAILBOX0_CLK = 1500, 154249259Sdim 155249259Sdim /* Spinlock modules */ 156249259Sdim SPINLOCK0_CLK = 1600, 157249259Sdim 158249259Sdim PRUSS_CLK = 1700, 159249259Sdim 160249259Sdim INVALID_CLK_IDENT 161249259Sdim 162249259Sdim} clk_ident_t; 163249259Sdim 164249259Sdim/* 165249259Sdim * 166249259Sdim */ 167249259Sdimtypedef enum { 168249259Sdim SYSCLK_CLK, /* System clock */ 169249259Sdim EXT_CLK, 170249259Sdim 171249259Sdim F32KHZ_CLK, /* 32KHz clock */ 172249259Sdim F48MHZ_CLK, /* 48MHz clock */ 173249259Sdim F64MHZ_CLK, /* 64MHz clock */ 174249259Sdim F96MHZ_CLK, /* 96MHz clock */ 175249259Sdim 176249259Sdim} clk_src_t; 177249259Sdim 178249259Sdimstruct ti_clock_dev { 179249259Sdim /* The profile of the timer */ 180249259Sdim clk_ident_t id; 181249259Sdim 182249259Sdim /* A bunch of callbacks associated with the clock device */ 183249259Sdim int (*clk_activate)(struct ti_clock_dev *clkdev); 184249259Sdim int (*clk_deactivate)(struct ti_clock_dev *clkdev); 185249259Sdim int (*clk_set_source)(struct ti_clock_dev *clkdev, 186249259Sdim clk_src_t clksrc); 187249259Sdim int (*clk_accessible)(struct ti_clock_dev *clkdev); 188249259Sdim int (*clk_get_source_freq)(struct ti_clock_dev *clkdev, 189249259Sdim unsigned int *freq); 190249259Sdim}; 191249259Sdim 192263508Sdimint ti_prcm_clk_valid(clk_ident_t clk); 193263508Sdimint ti_prcm_clk_enable(clk_ident_t clk); 194263508Sdimint ti_prcm_clk_disable(clk_ident_t clk); 195263508Sdimint ti_prcm_clk_accessible(clk_ident_t clk); 196249259Sdimint ti_prcm_clk_disable_autoidle(clk_ident_t clk); 197249259Sdimint ti_prcm_clk_set_source(clk_ident_t clk, clk_src_t clksrc); 198249259Sdimint ti_prcm_clk_get_source_freq(clk_ident_t clk, unsigned int *freq); 199249259Sdimvoid ti_prcm_reset(void); 200249259Sdim 201249259Sdim#endif /* _TI_PRCM_H_ */ 202249259Sdim