1239278Sgonzo/*-
2239278Sgonzo * Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
3239278Sgonzo * All rights reserved.
4239278Sgonzo *
5239278Sgonzo * Redistribution and use in source and binary forms, with or without
6239278Sgonzo * modification, are permitted provided that the following conditions
7239278Sgonzo * are met:
8239278Sgonzo * 1. Redistributions of source code must retain the above copyright
9239278Sgonzo *    notice, this list of conditions and the following disclaimer.
10239278Sgonzo * 2. Redistributions in binary form must reproduce the above copyright
11239278Sgonzo *    notice, this list of conditions and the following disclaimer in the
12239278Sgonzo *    documentation and/or other materials provided with the distribution.
13239278Sgonzo *
14239278Sgonzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15239278Sgonzo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16239278Sgonzo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17239278Sgonzo * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18239278Sgonzo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19239278Sgonzo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20239278Sgonzo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21239278Sgonzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22239278Sgonzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23239278Sgonzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24239278Sgonzo * SUCH DAMAGE.
25239278Sgonzo *
26239278Sgonzo */
27239278Sgonzo#include <sys/cdefs.h>
28239278Sgonzo__FBSDID("$FreeBSD: releng/10.2/sys/arm/lpc/lpc_timer.c 266207 2014-05-16 02:21:51Z ian $");
29239278Sgonzo
30239278Sgonzo#include <sys/param.h>
31239278Sgonzo#include <sys/systm.h>
32239278Sgonzo#include <sys/bus.h>
33239278Sgonzo#include <sys/kernel.h>
34239278Sgonzo#include <sys/module.h>
35239278Sgonzo#include <sys/malloc.h>
36239278Sgonzo#include <sys/rman.h>
37239278Sgonzo#include <sys/timetc.h>
38239278Sgonzo#include <sys/timeet.h>
39239278Sgonzo#include <machine/bus.h>
40239278Sgonzo#include <machine/cpu.h>
41239278Sgonzo#include <machine/intr.h>
42239278Sgonzo
43239278Sgonzo#include <dev/fdt/fdt_common.h>
44239278Sgonzo#include <dev/ofw/ofw_bus.h>
45239278Sgonzo#include <dev/ofw/ofw_bus_subr.h>
46239278Sgonzo
47239278Sgonzo#include <arm/lpc/lpcreg.h>
48239278Sgonzo#include <arm/lpc/lpcvar.h>
49239278Sgonzo
50239278Sgonzostruct lpc_timer_softc {
51239278Sgonzo	device_t		lt_dev;
52239278Sgonzo	struct eventtimer	lt_et;
53239278Sgonzo	struct resource	*	lt_res[5];
54239278Sgonzo	bus_space_tag_t		lt_bst0;
55239278Sgonzo	bus_space_handle_t	lt_bsh0;
56239278Sgonzo	bus_space_tag_t		lt_bst1;
57239278Sgonzo	bus_space_handle_t	lt_bsh1;
58239278Sgonzo	int			lt_oneshot;
59239278Sgonzo	uint32_t		lt_period;
60239278Sgonzo};
61239278Sgonzo
62239278Sgonzostatic struct resource_spec lpc_timer_spec[] = {
63239278Sgonzo	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
64239278Sgonzo	{ SYS_RES_MEMORY,	1,	RF_ACTIVE },
65239278Sgonzo	{ SYS_RES_IRQ,		0,	RF_ACTIVE },
66239278Sgonzo	{ SYS_RES_IRQ,		1,	RF_ACTIVE },
67239278Sgonzo	{ -1, 0 }
68239278Sgonzo};
69239278Sgonzo
70239278Sgonzostatic struct lpc_timer_softc *timer_softc = NULL;
71239278Sgonzostatic int lpc_timer_initialized = 0;
72239278Sgonzostatic int lpc_timer_probe(device_t);
73239278Sgonzostatic int lpc_timer_attach(device_t);
74247463Smavstatic int lpc_timer_start(struct eventtimer *,
75247463Smav    sbintime_t first, sbintime_t period);
76239278Sgonzostatic int lpc_timer_stop(struct eventtimer *et);
77239278Sgonzostatic unsigned lpc_get_timecount(struct timecounter *);
78239278Sgonzostatic int lpc_hardclock(void *);
79239278Sgonzo
80239278Sgonzo#define	timer0_read_4(sc, reg)			\
81239278Sgonzo    bus_space_read_4(sc->lt_bst0, sc->lt_bsh0, reg)
82239278Sgonzo#define	timer0_write_4(sc, reg, val)		\
83239278Sgonzo    bus_space_write_4(sc->lt_bst0, sc->lt_bsh0, reg, val)
84239278Sgonzo#define	timer0_clear(sc)			\
85239278Sgonzo    do {					\
86239278Sgonzo	    timer0_write_4(sc, LPC_TIMER_TC, 0);	\
87239278Sgonzo	    timer0_write_4(sc, LPC_TIMER_PR, 0);	\
88239278Sgonzo	    timer0_write_4(sc, LPC_TIMER_PC, 0);	\
89239278Sgonzo    } while(0)
90239278Sgonzo
91239278Sgonzo#define	timer1_read_4(sc, reg)			\
92239278Sgonzo    bus_space_read_4(sc->lt_bst1, sc->lt_bsh1, reg)
93239278Sgonzo#define	timer1_write_4(sc, reg, val)		\
94239278Sgonzo    bus_space_write_4(sc->lt_bst1, sc->lt_bsh1, reg, val)
95239278Sgonzo#define	timer1_clear(sc)			\
96239278Sgonzo    do {					\
97239278Sgonzo	    timer1_write_4(sc, LPC_TIMER_TC, 0);	\
98239278Sgonzo	    timer1_write_4(sc, LPC_TIMER_PR, 0);	\
99239278Sgonzo	    timer1_write_4(sc, LPC_TIMER_PC, 0);	\
100239278Sgonzo    } while(0)
101239278Sgonzo
102239278Sgonzostatic struct timecounter lpc_timecounter = {
103239278Sgonzo	.tc_get_timecount = lpc_get_timecount,
104239278Sgonzo	.tc_name = "LPC32x0 Timer1",
105239278Sgonzo	.tc_frequency = 0, /* will be filled later */
106239278Sgonzo	.tc_counter_mask = ~0u,
107239278Sgonzo	.tc_quality = 1000,
108239278Sgonzo};
109239278Sgonzo
110239278Sgonzostatic int
111239278Sgonzolpc_timer_probe(device_t dev)
112239278Sgonzo{
113239278Sgonzo
114266152Sian	if (!ofw_bus_status_okay(dev))
115266152Sian		return (ENXIO);
116266152Sian
117239278Sgonzo	if (!ofw_bus_is_compatible(dev, "lpc,timer"))
118239278Sgonzo		return (ENXIO);
119239278Sgonzo
120239278Sgonzo	device_set_desc(dev, "LPC32x0 timer");
121239278Sgonzo	return (BUS_PROBE_DEFAULT);
122239278Sgonzo}
123239278Sgonzo
124239278Sgonzostatic int
125239278Sgonzolpc_timer_attach(device_t dev)
126239278Sgonzo{
127239278Sgonzo	void *intrcookie;
128239278Sgonzo	struct lpc_timer_softc *sc = device_get_softc(dev);
129239278Sgonzo	phandle_t node;
130239278Sgonzo	uint32_t freq;
131239278Sgonzo
132239278Sgonzo	if (timer_softc)
133239278Sgonzo		return (ENXIO);
134239278Sgonzo
135239278Sgonzo	timer_softc = sc;
136239278Sgonzo
137239278Sgonzo	if (bus_alloc_resources(dev, lpc_timer_spec, sc->lt_res)) {
138239278Sgonzo		device_printf(dev, "could not allocate resources\n");
139239278Sgonzo		return (ENXIO);
140239278Sgonzo	}
141239278Sgonzo
142239278Sgonzo	sc->lt_bst0 = rman_get_bustag(sc->lt_res[0]);
143239278Sgonzo	sc->lt_bsh0 = rman_get_bushandle(sc->lt_res[0]);
144239278Sgonzo	sc->lt_bst1 = rman_get_bustag(sc->lt_res[1]);
145239278Sgonzo	sc->lt_bsh1 = rman_get_bushandle(sc->lt_res[1]);
146239278Sgonzo
147239278Sgonzo	if (bus_setup_intr(dev, sc->lt_res[2], INTR_TYPE_CLK,
148239278Sgonzo	    lpc_hardclock, NULL, sc, &intrcookie)) {
149239278Sgonzo		device_printf(dev, "could not setup interrupt handler\n");
150239278Sgonzo		bus_release_resources(dev, lpc_timer_spec, sc->lt_res);
151239278Sgonzo		return (ENXIO);
152239278Sgonzo	}
153239278Sgonzo
154239278Sgonzo	/* Enable timer clock */
155239278Sgonzo	lpc_pwr_write(dev, LPC_CLKPWR_TIMCLK_CTRL1,
156239278Sgonzo	    LPC_CLKPWR_TIMCLK_CTRL1_TIMER0 |
157239278Sgonzo	    LPC_CLKPWR_TIMCLK_CTRL1_TIMER1);
158239278Sgonzo
159239278Sgonzo	/* Get PERIPH_CLK encoded in parent bus 'bus-frequency' property */
160239278Sgonzo	node = ofw_bus_get_node(dev);
161239278Sgonzo	if (OF_getprop(OF_parent(node), "bus-frequency", &freq,
162239278Sgonzo	    sizeof(pcell_t)) <= 0) {
163239278Sgonzo		bus_release_resources(dev, lpc_timer_spec, sc->lt_res);
164239278Sgonzo		bus_teardown_intr(dev, sc->lt_res[2], intrcookie);
165239278Sgonzo		device_printf(dev, "could not obtain base clock frequency\n");
166239278Sgonzo		return (ENXIO);
167239278Sgonzo	}
168239278Sgonzo
169239278Sgonzo	freq = fdt32_to_cpu(freq);
170239278Sgonzo
171239278Sgonzo	/* Set desired frequency in event timer and timecounter */
172239278Sgonzo	sc->lt_et.et_frequency = (uint64_t)freq;
173239278Sgonzo	lpc_timecounter.tc_frequency = (uint64_t)freq;
174239278Sgonzo
175239278Sgonzo	sc->lt_et.et_name = "LPC32x0 Timer0";
176239278Sgonzo	sc->lt_et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT;
177239278Sgonzo	sc->lt_et.et_quality = 1000;
178247463Smav	sc->lt_et.et_min_period = (0x00000002LLU << 32) / sc->lt_et.et_frequency;
179247463Smav	sc->lt_et.et_max_period = (0xfffffffeLLU << 32) / sc->lt_et.et_frequency;
180239278Sgonzo	sc->lt_et.et_start = lpc_timer_start;
181239278Sgonzo	sc->lt_et.et_stop = lpc_timer_stop;
182239278Sgonzo	sc->lt_et.et_priv = sc;
183239278Sgonzo
184239278Sgonzo	et_register(&sc->lt_et);
185239278Sgonzo	tc_init(&lpc_timecounter);
186239278Sgonzo
187239278Sgonzo	/* Reset and enable timecounter */
188239278Sgonzo	timer1_write_4(sc, LPC_TIMER_TCR, LPC_TIMER_TCR_RESET);
189239278Sgonzo	timer1_write_4(sc, LPC_TIMER_TCR, 0);
190239278Sgonzo	timer1_clear(sc);
191239278Sgonzo	timer1_write_4(sc, LPC_TIMER_TCR, LPC_TIMER_TCR_ENABLE);
192239278Sgonzo
193239278Sgonzo	/* DELAY() now can work properly */
194239278Sgonzo	lpc_timer_initialized = 1;
195239278Sgonzo
196239278Sgonzo	return (0);
197239278Sgonzo}
198239278Sgonzo
199239278Sgonzostatic int
200247463Smavlpc_timer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
201239278Sgonzo{
202239278Sgonzo	struct lpc_timer_softc *sc = (struct lpc_timer_softc *)et->et_priv;
203239278Sgonzo	uint32_t ticks;
204239278Sgonzo
205247463Smav	if (period == 0) {
206239278Sgonzo		sc->lt_oneshot = 1;
207247463Smav		sc->lt_period = 0;
208247463Smav	} else {
209239278Sgonzo		sc->lt_oneshot = 0;
210247463Smav		sc->lt_period = ((uint32_t)et->et_frequency * period) >> 32;
211239278Sgonzo	}
212239278Sgonzo
213247463Smav	if (first == 0)
214239278Sgonzo		ticks = sc->lt_period;
215247463Smav	else
216247463Smav		ticks = ((uint32_t)et->et_frequency * first) >> 32;
217239278Sgonzo
218239278Sgonzo	/* Reset timer */
219239278Sgonzo	timer0_write_4(sc, LPC_TIMER_TCR, LPC_TIMER_TCR_RESET);
220239278Sgonzo	timer0_write_4(sc, LPC_TIMER_TCR, 0);
221239278Sgonzo
222239278Sgonzo	/* Start timer */
223239278Sgonzo	timer0_clear(sc);
224239278Sgonzo	timer0_write_4(sc, LPC_TIMER_MR0, ticks);
225239278Sgonzo	timer0_write_4(sc, LPC_TIMER_MCR, LPC_TIMER_MCR_MR0I | LPC_TIMER_MCR_MR0S);
226239278Sgonzo	timer0_write_4(sc, LPC_TIMER_TCR, LPC_TIMER_TCR_ENABLE);
227239278Sgonzo	return (0);
228239278Sgonzo}
229239278Sgonzo
230239278Sgonzostatic int
231239278Sgonzolpc_timer_stop(struct eventtimer *et)
232239278Sgonzo{
233239278Sgonzo	struct lpc_timer_softc *sc = (struct lpc_timer_softc *)et->et_priv;
234239278Sgonzo
235239278Sgonzo	timer0_write_4(sc, LPC_TIMER_TCR, 0);
236239278Sgonzo	return (0);
237239278Sgonzo}
238239278Sgonzo
239239278Sgonzostatic device_method_t lpc_timer_methods[] = {
240239278Sgonzo	DEVMETHOD(device_probe,		lpc_timer_probe),
241239278Sgonzo	DEVMETHOD(device_attach,	lpc_timer_attach),
242239278Sgonzo	{ 0, 0 }
243239278Sgonzo};
244239278Sgonzo
245239278Sgonzostatic driver_t lpc_timer_driver = {
246239278Sgonzo	"timer",
247239278Sgonzo	lpc_timer_methods,
248239278Sgonzo	sizeof(struct lpc_timer_softc),
249239278Sgonzo};
250239278Sgonzo
251239278Sgonzostatic devclass_t lpc_timer_devclass;
252239278Sgonzo
253239278SgonzoDRIVER_MODULE(timer, simplebus, lpc_timer_driver, lpc_timer_devclass, 0, 0);
254239278Sgonzo
255239278Sgonzostatic int
256239278Sgonzolpc_hardclock(void *arg)
257239278Sgonzo{
258239278Sgonzo	struct lpc_timer_softc *sc = (struct lpc_timer_softc *)arg;
259239278Sgonzo
260239278Sgonzo	/* Reset pending interrupt */
261239278Sgonzo	timer0_write_4(sc, LPC_TIMER_IR, 0xffffffff);
262239278Sgonzo
263239278Sgonzo	/* Start timer again */
264239278Sgonzo	if (!sc->lt_oneshot) {
265239278Sgonzo		timer0_clear(sc);
266239278Sgonzo		timer0_write_4(sc, LPC_TIMER_MR0, sc->lt_period);
267239278Sgonzo		timer0_write_4(sc, LPC_TIMER_TCR, LPC_TIMER_TCR_ENABLE);
268239278Sgonzo	}
269239278Sgonzo
270239278Sgonzo	if (sc->lt_et.et_active)
271239278Sgonzo		sc->lt_et.et_event_cb(&sc->lt_et, sc->lt_et.et_arg);
272239278Sgonzo
273239278Sgonzo	return (FILTER_HANDLED);
274239278Sgonzo}
275239278Sgonzo
276239278Sgonzostatic unsigned
277239278Sgonzolpc_get_timecount(struct timecounter *tc)
278239278Sgonzo{
279239278Sgonzo	return timer1_read_4(timer_softc, LPC_TIMER_TC);
280239278Sgonzo}
281239278Sgonzo
282239278Sgonzovoid
283239278SgonzoDELAY(int usec)
284239278Sgonzo{
285239278Sgonzo	uint32_t counter;
286239278Sgonzo	uint32_t first, last;
287239278Sgonzo	int val = (lpc_timecounter.tc_frequency / 1000000 + 1) * usec;
288239278Sgonzo
289239278Sgonzo	/* Timer is not initialized yet */
290239278Sgonzo	if (!lpc_timer_initialized) {
291239278Sgonzo		for (; usec > 0; usec--)
292239278Sgonzo			for (counter = 100; counter > 0; counter--)
293239278Sgonzo				;
294239278Sgonzo		return;
295239278Sgonzo	}
296239278Sgonzo
297239278Sgonzo	first = lpc_get_timecount(&lpc_timecounter);
298239278Sgonzo	while (val > 0) {
299239278Sgonzo		last = lpc_get_timecount(&lpc_timecounter);
300239278Sgonzo		if (last < first) {
301239278Sgonzo			/* Timer rolled over */
302239278Sgonzo			last = first;
303239278Sgonzo		}
304239278Sgonzo
305239278Sgonzo		val -= (last - first);
306239278Sgonzo		first = last;
307239278Sgonzo	}
308239278Sgonzo}
309