board_bwct.c revision 164198
113007Swpaul/*- 213007Swpaul * Copyright (c) 1994-1998 Mark Brinicombe. 313007Swpaul * Copyright (c) 1994 Brini. 413007Swpaul * All rights reserved. 513007Swpaul * 613007Swpaul * This code is derived from software written for Brini by Mark Brinicombe 713007Swpaul * 813007Swpaul * Redistribution and use in source and binary forms, with or without 913007Swpaul * modification, are permitted provided that the following conditions 1013007Swpaul * are met: 1113007Swpaul * 1. Redistributions of source code must retain the above copyright 1213007Swpaul * notice, this list of conditions and the following disclaimer. 1313007Swpaul * 2. Redistributions in binary form must reproduce the above copyright 1413007Swpaul * notice, this list of conditions and the following disclaimer in the 1513007Swpaul * documentation and/or other materials provided with the distribution. 1613007Swpaul * 3. All advertising materials mentioning features or use of this software 1713007Swpaul * must display the following acknowledgement: 1813007Swpaul * This product includes software developed by Brini. 1913007Swpaul * 4. The name of the company nor the name of the author may be used to 2013007Swpaul * endorse or promote products derived from this software without specific 2113007Swpaul * prior written permission. 2213007Swpaul * 2313007Swpaul * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 2413007Swpaul * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 2513007Swpaul * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2613007Swpaul * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 2713007Swpaul * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 2813007Swpaul * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 2913007Swpaul * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3013007Swpaul * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3113007Swpaul * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3231626Scharnier * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3331626Scharnier * SUCH DAMAGE. 3431626Scharnier * 3531626Scharnier * RiscBSD kernel project 3631626Scharnier * 3731626Scharnier * machdep.c 3819181Swpaul * 3919181Swpaul * Machine dependant functions for kernel setup 4013895Swpaul * 4113895Swpaul * This file needs a lot of work. 4213895Swpaul * 4313007Swpaul * Created : 17/09/94 4413007Swpaul */ 4513007Swpaul 4613007Swpaul#include "opt_msgbuf.h" 4713007Swpaul#include "opt_ddb.h" 4813007Swpaul#include "opt_at91.h" 4913007Swpaul 5013007Swpaul#include <sys/cdefs.h> 5113007Swpaul__FBSDID("$FreeBSD: head/sys/arm/at91/kb920x_machdep.c 164198 2006-11-11 20:57:52Z alc $"); 5213007Swpaul 5313007Swpaul#define _ARM32_BUS_DMA_PRIVATE 5413007Swpaul#include <sys/param.h> 5513007Swpaul#include <sys/systm.h> 5613007Swpaul#include <sys/sysproto.h> 5713007Swpaul#include <sys/signalvar.h> 5813007Swpaul#include <sys/imgact.h> 5913007Swpaul#include <sys/kernel.h> 6013007Swpaul#include <sys/ktr.h> 6113007Swpaul#include <sys/linker.h> 6213007Swpaul#include <sys/lock.h> 6313007Swpaul#include <sys/malloc.h> 6413007Swpaul#include <sys/mutex.h> 6513007Swpaul#include <sys/pcpu.h> 6613007Swpaul#include <sys/proc.h> 6713007Swpaul#include <sys/ptrace.h> 6813007Swpaul#include <sys/cons.h> 6913007Swpaul#include <sys/bio.h> 7013007Swpaul#include <sys/bus.h> 7113007Swpaul#include <sys/buf.h> 7213007Swpaul#include <sys/exec.h> 7313007Swpaul#include <sys/kdb.h> 7413007Swpaul#include <sys/msgbuf.h> 7513007Swpaul#include <machine/reg.h> 7613007Swpaul#include <machine/cpu.h> 7713007Swpaul 7813007Swpaul#include <vm/vm.h> 7913007Swpaul#include <vm/pmap.h> 8013007Swpaul#include <vm/vm.h> 8113007Swpaul#include <vm/vm_object.h> 8213007Swpaul#include <vm/vm_page.h> 8313007Swpaul#include <vm/vm_pager.h> 8413007Swpaul#include <vm/vm_map.h> 8513007Swpaul#include <vm/vnode_pager.h> 8613007Swpaul#include <machine/pmap.h> 8713007Swpaul#include <machine/vmparam.h> 8813007Swpaul#include <machine/pcb.h> 8913007Swpaul#include <machine/undefined.h> 9013007Swpaul#include <machine/machdep.h> 9113007Swpaul#include <machine/metadata.h> 9213007Swpaul#include <machine/armreg.h> 9313007Swpaul#include <machine/bus.h> 9413007Swpaul#include <sys/reboot.h> 9513007Swpaul 9613007Swpaul#include <arm/at91/at91rm92reg.h> 9713007Swpaul#include <arm/at91/at91_piovar.h> 9813007Swpaul#include <arm/at91/at91_pio_rm9200.h> 9913007Swpaul 10013007Swpaul#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 10113007Swpaul#define KERNEL_PT_KERN 1 10213007Swpaul#define KERNEL_PT_KERN_NUM 22 10313007Swpaul#define KERNEL_PT_AFKERNEL KERNEL_PT_KERN + KERNEL_PT_KERN_NUM /* L2 table for mapping after kernel */ 10413007Swpaul#define KERNEL_PT_AFKERNEL_NUM 5 10513007Swpaul 10613007Swpaul/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ 10713007Swpaul#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) 10813007Swpaul 10913007Swpaul/* Define various stack sizes in pages */ 11013007Swpaul#define IRQ_STACK_SIZE 1 11113007Swpaul#define ABT_STACK_SIZE 1 11213007Swpaul#define UND_STACK_SIZE 1 11313007Swpaul 11413007Swpaulextern u_int data_abort_handler_address; 11513007Swpaulextern u_int prefetch_abort_handler_address; 11613895Swpaulextern u_int undefined_handler_address; 11713895Swpaul 11813895Swpaulstruct pv_addr kernel_pt_table[NUM_KERNEL_PTS]; 11913895Swpaul 12013895Swpaulextern void *_end; 12113895Swpaul 12213895Swpaulextern int *end; 12313007Swpaul 12413007Swpaulstruct pcpu __pcpu; 12513007Swpaulstruct pcpu *pcpup = &__pcpu; 12613007Swpaul 12713007Swpaul/* Physical and virtual addresses for some global pages */ 12813007Swpaul 12913895Swpaulvm_paddr_t phys_avail[10]; 13013895Swpaulvm_paddr_t dump_avail[4]; 13113895Swpaulvm_offset_t physical_pages; 13213895Swpaul 13313007Swpaulstruct pv_addr systempage; 13413007Swpaulstruct pv_addr msgbufpv; 13513007Swpaulstruct pv_addr irqstack; 13613007Swpaulstruct pv_addr undstack; 13713007Swpaulstruct pv_addr abtstack; 13813007Swpaulstruct pv_addr kernelstack; 13913007Swpaulstruct pv_addr minidataclean; 14013007Swpaul 14113007Swpaulstatic struct trapframe proc0_tf; 14213007Swpaul 14313007Swpaul/* Static device mappings. */ 14413007Swpaulstatic const struct pmap_devmap kb920x_devmap[] = { 14513007Swpaul /* 14613007Swpaul * Map the on-board devices VA == PA so that we can access them 14713007Swpaul * with the MMU on or off. 14813007Swpaul */ 14913007Swpaul { 15013895Swpaul /* 15113895Swpaul * This at least maps the interrupt controller, the UART 15213895Swpaul * and the timer. Other devices should use newbus to 15313895Swpaul * map their memory anyway. 15413895Swpaul */ 15513007Swpaul 0xdff00000, 15613007Swpaul 0xfff00000, 15713007Swpaul 0x100000, 15813007Swpaul VM_PROT_READ|VM_PROT_WRITE, 15913007Swpaul PTE_NOCACHE, 16013007Swpaul }, 16113007Swpaul /* 16213007Swpaul * We can't just map the OHCI registers VA == PA, because 16313007Swpaul * AT91RM92_OHCI_BASE belongs to the userland address space. 16413007Swpaul * We could just choose a different virtual address, but a better 16513007Swpaul * solution would probably be to just use pmap_mapdev() to allocate 16613007Swpaul * KVA, as we don't need the OHCI controller before the vm 16713007Swpaul * initialization is done. However, the AT91 resource allocation 16813007Swpaul * system doesn't know how to use pmap_mapdev() yet. 16913007Swpaul */ 17013007Swpaul#if 0 17113007Swpaul { 17213007Swpaul /* 17313007Swpaul * Add the ohci controller, and anything else that might be 17413007Swpaul * on this chip select for a VA/PA mapping. 17513007Swpaul */ 17613007Swpaul AT91RM92_OHCI_BASE, 17713007Swpaul AT91RM92_OHCI_BASE, 17813007Swpaul AT91RM92_OHCI_SIZE, 17913007Swpaul VM_PROT_READ|VM_PROT_WRITE, 18013007Swpaul PTE_NOCACHE, 18113007Swpaul }, 18213007Swpaul#endif 18313007Swpaul { 18413007Swpaul 0, 18513007Swpaul 0, 18613007Swpaul 0, 18713007Swpaul 0, 18813007Swpaul 0, 18913007Swpaul } 19013007Swpaul}; 19113007Swpaul 19213895Swpaul#define SDRAM_START 0xa0000000 19316132Swpaul 19413895Swpaul#ifdef DDB 19513007Swpaulextern vm_offset_t ksym_start, ksym_end; 19613007Swpaul#endif 19713007Swpaul 19813007Swpaulstatic long 19913007Swpaulramsize(void) 20013007Swpaul{ 20113007Swpaul uint32_t *SDRAMC = (uint32_t *)(AT91RM92_BASE + AT91RM92_SDRAMC_BASE); 20213007Swpaul uint32_t cr, mr; 20313007Swpaul int banks, rows, cols, bw; 20413007Swpaul 20513007Swpaul cr = SDRAMC[AT91RM92_SDRAMC_CR / 4]; 20613007Swpaul mr = SDRAMC[AT91RM92_SDRAMC_MR / 4]; 20713007Swpaul bw = (mr & AT91RM92_SDRAMC_MR_DBW_16) ? 1 : 2; 20813007Swpaul banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1; 20913895Swpaul rows = ((cr & AT91RM92_SDRAMC_CR_NR_MASK) >> 2) + 11; 21013007Swpaul cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8; 21113007Swpaul return (1 << (cols + rows + banks + bw)); 21213895Swpaul} 21313007Swpaul 21413007Swpaulstatic long 21513895Swpaulboard_init(void) 21613007Swpaul{ 21713007Swpaul /* 21813007Swpaul * Since the USART supprots RS-485 multidrop mode, it allows the 21913007Swpaul * TX pins to float. However, for RS-232 operations, we don't want 22013007Swpaul * these pins to float. Instead, they should be pulled up to avoid 22113007Swpaul * mismatches. Linux does something similar when it configures the 22213007Swpaul * TX lines. This implies that we also allow the RX lines to float 22313007Swpaul * rather than be in the state they are left in by the boot loader. 22413007Swpaul * Since they are input pins, I think that this is the right thing 22513007Swpaul * to do. 22613007Swpaul */ 22713007Swpaul 22813007Swpaul /* PIOA's A periph: Turn USART 0 and 2's TX/RX pins */ 22913007Swpaul at91_pio_use_periph_a(AT91RM92_PIOA_BASE, 23013007Swpaul AT91C_PA18_RXD0 | AT91C_PA22_RXD2, 0); 23113007Swpaul at91_pio_use_periph_a(AT91RM92_PIOA_BASE, 23213007Swpaul AT91C_PA17_TXD0 | AT91C_PA23_TXD2, 1); 23313007Swpaul /* PIOA's B periph: Turn USART 3's TX/RX pins */ 23413007Swpaul at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA6_RXD3, 0); 23513007Swpaul at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA5_TXD3, 1); 23613007Swpaul#ifdef AT91_TSC 23713007Swpaul /* We're using TC0's A1 and A2 input */ 23813007Swpaul at91_pio_use_periph_b(AT91RM92_PIOA_BASE, 23913007Swpaul AT91C_PA19_TIOA1 | AT91C_PA21_TIOA2, 0); 24013007Swpaul#endif 24113007Swpaul /* PIOB's A periph: Turn USART 1's TX/RX pins */ 24213007Swpaul at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB21_RXD1, 0); 24313007Swpaul at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB20_TXD1, 1); 24413007Swpaul 24513007Swpaul /* Pin assignment */ 24613895Swpaul#ifdef AT91_TSC 24713007Swpaul /* Assert PA24 low -- talk to rubidium */ 24813007Swpaul at91_pio_use_gpio(AT91RM92_PIOA_BASE, AT91C_PIO_PA24); 24913895Swpaul at91_pio_gpio_output(AT91RM92_PIOA_BASE, AT91C_PIO_PA24, 0); 25013007Swpaul at91_pio_gpio_clear(AT91RM92_PIOA_BASE, AT91C_PIO_PA24); 25113007Swpaul at91_pio_use_gpio(AT91RM92_PIOB_BASE, 25213895Swpaul AT91C_PIO_PB16 | AT91C_PIO_PB17 | AT91C_PIO_PB18 | AT91C_PIO_PB19); 25313007Swpaul#endif 25413007Swpaul 25513007Swpaul return (ramsize()); 25613007Swpaul} 25713007Swpaul 25813007Swpaulvoid * 25913007Swpaulinitarm(void *arg, void *arg2) 26013007Swpaul{ 26113007Swpaul struct pv_addr kernel_l1pt; 26219181Swpaul int loop; 26319181Swpaul u_int l1pagetable; 26419181Swpaul vm_offset_t freemempos; 26519181Swpaul vm_offset_t afterkern; 26619181Swpaul int i; 26719181Swpaul uint32_t fake_preload[35]; 26819181Swpaul uint32_t memsize; 26919181Swpaul vm_offset_t lastaddr; 27019181Swpaul#ifdef DDB 27119181Swpaul vm_offset_t zstart = 0, zend = 0; 27219181Swpaul#endif 27319181Swpaul 27419181Swpaul i = 0; 27519181Swpaul 27619181Swpaul set_cpufuncs(); 27719181Swpaul 27819181Swpaul fake_preload[i++] = MODINFO_NAME; 27919181Swpaul fake_preload[i++] = strlen("elf kernel") + 1; 28019181Swpaul strcpy((char*)&fake_preload[i++], "elf kernel"); 28119181Swpaul i += 2; 28219181Swpaul fake_preload[i++] = MODINFO_TYPE; 28319181Swpaul fake_preload[i++] = strlen("elf kernel") + 1; 28419181Swpaul strcpy((char*)&fake_preload[i++], "elf kernel"); 28519181Swpaul i += 2; 28619181Swpaul fake_preload[i++] = MODINFO_ADDR; 28719181Swpaul fake_preload[i++] = sizeof(vm_offset_t); 28819181Swpaul fake_preload[i++] = KERNBASE; 28919181Swpaul fake_preload[i++] = MODINFO_SIZE; 29019181Swpaul fake_preload[i++] = sizeof(uint32_t); 29119181Swpaul fake_preload[i++] = (uint32_t)&end - KERNBASE; 29219181Swpaul#ifdef DDB 29319181Swpaul if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) { 29419181Swpaul fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM; 29519181Swpaul fake_preload[i++] = sizeof(vm_offset_t); 29619181Swpaul fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4); 29719181Swpaul fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM; 29819181Swpaul fake_preload[i++] = sizeof(vm_offset_t); 29919181Swpaul fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8); 30019181Swpaul lastaddr = *(uint32_t *)(KERNVIRTADDR + 8); 30119181Swpaul zend = lastaddr; 30219181Swpaul zstart = *(uint32_t *)(KERNVIRTADDR + 4); 30319181Swpaul ksym_start = zstart; 30419181Swpaul ksym_end = zend; 30519181Swpaul } else 306#endif 307 lastaddr = (vm_offset_t)&end; 308 309 fake_preload[i++] = 0; 310 fake_preload[i] = 0; 311 preload_metadata = (void *)fake_preload; 312 313 314 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 315 PCPU_SET(curthread, &thread0); 316 317#define KERNEL_TEXT_BASE (KERNBASE) 318 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 319 /* Define a macro to simplify memory allocation */ 320#define valloc_pages(var, np) \ 321 alloc_pages((var).pv_va, (np)); \ 322 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR); 323 324#define alloc_pages(var, np) \ 325 (var) = freemempos; \ 326 freemempos += (np * PAGE_SIZE); \ 327 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 328 329 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 330 freemempos += PAGE_SIZE; 331 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 332 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 333 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 334 valloc_pages(kernel_pt_table[loop], 335 L2_TABLE_SIZE / PAGE_SIZE); 336 } else { 337 kernel_pt_table[loop].pv_va = freemempos - 338 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) * 339 L2_TABLE_SIZE_REAL; 340 kernel_pt_table[loop].pv_pa = 341 kernel_pt_table[loop].pv_va - KERNVIRTADDR + 342 KERNPHYSADDR; 343 } 344 i++; 345 } 346 /* 347 * Allocate a page for the system page mapped to V0x00000000 348 * This page will just contain the system vectors and can be 349 * shared by all processes. 350 */ 351 valloc_pages(systempage, 1); 352 353 /* Allocate stacks for all modes */ 354 valloc_pages(irqstack, IRQ_STACK_SIZE); 355 valloc_pages(abtstack, ABT_STACK_SIZE); 356 valloc_pages(undstack, UND_STACK_SIZE); 357 valloc_pages(kernelstack, KSTACK_PAGES); 358 alloc_pages(minidataclean.pv_pa, 1); 359 valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE); 360 /* 361 * Now we start construction of the L1 page table 362 * We start by mapping the L2 page tables into the L1. 363 * This means that we can replace L1 mappings later on if necessary 364 */ 365 l1pagetable = kernel_l1pt.pv_va; 366 367 /* Map the L2 pages tables in the L1 page table */ 368 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 369 &kernel_pt_table[KERNEL_PT_SYS]); 370 for (i = 0; i < KERNEL_PT_KERN_NUM; i++) 371 pmap_link_l2pt(l1pagetable, KERNBASE + i * 0x100000, 372 &kernel_pt_table[KERNEL_PT_KERN + i]); 373 pmap_map_chunk(l1pagetable, KERNBASE, KERNPHYSADDR, 374 (((uint32_t)(lastaddr) - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1), 375 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 376 afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE 377 - 1)); 378 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) { 379 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000, 380 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]); 381 } 382 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa, 383 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 384 385 386 /* Map the vector page. */ 387 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 388 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 389 /* Map the stack pages */ 390 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 391 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 392 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 393 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 394 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 395 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 396 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 397 KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 398 399 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 400 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 401 pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa, 402 MSGBUF_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 403 404 405 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 406 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 407 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 408 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 409 } 410 411 pmap_devmap_bootstrap(l1pagetable, kb920x_devmap); 412 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 413 setttb(kernel_l1pt.pv_pa); 414 cpu_tlb_flushID(); 415 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 416 cninit(); 417 memsize = board_init(); 418 physmem = memsize / PAGE_SIZE; 419 420 /* 421 * Pages were allocated during the secondary bootstrap for the 422 * stacks for different CPU modes. 423 * We must now set the r13 registers in the different CPU modes to 424 * point to these stacks. 425 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 426 * of the stack memory. 427 */ 428 429 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 430 set_stackptr(PSR_IRQ32_MODE, 431 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 432 set_stackptr(PSR_ABT32_MODE, 433 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 434 set_stackptr(PSR_UND32_MODE, 435 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 436 437 438 439 /* 440 * We must now clean the cache again.... 441 * Cleaning may be done by reading new data to displace any 442 * dirty data in the cache. This will have happened in setttb() 443 * but since we are boot strapping the addresses used for the read 444 * may have just been remapped and thus the cache could be out 445 * of sync. A re-clean after the switch will cure this. 446 * After booting there are no gross reloations of the kernel thus 447 * this problem will not occur after initarm(). 448 */ 449 cpu_idcache_wbinv_all(); 450 451 /* Set stack for exception handlers */ 452 453 data_abort_handler_address = (u_int)data_abort_handler; 454 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 455 undefined_handler_address = (u_int)undefinedinstruction_bounce; 456 undefined_init(); 457 458#ifdef KSE 459 proc_linkup(&proc0, &ksegrp0, &thread0); 460#else 461 proc_linkup(&proc0, &thread0); 462#endif 463 thread0.td_kstack = kernelstack.pv_va; 464 thread0.td_pcb = (struct pcb *) 465 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 466 thread0.td_pcb->pcb_flags = 0; 467 thread0.td_frame = &proc0_tf; 468 pcpup->pc_curpcb = thread0.td_pcb; 469 470 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 471 472 pmap_curmaxkvaddr = afterkern + 0x100000 * (KERNEL_PT_KERN_NUM - 1); 473 /* 474 * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before 475 * calling pmap_bootstrap. 476 */ 477 dump_avail[0] = KERNPHYSADDR; 478 dump_avail[1] = KERNPHYSADDR + memsize; 479 dump_avail[2] = 0; 480 dump_avail[3] = 0; 481 482 pmap_bootstrap(freemempos, 483 KERNVIRTADDR + 3 * memsize, 484 &kernel_l1pt); 485 msgbufp = (void*)msgbufpv.pv_va; 486 msgbufinit(msgbufp, MSGBUF_SIZE); 487 mutex_init(); 488 489 i = 0; 490 491 phys_avail[0] = virtual_avail - KERNVIRTADDR + KERNPHYSADDR; 492 phys_avail[1] = KERNPHYSADDR + memsize; 493 phys_avail[2] = 0; 494 phys_avail[3] = 0; 495 /* Do basic tuning, hz etc */ 496 init_param1(); 497 init_param2(physmem); 498 kdb_init(); 499 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 500 sizeof(struct pcb))); 501} 502