at91sam9x5.c revision 239190
1237742Simp/*-
2237742Simp * Copyright (c) 2005 Olivier Houchard.  All rights reserved.
3237742Simp * Copyright (c) 2010 Greg Ansley.  All rights reserved.
4237742Simp * Copyright (c) 2012 M. Warner Losh..  All rights reserved.
5237742Simp *
6237742Simp * Redistribution and use in source and binary forms, with or without
7237742Simp * modification, are permitted provided that the following conditions
8237742Simp * are met:
9237742Simp * 1. Redistributions of source code must retain the above copyright
10237742Simp *    notice, this list of conditions and the following disclaimer.
11237742Simp * 2. Redistributions in binary form must reproduce the above copyright
12237742Simp *    notice, this list of conditions and the following disclaimer in the
13237742Simp *    documentation and/or other materials provided with the distribution.
14237742Simp *
15237742Simp * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16237742Simp * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17237742Simp * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18237742Simp * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
19237742Simp * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20237742Simp * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21237742Simp * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22237742Simp * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23237742Simp * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24237742Simp * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25237742Simp * SUCH DAMAGE.
26237742Simp */
27237742Simp
28237742Simp#include <sys/cdefs.h>
29237742Simp__FBSDID("$FreeBSD: head/sys/arm/at91/at91sam9x5.c 239190 2012-08-11 05:45:19Z imp $");
30237742Simp
31237742Simp#include <sys/param.h>
32237742Simp#include <sys/systm.h>
33237742Simp#include <sys/bus.h>
34237742Simp#include <sys/kernel.h>
35237742Simp#include <sys/malloc.h>
36237742Simp#include <sys/module.h>
37237742Simp
38237742Simp#include <machine/bus.h>
39237742Simp
40237742Simp#include <arm/at91/at91var.h>
41238331Simp#include <arm/at91/at91reg.h>
42238376Simp#include <arm/at91/at91soc.h>
43237742Simp#include <arm/at91/at91_aicreg.h>
44238922Simp#include <arm/at91/at91sam9x5reg.h>
45238376Simp#include <arm/at91/at91_pitreg.h>
46237742Simp#include <arm/at91/at91_pmcreg.h>
47237742Simp#include <arm/at91/at91_pmcvar.h>
48238376Simp#include <arm/at91/at91_rstreg.h>
49237742Simp
50237742Simp/*
51237742Simp * Standard priority levels for the system.  0 is lowest and 7 is highest.
52237742Simp * These values are the ones Atmel uses for its Linux port
53237742Simp */
54237742Simpstatic const int at91_irq_prio[32] =
55237742Simp{
56237743Simp	7,	/* Advanced Interrupt Controller (FIQ) */
57237742Simp	7,	/* System Peripherals */
58237743Simp	1,	/* Parallel IO Controller A and B */
59237743Simp	1,	/* Parallel IO Controller C and D */
60237743Simp	4,	/* Soft Modem */
61237742Simp	5,	/* USART 0 */
62237742Simp	5,	/* USART 1 */
63237742Simp	5,	/* USART 2 */
64237743Simp	5,	/* USART 3 */
65237743Simp	6,	/* Two-Wire Interface 0 */
66237743Simp	6,	/* Two-Wire Interface 1 */
67237743Simp	6,	/* Two-Wire Interface 2 */
68237743Simp	0,	/* Multimedia Card Interface 0 */
69237742Simp	5,	/* Serial Peripheral Interface 0 */
70237742Simp	5,	/* Serial Peripheral Interface 1 */
71237743Simp	5,	/* UART 0 */
72237743Simp	5,	/* UART 1 */
73237743Simp	0,	/* Timer Counter 0, 1, 2, 3, 4 and 5 */
74237743Simp	0,	/* Pulse Width Modulation Controller */
75237743Simp	0,	/* ADC Controller */
76237743Simp	0,	/* DMA Controller 0 */
77237743Simp	0,	/* DMA Controller 1 */
78237743Simp	2,	/* USB Host High Speed port */
79237743Simp	2,	/* USB Device High speed port */
80237743Simp	3,	/* Ethernet MAC 0 */
81237743Simp	3,	/* LDC Controller or Image Sensor Interface */
82237743Simp	0,	/* Multimedia Card Interface 1 */
83237743Simp	3,	/* Ethernet MAC 1 */
84237743Simp	4,	/* Synchronous Serial Interface */
85237743Simp	4,	/* CAN Controller 0 */
86237743Simp	4,	/* CAN Controller 1 */
87237743Simp	0,	/* Advanced Interrupt Controller (IRQ0) */
88237742Simp};
89237742Simp
90237742Simp#define DEVICE(_name, _id, _unit)		\
91237742Simp	{					\
92237742Simp		_name, _unit,			\
93237742Simp		AT91SAM9X25_ ## _id ##_BASE,	\
94237742Simp		AT91SAM9X25_ ## _id ## _SIZE,	\
95237742Simp		AT91SAM9X25_IRQ_ ## _id		\
96237742Simp	}
97237742Simp
98237742Simpstatic const struct cpu_devs at91_devs[] =
99237742Simp{
100237742Simp	DEVICE("at91_pmc", PMC,  0),
101237742Simp	DEVICE("at91_wdt", WDT,  0),
102237742Simp	DEVICE("at91_rst", RSTC, 0),
103237742Simp	DEVICE("at91_pit", PIT,  0),
104237742Simp	DEVICE("at91_pio", PIOA, 0),
105237742Simp	DEVICE("at91_pio", PIOB, 1),
106237742Simp	DEVICE("at91_pio", PIOC, 2),
107237744Simp	DEVICE("at91_pio", PIOD, 3),
108237742Simp	DEVICE("at91_twi", TWI0, 0),
109237742Simp	DEVICE("at91_twi", TWI1, 1),
110237742Simp	DEVICE("at91_twi", TWI2, 2),
111237742Simp	DEVICE("at91_mci", HSMCI0, 0),
112237742Simp	DEVICE("at91_mci", HSMCI1, 1),
113237742Simp	DEVICE("uart", DBGU,   0),
114237742Simp	DEVICE("uart", USART0, 1),
115237742Simp	DEVICE("uart", USART1, 2),
116237742Simp	DEVICE("uart", USART2, 3),
117237742Simp	DEVICE("uart", USART3, 4),
118237742Simp	DEVICE("spi",  SPI0,   0),
119237742Simp	DEVICE("spi",  SPI1,   1),
120237742Simp	DEVICE("macb", EMAC0,  0),
121237742Simp	DEVICE("macb", EMAC1,  0),
122237742Simp	DEVICE("nand", NAND,   0),
123237742Simp	DEVICE("ohci", OHCI,   0),
124237742Simp	DEVICE("ehci", EHCI,   0),
125237742Simp	{ 0, 0, 0, 0, 0 }
126237742Simp};
127237742Simp
128237742Simpstatic void
129238397Simpat91_clock_init(void)
130237742Simp{
131237742Simp	struct at91_pmc_clock *clk;
132237742Simp
133237742Simp	/* Update USB device port clock info */
134237742Simp	clk = at91_pmc_clock_ref("udpck");
135237742Simp	clk->pmc_mask  = PMC_SCER_UDP_SAM9;
136237742Simp	at91_pmc_clock_deref(clk);
137237742Simp
138237742Simp	/* Update USB host port clock info */
139237742Simp	clk = at91_pmc_clock_ref("uhpck");
140237742Simp	clk->pmc_mask  = PMC_SCER_UHP_SAM9;
141237742Simp	at91_pmc_clock_deref(clk);
142237742Simp
143237742Simp	/* Each SOC has different PLL contraints */
144237742Simp	clk = at91_pmc_clock_ref("plla");
145237742Simp	clk->pll_min_in    = SAM9X25_PLL_A_MIN_IN_FREQ;		/*   2 MHz */
146237742Simp	clk->pll_max_in    = SAM9X25_PLL_A_MAX_IN_FREQ;		/*  32 MHz */
147237742Simp	clk->pll_min_out   = SAM9X25_PLL_A_MIN_OUT_FREQ;	/* 400 MHz */
148237742Simp	clk->pll_max_out   = SAM9X25_PLL_A_MAX_OUT_FREQ;	/* 800 MHz */
149237742Simp	clk->pll_mul_shift = SAM9X25_PLL_A_MUL_SHIFT;
150237742Simp	clk->pll_mul_mask  = SAM9X25_PLL_A_MUL_MASK;
151237742Simp	clk->pll_div_shift = SAM9X25_PLL_A_DIV_SHIFT;
152237742Simp	clk->pll_div_mask  = SAM9X25_PLL_A_DIV_MASK;
153239190Simp	clk->set_outb      = at91_pmc_800mhz_plla_outb;
154237742Simp	at91_pmc_clock_deref(clk);
155237742Simp
156237742Simp	clk = at91_pmc_clock_ref("pllb");
157237742Simp	clk->pll_min_in    = SAM9X25_PLL_B_MIN_IN_FREQ;		/*   2 MHz */
158237742Simp	clk->pll_max_in    = SAM9X25_PLL_B_MAX_IN_FREQ;		/*  32 MHz */
159237742Simp	clk->pll_min_out   = SAM9X25_PLL_B_MIN_OUT_FREQ;	/*  30 MHz */
160237742Simp	clk->pll_max_out   = SAM9X25_PLL_B_MAX_OUT_FREQ;	/* 100 MHz */
161237742Simp	clk->pll_mul_shift = SAM9X25_PLL_B_MUL_SHIFT;
162237742Simp	clk->pll_mul_mask  = SAM9X25_PLL_B_MUL_MASK;
163237742Simp	clk->pll_div_shift = SAM9X25_PLL_B_DIV_SHIFT;
164237742Simp	clk->pll_div_mask  = SAM9X25_PLL_B_DIV_MASK;
165239190Simp	clk->set_outb      = at91_pmc_800mhz_pllb_outb;
166237742Simp	at91_pmc_clock_deref(clk);
167237742Simp}
168237742Simp
169238376Simpstatic struct at91_soc_data soc_data = {
170238376Simp	.soc_delay = at91_pit_delay,
171238389Simp	.soc_reset = at91_rst_cpu_reset,
172238397Simp	.soc_clock_init = at91_clock_init,
173238389Simp	.soc_irq_prio = at91_irq_prio,
174238397Simp	.soc_children = at91_devs,
175238376Simp};
176238376Simp
177238376SimpAT91_SOC_SUB(AT91_T_SAM9X5, AT91_ST_SAM9X25, &soc_data);
178