1221828Sgrehan/*-
2221828Sgrehan * Copyright (c) 2011 NetApp, Inc.
3221828Sgrehan * All rights reserved.
4221828Sgrehan *
5221828Sgrehan * Redistribution and use in source and binary forms, with or without
6221828Sgrehan * modification, are permitted provided that the following conditions
7221828Sgrehan * are met:
8221828Sgrehan * 1. Redistributions of source code must retain the above copyright
9221828Sgrehan *    notice, this list of conditions and the following disclaimer.
10221828Sgrehan * 2. Redistributions in binary form must reproduce the above copyright
11221828Sgrehan *    notice, this list of conditions and the following disclaimer in the
12221828Sgrehan *    documentation and/or other materials provided with the distribution.
13221828Sgrehan *
14221828Sgrehan * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
15221828Sgrehan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16221828Sgrehan * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17221828Sgrehan * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
18221828Sgrehan * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19221828Sgrehan * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20221828Sgrehan * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21221828Sgrehan * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22221828Sgrehan * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23221828Sgrehan * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24221828Sgrehan * SUCH DAMAGE.
25221828Sgrehan *
26221828Sgrehan * $FreeBSD: releng/10.2/sys/amd64/vmm/intel/vmx_msr.h 276349 2014-12-28 21:27:13Z neel $
27221828Sgrehan */
28221828Sgrehan
29221828Sgrehan#ifndef _VMX_MSR_H_
30221828Sgrehan#define	_VMX_MSR_H_
31221828Sgrehan
32276349Sneelstruct vmx;
33276349Sneel
34276349Sneelvoid vmx_msr_init(void);
35276349Sneelvoid vmx_msr_guest_init(struct vmx *vmx, int vcpuid);
36276349Sneelvoid vmx_msr_guest_enter(struct vmx *vmx, int vcpuid);
37276349Sneelvoid vmx_msr_guest_exit(struct vmx *vmx, int vcpuid);
38276349Sneelint vmx_rdmsr(struct vmx *, int vcpuid, u_int num, uint64_t *val, bool *retu);
39276349Sneelint vmx_wrmsr(struct vmx *, int vcpuid, u_int num, uint64_t val, bool *retu);
40276349Sneel
41221828Sgrehanuint32_t vmx_revision(void);
42221828Sgrehan
43221828Sgrehanint vmx_set_ctlreg(int ctl_reg, int true_ctl_reg, uint32_t ones_mask,
44221828Sgrehan		   uint32_t zeros_mask, uint32_t *retval);
45221828Sgrehan
46221828Sgrehan/*
47221828Sgrehan * According to Section 21.10.4 "Software Access to Related Structures",
48221828Sgrehan * changes to data structures pointed to by the VMCS must be made only when
49221828Sgrehan * there is no logical processor with a current VMCS that points to the
50221828Sgrehan * data structure.
51221828Sgrehan *
52221828Sgrehan * This pretty much limits us to configuring the MSR bitmap before VMCS
53221828Sgrehan * initialization for SMP VMs. Unless of course we do it the hard way - which
54221828Sgrehan * would involve some form of synchronization between the vcpus to vmclear
55221828Sgrehan * all VMCSs' that point to the bitmap.
56221828Sgrehan */
57221828Sgrehan#define	MSR_BITMAP_ACCESS_NONE	0x0
58221828Sgrehan#define	MSR_BITMAP_ACCESS_READ	0x1
59221828Sgrehan#define	MSR_BITMAP_ACCESS_WRITE	0x2
60221828Sgrehan#define	MSR_BITMAP_ACCESS_RW	(MSR_BITMAP_ACCESS_READ|MSR_BITMAP_ACCESS_WRITE)
61221828Sgrehanvoid	msr_bitmap_initialize(char *bitmap);
62221828Sgrehanint	msr_bitmap_change_access(char *bitmap, u_int msr, int access);
63221828Sgrehan
64276349Sneel#define	guest_msr_rw(vmx, msr) \
65276349Sneel    msr_bitmap_change_access((vmx)->msr_bitmap, (msr), MSR_BITMAP_ACCESS_RW)
66276349Sneel
67276349Sneel#define	guest_msr_ro(vmx, msr) \
68276349Sneel    msr_bitmap_change_access((vmx)->msr_bitmap, (msr), MSR_BITMAP_ACCESS_READ)
69276349Sneel
70221828Sgrehan#endif
71