pmap.c revision 130224
1/*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * Copyright (c) 2003 Peter Wemm 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * the Systems Programming Group of the University of Utah Computer 13 * Science Department and William Jolitz of UUNET Technologies Inc. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44 */ 45/*- 46 * Copyright (c) 2003 Networks Associates Technology, Inc. 47 * All rights reserved. 48 * 49 * This software was developed for the FreeBSD Project by Jake Burkholder, 50 * Safeport Network Services, and Network Associates Laboratories, the 51 * Security Research Division of Network Associates, Inc. under 52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53 * CHATS research program. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74 * SUCH DAMAGE. 75 */ 76 77#include <sys/cdefs.h> 78__FBSDID("$FreeBSD: head/sys/amd64/amd64/pmap.c 130224 2004-06-08 01:02:52Z peter $"); 79 80/* 81 * Manages physical address maps. 82 * 83 * In addition to hardware address maps, this 84 * module is called upon to provide software-use-only 85 * maps which may or may not be stored in the same 86 * form as hardware maps. These pseudo-maps are 87 * used to store intermediate results from copy 88 * operations to and from address spaces. 89 * 90 * Since the information managed by this module is 91 * also stored by the logical address mapping module, 92 * this module may throw away valid virtual-to-physical 93 * mappings at almost any time. However, invalidations 94 * of virtual-to-physical mappings must be done as 95 * requested. 96 * 97 * In order to cope with hardware architectures which 98 * make virtual-to-physical map invalidates expensive, 99 * this module may delay invalidate or reduced protection 100 * operations until such time as they are actually 101 * necessary. This module is given full information as 102 * to which processors are currently using which maps, 103 * and to when physical maps must be made correct. 104 */ 105 106#include "opt_msgbuf.h" 107#include "opt_kstack_pages.h" 108 109#include <sys/param.h> 110#include <sys/systm.h> 111#include <sys/kernel.h> 112#include <sys/lock.h> 113#include <sys/mman.h> 114#include <sys/msgbuf.h> 115#include <sys/mutex.h> 116#include <sys/proc.h> 117#include <sys/sx.h> 118#include <sys/user.h> 119#include <sys/vmmeter.h> 120#include <sys/sched.h> 121#include <sys/sysctl.h> 122#ifdef SMP 123#include <sys/smp.h> 124#endif 125 126#include <vm/vm.h> 127#include <vm/vm_param.h> 128#include <vm/vm_kern.h> 129#include <vm/vm_page.h> 130#include <vm/vm_map.h> 131#include <vm/vm_object.h> 132#include <vm/vm_extern.h> 133#include <vm/vm_pageout.h> 134#include <vm/vm_pager.h> 135#include <vm/uma.h> 136 137#include <machine/cpu.h> 138#include <machine/cputypes.h> 139#include <machine/md_var.h> 140#include <machine/specialreg.h> 141#ifdef SMP 142#include <machine/smp.h> 143#endif 144 145#define PMAP_KEEP_PDIRS 146#ifndef PMAP_SHPGPERPROC 147#define PMAP_SHPGPERPROC 200 148#endif 149 150#if defined(DIAGNOSTIC) 151#define PMAP_DIAGNOSTIC 152#endif 153 154#define MINPV 2048 155 156#if !defined(PMAP_DIAGNOSTIC) 157#define PMAP_INLINE __inline 158#else 159#define PMAP_INLINE 160#endif 161 162struct pmap kernel_pmap_store; 163LIST_HEAD(pmaplist, pmap); 164static struct pmaplist allpmaps; 165static struct mtx allpmaps_lock; 166 167vm_paddr_t avail_start; /* PA of first available physical page */ 168vm_paddr_t avail_end; /* PA of last available physical page */ 169vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 170vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 171static boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 172 173static int nkpt; 174static int ndmpdp; 175static vm_paddr_t dmaplimit; 176vm_offset_t kernel_vm_end; 177pt_entry_t pg_nx; 178 179static u_int64_t KPTphys; /* phys addr of kernel level 1 */ 180static u_int64_t KPDphys; /* phys addr of kernel level 2 */ 181static u_int64_t KPDPphys; /* phys addr of kernel level 3 */ 182u_int64_t KPML4phys; /* phys addr of kernel level 4 */ 183 184static u_int64_t DMPDphys; /* phys addr of direct mapped level 2 */ 185static u_int64_t DMPDPphys; /* phys addr of direct mapped level 3 */ 186 187/* 188 * Data for the pv entry allocation mechanism 189 */ 190static uma_zone_t pvzone; 191static struct vm_object pvzone_obj; 192static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 193int pmap_pagedaemon_waken; 194 195/* 196 * All those kernel PT submaps that BSD is so fond of 197 */ 198pt_entry_t *CMAP1 = 0; 199caddr_t CADDR1 = 0; 200static pt_entry_t *msgbufmap; 201struct msgbuf *msgbufp = 0; 202 203/* 204 * Crashdump maps. 205 */ 206static pt_entry_t *pt_crashdumpmap; 207static caddr_t crashdumpmap; 208 209static PMAP_INLINE void free_pv_entry(pv_entry_t pv); 210static pv_entry_t get_pv_entry(void); 211static void pmap_clear_ptes(vm_page_t m, int bit) 212 __always_inline; 213 214static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva); 215static void pmap_remove_page(struct pmap *pmap, vm_offset_t va); 216static int pmap_remove_entry(struct pmap *pmap, vm_page_t m, 217 vm_offset_t va); 218static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, 219 vm_page_t mpte, vm_page_t m); 220 221static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va); 222 223static vm_page_t _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex); 224static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t); 225static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 226 227CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 228CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 229 230/* 231 * Move the kernel virtual free pointer to the next 232 * 2MB. This is used to help improve performance 233 * by using a large (2MB) page for much of the kernel 234 * (.text, .data, .bss) 235 */ 236static vm_offset_t 237pmap_kmem_choose(vm_offset_t addr) 238{ 239 vm_offset_t newaddr = addr; 240 241 newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1); 242 return newaddr; 243} 244 245/********************/ 246/* Inline functions */ 247/********************/ 248 249/* Return a non-clipped PD index for a given VA */ 250static __inline vm_pindex_t 251pmap_pde_pindex(vm_offset_t va) 252{ 253 return va >> PDRSHIFT; 254} 255 256 257/* Return various clipped indexes for a given VA */ 258static __inline vm_pindex_t 259pmap_pte_index(vm_offset_t va) 260{ 261 262 return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1)); 263} 264 265static __inline vm_pindex_t 266pmap_pde_index(vm_offset_t va) 267{ 268 269 return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1)); 270} 271 272static __inline vm_pindex_t 273pmap_pdpe_index(vm_offset_t va) 274{ 275 276 return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1)); 277} 278 279static __inline vm_pindex_t 280pmap_pml4e_index(vm_offset_t va) 281{ 282 283 return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1)); 284} 285 286/* Return a pointer to the PML4 slot that corresponds to a VA */ 287static __inline pml4_entry_t * 288pmap_pml4e(pmap_t pmap, vm_offset_t va) 289{ 290 291 if (!pmap) 292 return NULL; 293 return (&pmap->pm_pml4[pmap_pml4e_index(va)]); 294} 295 296/* Return a pointer to the PDP slot that corresponds to a VA */ 297static __inline pdp_entry_t * 298pmap_pdpe(pmap_t pmap, vm_offset_t va) 299{ 300 pml4_entry_t *pml4e; 301 pdp_entry_t *pdpe; 302 303 pml4e = pmap_pml4e(pmap, va); 304 if (pml4e == NULL || (*pml4e & PG_V) == 0) 305 return NULL; 306 pdpe = (pdp_entry_t *)PHYS_TO_DMAP(*pml4e & PG_FRAME); 307 return (&pdpe[pmap_pdpe_index(va)]); 308} 309 310/* Return a pointer to the PD slot that corresponds to a VA */ 311static __inline pd_entry_t * 312pmap_pde(pmap_t pmap, vm_offset_t va) 313{ 314 pdp_entry_t *pdpe; 315 pd_entry_t *pde; 316 317 pdpe = pmap_pdpe(pmap, va); 318 if (pdpe == NULL || (*pdpe & PG_V) == 0) 319 return NULL; 320 pde = (pd_entry_t *)PHYS_TO_DMAP(*pdpe & PG_FRAME); 321 return (&pde[pmap_pde_index(va)]); 322} 323 324/* Return a pointer to the PT slot that corresponds to a VA */ 325static __inline pt_entry_t * 326pmap_pte(pmap_t pmap, vm_offset_t va) 327{ 328 pd_entry_t *pde; 329 pt_entry_t *pte; 330 331 pde = pmap_pde(pmap, va); 332 if (pde == NULL || (*pde & PG_V) == 0) 333 return NULL; 334 if ((*pde & PG_PS) != 0) /* compat with i386 pmap_pte() */ 335 return ((pt_entry_t *)pde); 336 pte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME); 337 return (&pte[pmap_pte_index(va)]); 338} 339 340 341PMAP_INLINE pt_entry_t * 342vtopte(vm_offset_t va) 343{ 344 u_int64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1); 345 346 return (PTmap + (amd64_btop(va) & mask)); 347} 348 349static u_int64_t 350allocpages(int n) 351{ 352 u_int64_t ret; 353 354 ret = avail_start; 355 bzero((void *)ret, n * PAGE_SIZE); 356 avail_start += n * PAGE_SIZE; 357 return (ret); 358} 359 360static void 361create_pagetables(void) 362{ 363 int i; 364 365 /* Allocate pages */ 366 KPTphys = allocpages(NKPT); 367 KPML4phys = allocpages(1); 368 KPDPphys = allocpages(NKPML4E); 369 KPDphys = allocpages(NKPDPE); 370 371 ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT; 372 if (ndmpdp < 4) /* Minimum 4GB of dirmap */ 373 ndmpdp = 4; 374 DMPDPphys = allocpages(NDMPML4E); 375 DMPDphys = allocpages(ndmpdp); 376 dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT; 377 378 /* Fill in the underlying page table pages */ 379 /* Read-only from zero to physfree */ 380 /* XXX not fully used, underneath 2M pages */ 381 for (i = 0; (i << PAGE_SHIFT) < avail_start; i++) { 382 ((pt_entry_t *)KPTphys)[i] = i << PAGE_SHIFT; 383 ((pt_entry_t *)KPTphys)[i] |= PG_RW | PG_V | PG_G; 384 } 385 386 /* Now map the page tables at their location within PTmap */ 387 for (i = 0; i < NKPT; i++) { 388 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT); 389 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V; 390 } 391 392 /* Map from zero to end of allocations under 2M pages */ 393 /* This replaces some of the KPTphys entries above */ 394 for (i = 0; (i << PDRSHIFT) < avail_start; i++) { 395 ((pd_entry_t *)KPDphys)[i] = i << PDRSHIFT; 396 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G; 397 } 398 399 /* And connect up the PD to the PDP */ 400 for (i = 0; i < NKPDPE; i++) { 401 ((pdp_entry_t *)KPDPphys)[i + KPDPI] = KPDphys + (i << PAGE_SHIFT); 402 ((pdp_entry_t *)KPDPphys)[i + KPDPI] |= PG_RW | PG_V | PG_U; 403 } 404 405 406 /* Now set up the direct map space using 2MB pages */ 407 for (i = 0; i < NPDEPG * ndmpdp; i++) { 408 ((pd_entry_t *)DMPDphys)[i] = (vm_paddr_t)i << PDRSHIFT; 409 ((pd_entry_t *)DMPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G; 410 } 411 412 /* And the direct map space's PDP */ 413 for (i = 0; i < ndmpdp; i++) { 414 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys + (i << PAGE_SHIFT); 415 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_U; 416 } 417 418 /* And recursively map PML4 to itself in order to get PTmap */ 419 ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys; 420 ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U; 421 422 /* Connect the Direct Map slot up to the PML4 */ 423 ((pdp_entry_t *)KPML4phys)[DMPML4I] = DMPDPphys; 424 ((pdp_entry_t *)KPML4phys)[DMPML4I] |= PG_RW | PG_V | PG_U; 425 426 /* Connect the KVA slot up to the PML4 */ 427 ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys; 428 ((pdp_entry_t *)KPML4phys)[KPML4I] |= PG_RW | PG_V | PG_U; 429} 430 431/* 432 * Bootstrap the system enough to run with virtual memory. 433 * 434 * On amd64 this is called after mapping has already been enabled 435 * and just syncs the pmap module with what has already been done. 436 * [We can't call it easily with mapping off since the kernel is not 437 * mapped with PA == VA, hence we would have to relocate every address 438 * from the linked base (virtual) address "KERNBASE" to the actual 439 * (physical) address starting relative to 0] 440 */ 441void 442pmap_bootstrap(firstaddr) 443 vm_paddr_t *firstaddr; 444{ 445 vm_offset_t va; 446 pt_entry_t *pte; 447 448 avail_start = *firstaddr; 449 450 /* 451 * Create an initial set of page tables to run the kernel in. 452 */ 453 create_pagetables(); 454 *firstaddr = avail_start; 455 456 virtual_avail = (vm_offset_t) KERNBASE + avail_start; 457 virtual_avail = pmap_kmem_choose(virtual_avail); 458 459 virtual_end = VM_MAX_KERNEL_ADDRESS; 460 461 462 /* XXX do %cr0 as well */ 463 load_cr4(rcr4() | CR4_PGE | CR4_PSE); 464 load_cr3(KPML4phys); 465 466 /* 467 * Initialize the kernel pmap (which is statically allocated). 468 */ 469 kernel_pmap->pm_pml4 = (pdp_entry_t *) (KERNBASE + KPML4phys); 470 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 471 TAILQ_INIT(&kernel_pmap->pm_pvlist); 472 LIST_INIT(&allpmaps); 473 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 474 mtx_lock_spin(&allpmaps_lock); 475 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 476 mtx_unlock_spin(&allpmaps_lock); 477 nkpt = NKPT; 478 479 /* 480 * Reserve some special page table entries/VA space for temporary 481 * mapping of pages. 482 */ 483#define SYSMAP(c, p, v, n) \ 484 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 485 486 va = virtual_avail; 487 pte = vtopte(va); 488 489 /* 490 * CMAP1 is only used for the memory test. 491 */ 492 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 493 494 /* 495 * Crashdump maps. 496 */ 497 SYSMAP(caddr_t, pt_crashdumpmap, crashdumpmap, MAXDUMPPGS); 498 499 /* 500 * msgbufp is used to map the system message buffer. 501 * XXX msgbufmap is not used. 502 */ 503 SYSMAP(struct msgbuf *, msgbufmap, msgbufp, 504 atop(round_page(MSGBUF_SIZE))) 505 506 virtual_avail = va; 507 508 *CMAP1 = 0; 509 510 invltlb(); 511} 512 513/* 514 * Initialize the pmap module. 515 * Called by vm_init, to initialize any structures that the pmap 516 * system needs to map virtual memory. 517 * pmap_init has been enhanced to support in a fairly consistant 518 * way, discontiguous physical memory. 519 */ 520void 521pmap_init(void) 522{ 523 int i; 524 525 /* 526 * Allocate memory for random pmap data structures. Includes the 527 * pv_head_table. 528 */ 529 530 for(i = 0; i < vm_page_array_size; i++) { 531 vm_page_t m; 532 533 m = &vm_page_array[i]; 534 TAILQ_INIT(&m->md.pv_list); 535 m->md.pv_list_count = 0; 536 } 537 538 /* 539 * init the pv free list 540 */ 541 pvzone = uma_zcreate("PV ENTRY", sizeof (struct pv_entry), NULL, NULL, 542 NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE); 543 uma_prealloc(pvzone, MINPV); 544 545 /* 546 * Now it is safe to enable pv_table recording. 547 */ 548 pmap_initialized = TRUE; 549} 550 551/* 552 * Initialize the address space (zone) for the pv_entries. Set a 553 * high water mark so that the system can recover from excessive 554 * numbers of pv entries. 555 */ 556void 557pmap_init2() 558{ 559 int shpgperproc = PMAP_SHPGPERPROC; 560 561 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 562 pv_entry_max = shpgperproc * maxproc + vm_page_array_size; 563 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 564 pv_entry_high_water = 9 * (pv_entry_max / 10); 565 uma_zone_set_obj(pvzone, &pvzone_obj, pv_entry_max); 566} 567 568 569/*************************************************** 570 * Low level helper routines..... 571 ***************************************************/ 572 573#if defined(PMAP_DIAGNOSTIC) 574 575/* 576 * This code checks for non-writeable/modified pages. 577 * This should be an invalid condition. 578 */ 579static int 580pmap_nw_modified(pt_entry_t ptea) 581{ 582 int pte; 583 584 pte = (int) ptea; 585 586 if ((pte & (PG_M|PG_RW)) == PG_M) 587 return 1; 588 else 589 return 0; 590} 591#endif 592 593 594/* 595 * this routine defines the region(s) of memory that should 596 * not be tested for the modified bit. 597 */ 598static PMAP_INLINE int 599pmap_track_modified(vm_offset_t va) 600{ 601 if ((va < kmi.clean_sva) || (va >= kmi.clean_eva)) 602 return 1; 603 else 604 return 0; 605} 606 607#ifdef SMP 608/* 609 * For SMP, these functions have to use the IPI mechanism for coherence. 610 */ 611void 612pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 613{ 614 u_int cpumask; 615 u_int other_cpus; 616 617 if (smp_started) { 618 if (!(read_rflags() & PSL_I)) 619 panic("%s: interrupts disabled", __func__); 620 mtx_lock_spin(&smp_tlb_mtx); 621 } else 622 critical_enter(); 623 /* 624 * We need to disable interrupt preemption but MUST NOT have 625 * interrupts disabled here. 626 * XXX we may need to hold schedlock to get a coherent pm_active 627 * XXX critical sections disable interrupts again 628 */ 629 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 630 invlpg(va); 631 smp_invlpg(va); 632 } else { 633 cpumask = PCPU_GET(cpumask); 634 other_cpus = PCPU_GET(other_cpus); 635 if (pmap->pm_active & cpumask) 636 invlpg(va); 637 if (pmap->pm_active & other_cpus) 638 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 639 } 640 if (smp_started) 641 mtx_unlock_spin(&smp_tlb_mtx); 642 else 643 critical_exit(); 644} 645 646void 647pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 648{ 649 u_int cpumask; 650 u_int other_cpus; 651 vm_offset_t addr; 652 653 if (smp_started) { 654 if (!(read_rflags() & PSL_I)) 655 panic("%s: interrupts disabled", __func__); 656 mtx_lock_spin(&smp_tlb_mtx); 657 } else 658 critical_enter(); 659 /* 660 * We need to disable interrupt preemption but MUST NOT have 661 * interrupts disabled here. 662 * XXX we may need to hold schedlock to get a coherent pm_active 663 * XXX critical sections disable interrupts again 664 */ 665 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 666 for (addr = sva; addr < eva; addr += PAGE_SIZE) 667 invlpg(addr); 668 smp_invlpg_range(sva, eva); 669 } else { 670 cpumask = PCPU_GET(cpumask); 671 other_cpus = PCPU_GET(other_cpus); 672 if (pmap->pm_active & cpumask) 673 for (addr = sva; addr < eva; addr += PAGE_SIZE) 674 invlpg(addr); 675 if (pmap->pm_active & other_cpus) 676 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 677 sva, eva); 678 } 679 if (smp_started) 680 mtx_unlock_spin(&smp_tlb_mtx); 681 else 682 critical_exit(); 683} 684 685void 686pmap_invalidate_all(pmap_t pmap) 687{ 688 u_int cpumask; 689 u_int other_cpus; 690 691 if (smp_started) { 692 if (!(read_rflags() & PSL_I)) 693 panic("%s: interrupts disabled", __func__); 694 mtx_lock_spin(&smp_tlb_mtx); 695 } else 696 critical_enter(); 697 /* 698 * We need to disable interrupt preemption but MUST NOT have 699 * interrupts disabled here. 700 * XXX we may need to hold schedlock to get a coherent pm_active 701 * XXX critical sections disable interrupts again 702 */ 703 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 704 invltlb(); 705 smp_invltlb(); 706 } else { 707 cpumask = PCPU_GET(cpumask); 708 other_cpus = PCPU_GET(other_cpus); 709 if (pmap->pm_active & cpumask) 710 invltlb(); 711 if (pmap->pm_active & other_cpus) 712 smp_masked_invltlb(pmap->pm_active & other_cpus); 713 } 714 if (smp_started) 715 mtx_unlock_spin(&smp_tlb_mtx); 716 else 717 critical_exit(); 718} 719#else /* !SMP */ 720/* 721 * Normal, non-SMP, invalidation functions. 722 * We inline these within pmap.c for speed. 723 */ 724PMAP_INLINE void 725pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 726{ 727 728 if (pmap == kernel_pmap || pmap->pm_active) 729 invlpg(va); 730} 731 732PMAP_INLINE void 733pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 734{ 735 vm_offset_t addr; 736 737 if (pmap == kernel_pmap || pmap->pm_active) 738 for (addr = sva; addr < eva; addr += PAGE_SIZE) 739 invlpg(addr); 740} 741 742PMAP_INLINE void 743pmap_invalidate_all(pmap_t pmap) 744{ 745 746 if (pmap == kernel_pmap || pmap->pm_active) 747 invltlb(); 748} 749#endif /* !SMP */ 750 751/* 752 * Are we current address space or kernel? 753 */ 754static __inline int 755pmap_is_current(pmap_t pmap) 756{ 757 return (pmap == kernel_pmap || 758 (pmap->pm_pml4[PML4PML4I] & PG_FRAME) == (PML4pml4e[0] & PG_FRAME)); 759} 760 761/* 762 * Routine: pmap_extract 763 * Function: 764 * Extract the physical page address associated 765 * with the given map/virtual_address pair. 766 */ 767vm_paddr_t 768pmap_extract(pmap, va) 769 register pmap_t pmap; 770 vm_offset_t va; 771{ 772 vm_paddr_t rtval; 773 pt_entry_t *pte; 774 pd_entry_t pde, *pdep; 775 776 if (pmap == 0) 777 return 0; 778 pdep = pmap_pde(pmap, va); 779 if (pdep) { 780 pde = *pdep; 781 if (pde) { 782 if ((pde & PG_PS) != 0) { 783 rtval = (pde & ~PDRMASK) | (va & PDRMASK); 784 return rtval; 785 } 786 pte = pmap_pte(pmap, va); 787 rtval = ((*pte & PG_FRAME) | (va & PAGE_MASK)); 788 return rtval; 789 } 790 } 791 return 0; 792 793} 794 795/* 796 * Routine: pmap_extract_and_hold 797 * Function: 798 * Atomically extract and hold the physical page 799 * with the given pmap and virtual address pair 800 * if that mapping permits the given protection. 801 */ 802vm_page_t 803pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 804{ 805 vm_paddr_t pa; 806 vm_page_t m; 807 808 m = NULL; 809 mtx_lock(&Giant); 810 if ((pa = pmap_extract(pmap, va)) != 0) { 811 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 812 vm_page_lock_queues(); 813 vm_page_hold(m); 814 vm_page_unlock_queues(); 815 } 816 mtx_unlock(&Giant); 817 return (m); 818} 819 820vm_paddr_t 821pmap_kextract(vm_offset_t va) 822{ 823 pd_entry_t *pde; 824 vm_paddr_t pa; 825 826 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) { 827 pa = DMAP_TO_PHYS(va); 828 } else { 829 pde = pmap_pde(kernel_pmap, va); 830 if (*pde & PG_PS) { 831 pa = (*pde & ~(NBPDR - 1)) | (va & (NBPDR - 1)); 832 } else { 833 pa = *vtopte(va); 834 pa = (pa & PG_FRAME) | (va & PAGE_MASK); 835 } 836 } 837 return pa; 838} 839 840/*************************************************** 841 * Low level mapping routines..... 842 ***************************************************/ 843 844/* 845 * Add a wired page to the kva. 846 * Note: not SMP coherent. 847 */ 848PMAP_INLINE void 849pmap_kenter(vm_offset_t va, vm_paddr_t pa) 850{ 851 pt_entry_t *pte; 852 853 pte = vtopte(va); 854 pte_store(pte, pa | PG_RW | PG_V | PG_G); 855} 856 857/* 858 * Remove a page from the kernel pagetables. 859 * Note: not SMP coherent. 860 */ 861PMAP_INLINE void 862pmap_kremove(vm_offset_t va) 863{ 864 pt_entry_t *pte; 865 866 pte = vtopte(va); 867 pte_clear(pte); 868} 869 870/* 871 * Used to map a range of physical addresses into kernel 872 * virtual address space. 873 * 874 * The value passed in '*virt' is a suggested virtual address for 875 * the mapping. Architectures which can support a direct-mapped 876 * physical to virtual region can return the appropriate address 877 * within that region, leaving '*virt' unchanged. Other 878 * architectures should map the pages starting at '*virt' and 879 * update '*virt' with the first usable address after the mapped 880 * region. 881 */ 882vm_offset_t 883pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 884{ 885 return PHYS_TO_DMAP(start); 886} 887 888 889/* 890 * Add a list of wired pages to the kva 891 * this routine is only used for temporary 892 * kernel mappings that do not need to have 893 * page modification or references recorded. 894 * Note that old mappings are simply written 895 * over. The page *must* be wired. 896 * Note: SMP coherent. Uses a ranged shootdown IPI. 897 */ 898void 899pmap_qenter(vm_offset_t sva, vm_page_t *m, int count) 900{ 901 vm_offset_t va; 902 903 va = sva; 904 while (count-- > 0) { 905 pmap_kenter(va, VM_PAGE_TO_PHYS(*m)); 906 va += PAGE_SIZE; 907 m++; 908 } 909 pmap_invalidate_range(kernel_pmap, sva, va); 910} 911 912/* 913 * This routine tears out page mappings from the 914 * kernel -- it is meant only for temporary mappings. 915 * Note: SMP coherent. Uses a ranged shootdown IPI. 916 */ 917void 918pmap_qremove(vm_offset_t sva, int count) 919{ 920 vm_offset_t va; 921 922 va = sva; 923 while (count-- > 0) { 924 pmap_kremove(va); 925 va += PAGE_SIZE; 926 } 927 pmap_invalidate_range(kernel_pmap, sva, va); 928} 929 930/*************************************************** 931 * Page table page management routines..... 932 ***************************************************/ 933 934/* 935 * This routine unholds page table pages, and if the hold count 936 * drops to zero, then it decrements the wire count. 937 */ 938static int 939_pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m) 940{ 941 942 while (vm_page_sleep_if_busy(m, FALSE, "pmuwpt")) 943 vm_page_lock_queues(); 944 945 if (m->hold_count == 0) { 946 vm_offset_t pteva; 947 948 /* 949 * unmap the page table page 950 */ 951 if (m->pindex >= (NUPDE + NUPDPE)) { 952 /* PDP page */ 953 pml4_entry_t *pml4; 954 pml4 = pmap_pml4e(pmap, va); 955 pteva = (vm_offset_t) PDPmap + amd64_ptob(m->pindex - (NUPDE + NUPDPE)); 956 *pml4 = 0; 957 } else if (m->pindex >= NUPDE) { 958 /* PD page */ 959 pdp_entry_t *pdp; 960 pdp = pmap_pdpe(pmap, va); 961 pteva = (vm_offset_t) PDmap + amd64_ptob(m->pindex - NUPDE); 962 *pdp = 0; 963 } else { 964 /* PTE page */ 965 pd_entry_t *pd; 966 pd = pmap_pde(pmap, va); 967 pteva = (vm_offset_t) PTmap + amd64_ptob(m->pindex); 968 *pd = 0; 969 } 970 --pmap->pm_stats.resident_count; 971 if (m->pindex < NUPDE) { 972 /* We just released a PT, unhold the matching PD */ 973 vm_page_t pdpg; 974 975 pdpg = PHYS_TO_VM_PAGE(*pmap_pdpe(pmap, va) & PG_FRAME); 976 vm_page_unhold(pdpg); 977 if (pdpg->hold_count == 0) 978 _pmap_unwire_pte_hold(pmap, va, pdpg); 979 } 980 if (m->pindex >= NUPDE && m->pindex < (NUPDE + NUPDPE)) { 981 /* We just released a PD, unhold the matching PDP */ 982 vm_page_t pdppg; 983 984 pdppg = PHYS_TO_VM_PAGE(*pmap_pml4e(pmap, va) & PG_FRAME); 985 vm_page_unhold(pdppg); 986 if (pdppg->hold_count == 0) 987 _pmap_unwire_pte_hold(pmap, va, pdppg); 988 } 989 if (pmap_is_current(pmap)) { 990 /* 991 * Do an invltlb to make the invalidated mapping 992 * take effect immediately. 993 */ 994 pmap_invalidate_page(pmap, pteva); 995 } 996 997 /* 998 * If the page is finally unwired, simply free it. 999 */ 1000 --m->wire_count; 1001 if (m->wire_count == 0) { 1002 vm_page_busy(m); 1003 vm_page_free_zero(m); 1004 atomic_subtract_int(&cnt.v_wire_count, 1); 1005 } 1006 return 1; 1007 } 1008 return 0; 1009} 1010 1011static PMAP_INLINE int 1012pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m) 1013{ 1014 vm_page_unhold(m); 1015 if (m->hold_count == 0) 1016 return _pmap_unwire_pte_hold(pmap, va, m); 1017 else 1018 return 0; 1019} 1020 1021/* 1022 * After removing a page table entry, this routine is used to 1023 * conditionally free the page, and manage the hold/wire counts. 1024 */ 1025static int 1026pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t mpte) 1027{ 1028 1029 if (va >= VM_MAXUSER_ADDRESS) 1030 return 0; 1031 1032 return pmap_unwire_pte_hold(pmap, va, mpte); 1033} 1034 1035void 1036pmap_pinit0(pmap) 1037 struct pmap *pmap; 1038{ 1039 1040 pmap->pm_pml4 = (pml4_entry_t *)(KERNBASE + KPML4phys); 1041 pmap->pm_active = 0; 1042 TAILQ_INIT(&pmap->pm_pvlist); 1043 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1044 mtx_lock_spin(&allpmaps_lock); 1045 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1046 mtx_unlock_spin(&allpmaps_lock); 1047} 1048 1049/* 1050 * Initialize a preallocated and zeroed pmap structure, 1051 * such as one in a vmspace structure. 1052 */ 1053void 1054pmap_pinit(pmap) 1055 register struct pmap *pmap; 1056{ 1057 vm_page_t pml4pg; 1058 static vm_pindex_t color; 1059 1060 /* 1061 * allocate the page directory page 1062 */ 1063 while ((pml4pg = vm_page_alloc(NULL, color++, VM_ALLOC_NOOBJ | 1064 VM_ALLOC_NORMAL | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) 1065 VM_WAIT; 1066 1067 pmap->pm_pml4 = (pml4_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pml4pg)); 1068 1069 if ((pml4pg->flags & PG_ZERO) == 0) 1070 pagezero(pmap->pm_pml4); 1071 1072 mtx_lock_spin(&allpmaps_lock); 1073 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1074 mtx_unlock_spin(&allpmaps_lock); 1075 1076 /* Wire in kernel global address entries. */ 1077 pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U; 1078 pmap->pm_pml4[DMPML4I] = DMPDPphys | PG_RW | PG_V | PG_U; 1079 1080 /* install self-referential address mapping entry(s) */ 1081 pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(pml4pg) | PG_V | PG_RW | PG_A | PG_M; 1082 1083 pmap->pm_active = 0; 1084 TAILQ_INIT(&pmap->pm_pvlist); 1085 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1086} 1087 1088/* 1089 * this routine is called if the page table page is not 1090 * mapped correctly. 1091 * 1092 * Note: If a page allocation fails at page table level two or three, 1093 * one or two pages may be held during the wait, only to be released 1094 * afterwards. This conservative approach is easily argued to avoid 1095 * race conditions. 1096 */ 1097static vm_page_t 1098_pmap_allocpte(pmap, ptepindex) 1099 pmap_t pmap; 1100 vm_pindex_t ptepindex; 1101{ 1102 vm_page_t m, pdppg, pdpg; 1103 1104 /* 1105 * Allocate a page table page. 1106 */ 1107 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1108 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1109 VM_WAIT; 1110 /* 1111 * Indicate the need to retry. While waiting, the page table 1112 * page may have been allocated. 1113 */ 1114 return (NULL); 1115 } 1116 if ((m->flags & PG_ZERO) == 0) 1117 pmap_zero_page(m); 1118 1119 KASSERT(m->queue == PQ_NONE, 1120 ("_pmap_allocpte: %p->queue != PQ_NONE", m)); 1121 1122 /* 1123 * Increment the hold count for the page table page 1124 * (denoting a new mapping.) 1125 */ 1126 m->hold_count++; 1127 1128 /* 1129 * Map the pagetable page into the process address space, if 1130 * it isn't already there. 1131 */ 1132 1133 pmap->pm_stats.resident_count++; 1134 1135 if (ptepindex >= (NUPDE + NUPDPE)) { 1136 pml4_entry_t *pml4; 1137 vm_pindex_t pml4index; 1138 1139 /* Wire up a new PDPE page */ 1140 pml4index = ptepindex - (NUPDE + NUPDPE); 1141 pml4 = &pmap->pm_pml4[pml4index]; 1142 *pml4 = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M; 1143 1144 } else if (ptepindex >= NUPDE) { 1145 vm_pindex_t pml4index; 1146 vm_pindex_t pdpindex; 1147 pml4_entry_t *pml4; 1148 pdp_entry_t *pdp; 1149 1150 /* Wire up a new PDE page */ 1151 pdpindex = ptepindex - NUPDE; 1152 pml4index = pdpindex >> NPML4EPGSHIFT; 1153 1154 pml4 = &pmap->pm_pml4[pml4index]; 1155 if ((*pml4 & PG_V) == 0) { 1156 /* Have to allocate a new pdp, recurse */ 1157 if (_pmap_allocpte(pmap, NUPDE + NUPDPE + pml4index) == NULL) { 1158 vm_page_lock_queues(); 1159 vm_page_unhold(m); 1160 vm_page_free(m); 1161 vm_page_unlock_queues(); 1162 return (NULL); 1163 } 1164 } else { 1165 /* Add reference to pdp page */ 1166 pdppg = PHYS_TO_VM_PAGE(*pml4 & PG_FRAME); 1167 pdppg->hold_count++; 1168 } 1169 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME); 1170 1171 /* Now find the pdp page */ 1172 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)]; 1173 *pdp = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M; 1174 1175 } else { 1176 vm_pindex_t pml4index; 1177 vm_pindex_t pdpindex; 1178 pml4_entry_t *pml4; 1179 pdp_entry_t *pdp; 1180 pd_entry_t *pd; 1181 1182 /* Wire up a new PTE page */ 1183 pdpindex = ptepindex >> NPDPEPGSHIFT; 1184 pml4index = pdpindex >> NPML4EPGSHIFT; 1185 1186 /* First, find the pdp and check that its valid. */ 1187 pml4 = &pmap->pm_pml4[pml4index]; 1188 if ((*pml4 & PG_V) == 0) { 1189 /* Have to allocate a new pd, recurse */ 1190 if (_pmap_allocpte(pmap, NUPDE + pdpindex) == NULL) { 1191 vm_page_lock_queues(); 1192 vm_page_unhold(m); 1193 vm_page_free(m); 1194 vm_page_unlock_queues(); 1195 return (NULL); 1196 } 1197 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME); 1198 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)]; 1199 } else { 1200 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME); 1201 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)]; 1202 if ((*pdp & PG_V) == 0) { 1203 /* Have to allocate a new pd, recurse */ 1204 if (_pmap_allocpte(pmap, NUPDE + pdpindex) == NULL) { 1205 vm_page_lock_queues(); 1206 vm_page_unhold(m); 1207 vm_page_free(m); 1208 vm_page_unlock_queues(); 1209 return (NULL); 1210 } 1211 } else { 1212 /* Add reference to the pd page */ 1213 pdpg = PHYS_TO_VM_PAGE(*pdp & PG_FRAME); 1214 pdpg->hold_count++; 1215 } 1216 } 1217 pd = (pd_entry_t *)PHYS_TO_DMAP(*pdp & PG_FRAME); 1218 1219 /* Now we know where the page directory page is */ 1220 pd = &pd[ptepindex & ((1ul << NPDEPGSHIFT) - 1)]; 1221 *pd = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M; 1222 } 1223 1224 vm_page_lock_queues(); 1225 vm_page_wakeup(m); 1226 vm_page_unlock_queues(); 1227 1228 return m; 1229} 1230 1231static vm_page_t 1232pmap_allocpte(pmap_t pmap, vm_offset_t va) 1233{ 1234 vm_pindex_t ptepindex; 1235 pd_entry_t *pd; 1236 vm_page_t m; 1237 1238 /* 1239 * Calculate pagetable page index 1240 */ 1241 ptepindex = pmap_pde_pindex(va); 1242retry: 1243 /* 1244 * Get the page directory entry 1245 */ 1246 pd = pmap_pde(pmap, va); 1247 1248 /* 1249 * This supports switching from a 2MB page to a 1250 * normal 4K page. 1251 */ 1252 if (pd != 0 && (*pd & (PG_PS | PG_V)) == (PG_PS | PG_V)) { 1253 *pd = 0; 1254 pd = 0; 1255 pmap_invalidate_all(kernel_pmap); 1256 } 1257 1258 /* 1259 * If the page table page is mapped, we just increment the 1260 * hold count, and activate it. 1261 */ 1262 if (pd != 0 && (*pd & PG_V) != 0) { 1263 m = PHYS_TO_VM_PAGE(*pd & PG_FRAME); 1264 m->hold_count++; 1265 } else { 1266 /* 1267 * Here if the pte page isn't mapped, or if it has been 1268 * deallocated. 1269 */ 1270 m = _pmap_allocpte(pmap, ptepindex); 1271 if (m == NULL) 1272 goto retry; 1273 } 1274 return (m); 1275} 1276 1277 1278/*************************************************** 1279 * Pmap allocation/deallocation routines. 1280 ***************************************************/ 1281 1282/* 1283 * Release any resources held by the given physical map. 1284 * Called when a pmap initialized by pmap_pinit is being released. 1285 * Should only be called if the map contains no valid mappings. 1286 */ 1287void 1288pmap_release(pmap_t pmap) 1289{ 1290 vm_page_t m; 1291 1292 KASSERT(pmap->pm_stats.resident_count == 0, 1293 ("pmap_release: pmap resident count %ld != 0", 1294 pmap->pm_stats.resident_count)); 1295 1296 mtx_lock_spin(&allpmaps_lock); 1297 LIST_REMOVE(pmap, pm_list); 1298 mtx_unlock_spin(&allpmaps_lock); 1299 1300 m = PHYS_TO_VM_PAGE(pmap->pm_pml4[PML4PML4I] & PG_FRAME); 1301 1302 pmap->pm_pml4[KPML4I] = 0; /* KVA */ 1303 pmap->pm_pml4[DMPML4I] = 0; /* Direct Map */ 1304 pmap->pm_pml4[PML4PML4I] = 0; /* Recursive Mapping */ 1305 1306 vm_page_lock_queues(); 1307 m->wire_count--; 1308 atomic_subtract_int(&cnt.v_wire_count, 1); 1309 vm_page_free_zero(m); 1310 vm_page_unlock_queues(); 1311} 1312 1313static int 1314kvm_size(SYSCTL_HANDLER_ARGS) 1315{ 1316 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1317 1318 return sysctl_handle_long(oidp, &ksize, 0, req); 1319} 1320SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1321 0, 0, kvm_size, "IU", "Size of KVM"); 1322 1323static int 1324kvm_free(SYSCTL_HANDLER_ARGS) 1325{ 1326 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1327 1328 return sysctl_handle_long(oidp, &kfree, 0, req); 1329} 1330SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1331 0, 0, kvm_free, "IU", "Amount of KVM free"); 1332 1333/* 1334 * grow the number of kernel page table entries, if needed 1335 */ 1336void 1337pmap_growkernel(vm_offset_t addr) 1338{ 1339 int s; 1340 vm_paddr_t paddr; 1341 vm_page_t nkpg; 1342 pd_entry_t *pde, newpdir; 1343 pdp_entry_t newpdp; 1344 1345 s = splhigh(); 1346 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1347 if (kernel_vm_end == 0) { 1348 kernel_vm_end = KERNBASE; 1349 nkpt = 0; 1350 while ((*pmap_pde(kernel_pmap, kernel_vm_end) & PG_V) != 0) { 1351 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1352 nkpt++; 1353 } 1354 } 1355 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1356 while (kernel_vm_end < addr) { 1357 pde = pmap_pde(kernel_pmap, kernel_vm_end); 1358 if (pde == NULL) { 1359 /* We need a new PDP entry */ 1360 nkpg = vm_page_alloc(NULL, nkpt, 1361 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1362 if (!nkpg) 1363 panic("pmap_growkernel: no memory to grow kernel"); 1364 pmap_zero_page(nkpg); 1365 paddr = VM_PAGE_TO_PHYS(nkpg); 1366 newpdp = (pdp_entry_t) 1367 (paddr | PG_V | PG_RW | PG_A | PG_M); 1368 *pmap_pdpe(kernel_pmap, kernel_vm_end) = newpdp; 1369 continue; /* try again */ 1370 } 1371 if ((*pde & PG_V) != 0) { 1372 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1373 continue; 1374 } 1375 1376 /* 1377 * This index is bogus, but out of the way 1378 */ 1379 nkpg = vm_page_alloc(NULL, nkpt, 1380 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1381 if (!nkpg) 1382 panic("pmap_growkernel: no memory to grow kernel"); 1383 1384 nkpt++; 1385 1386 pmap_zero_page(nkpg); 1387 paddr = VM_PAGE_TO_PHYS(nkpg); 1388 newpdir = (pd_entry_t) (paddr | PG_V | PG_RW | PG_A | PG_M); 1389 *pmap_pde(kernel_pmap, kernel_vm_end) = newpdir; 1390 1391 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1392 } 1393 splx(s); 1394} 1395 1396 1397/*************************************************** 1398 * page management routines. 1399 ***************************************************/ 1400 1401/* 1402 * free the pv_entry back to the free list 1403 */ 1404static PMAP_INLINE void 1405free_pv_entry(pv_entry_t pv) 1406{ 1407 pv_entry_count--; 1408 uma_zfree(pvzone, pv); 1409} 1410 1411/* 1412 * get a new pv_entry, allocating a block from the system 1413 * when needed. 1414 * the memory allocation is performed bypassing the malloc code 1415 * because of the possibility of allocations at interrupt time. 1416 */ 1417static pv_entry_t 1418get_pv_entry(void) 1419{ 1420 pv_entry_count++; 1421 if (pv_entry_high_water && 1422 (pv_entry_count > pv_entry_high_water) && 1423 (pmap_pagedaemon_waken == 0)) { 1424 pmap_pagedaemon_waken = 1; 1425 wakeup (&vm_pages_needed); 1426 } 1427 return uma_zalloc(pvzone, M_NOWAIT); 1428} 1429 1430/* 1431 * If it is the first entry on the list, it is actually 1432 * in the header and we must copy the following entry up 1433 * to the header. Otherwise we must search the list for 1434 * the entry. In either case we free the now unused entry. 1435 */ 1436 1437static int 1438pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 1439{ 1440 pv_entry_t pv; 1441 int rtval; 1442 int s; 1443 1444 s = splvm(); 1445 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1446 if (m->md.pv_list_count < pmap->pm_stats.resident_count) { 1447 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 1448 if (pmap == pv->pv_pmap && va == pv->pv_va) 1449 break; 1450 } 1451 } else { 1452 TAILQ_FOREACH(pv, &pmap->pm_pvlist, pv_plist) { 1453 if (va == pv->pv_va) 1454 break; 1455 } 1456 } 1457 1458 rtval = 0; 1459 if (pv) { 1460 rtval = pmap_unuse_pt(pmap, va, pv->pv_ptem); 1461 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1462 m->md.pv_list_count--; 1463 if (TAILQ_FIRST(&m->md.pv_list) == NULL) 1464 vm_page_flag_clear(m, PG_WRITEABLE); 1465 1466 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist); 1467 free_pv_entry(pv); 1468 } 1469 1470 splx(s); 1471 return rtval; 1472} 1473 1474/* 1475 * Create a pv entry for page at pa for 1476 * (pmap, va). 1477 */ 1478static void 1479pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t mpte, vm_page_t m) 1480{ 1481 1482 int s; 1483 pv_entry_t pv; 1484 1485 s = splvm(); 1486 pv = get_pv_entry(); 1487 pv->pv_va = va; 1488 pv->pv_pmap = pmap; 1489 pv->pv_ptem = mpte; 1490 1491 vm_page_lock_queues(); 1492 TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist); 1493 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1494 m->md.pv_list_count++; 1495 1496 vm_page_unlock_queues(); 1497 splx(s); 1498} 1499 1500/* 1501 * pmap_remove_pte: do the things to unmap a page in a process 1502 */ 1503static int 1504pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va) 1505{ 1506 pt_entry_t oldpte; 1507 vm_page_t m, mpte; 1508 1509 oldpte = pte_load_clear(ptq); 1510 if (oldpte & PG_W) 1511 pmap->pm_stats.wired_count -= 1; 1512 /* 1513 * Machines that don't support invlpg, also don't support 1514 * PG_G. 1515 */ 1516 if (oldpte & PG_G) 1517 pmap_invalidate_page(kernel_pmap, va); 1518 pmap->pm_stats.resident_count -= 1; 1519 if (oldpte & PG_MANAGED) { 1520 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME); 1521 if (oldpte & PG_M) { 1522#if defined(PMAP_DIAGNOSTIC) 1523 if (pmap_nw_modified((pt_entry_t) oldpte)) { 1524 printf( 1525 "pmap_remove: modified page not writable: va: 0x%lx, pte: 0x%lx\n", 1526 va, oldpte); 1527 } 1528#endif 1529 if (pmap_track_modified(va)) 1530 vm_page_dirty(m); 1531 } 1532 if (oldpte & PG_A) 1533 vm_page_flag_set(m, PG_REFERENCED); 1534 return pmap_remove_entry(pmap, m, va); 1535 } else { 1536 mpte = PHYS_TO_VM_PAGE(*pmap_pde(pmap, va) & PG_FRAME); 1537 return pmap_unuse_pt(pmap, va, mpte); 1538 } 1539} 1540 1541/* 1542 * Remove a single page from a process address space 1543 */ 1544static void 1545pmap_remove_page(pmap_t pmap, vm_offset_t va) 1546{ 1547 pt_entry_t *pte; 1548 1549 pte = pmap_pte(pmap, va); 1550 if (pte == NULL || (*pte & PG_V) == 0) 1551 return; 1552 pmap_remove_pte(pmap, pte, va); 1553 pmap_invalidate_page(pmap, va); 1554} 1555 1556/* 1557 * Remove the given range of addresses from the specified map. 1558 * 1559 * It is assumed that the start and end are properly 1560 * rounded to the page size. 1561 */ 1562void 1563pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 1564{ 1565 vm_offset_t va_next; 1566 pml4_entry_t *pml4e; 1567 pdp_entry_t *pdpe; 1568 pd_entry_t ptpaddr, *pde; 1569 pt_entry_t *pte; 1570 int anyvalid; 1571 1572 if (pmap == NULL) 1573 return; 1574 1575 if (pmap->pm_stats.resident_count == 0) 1576 return; 1577 1578 /* 1579 * special handling of removing one page. a very 1580 * common operation and easy to short circuit some 1581 * code. 1582 */ 1583 if (sva + PAGE_SIZE == eva) { 1584 pde = pmap_pde(pmap, sva); 1585 if (pde && (*pde & PG_PS) == 0) { 1586 pmap_remove_page(pmap, sva); 1587 return; 1588 } 1589 } 1590 1591 anyvalid = 0; 1592 1593 for (; sva < eva; sva = va_next) { 1594 1595 if (pmap->pm_stats.resident_count == 0) 1596 break; 1597 1598 pml4e = pmap_pml4e(pmap, sva); 1599 if (pml4e == 0) { 1600 va_next = (sva + NBPML4) & ~PML4MASK; 1601 continue; 1602 } 1603 1604 pdpe = pmap_pdpe(pmap, sva); 1605 if (pdpe == 0) { 1606 va_next = (sva + NBPDP) & ~PDPMASK; 1607 continue; 1608 } 1609 1610 /* 1611 * Calculate index for next page table. 1612 */ 1613 va_next = (sva + NBPDR) & ~PDRMASK; 1614 1615 pde = pmap_pde(pmap, sva); 1616 if (pde == 0) 1617 continue; 1618 ptpaddr = *pde; 1619 1620 /* 1621 * Weed out invalid mappings. Note: we assume that the page 1622 * directory table is always allocated, and in kernel virtual. 1623 */ 1624 if (ptpaddr == 0) 1625 continue; 1626 1627 /* 1628 * Check for large page. 1629 */ 1630 if ((ptpaddr & PG_PS) != 0) { 1631 *pde = 0; 1632 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1633 anyvalid = 1; 1634 continue; 1635 } 1636 1637 /* 1638 * Limit our scan to either the end of the va represented 1639 * by the current page table page, or to the end of the 1640 * range being removed. 1641 */ 1642 if (va_next > eva) 1643 va_next = eva; 1644 1645 for (; sva != va_next; sva += PAGE_SIZE) { 1646 pte = pmap_pte(pmap, sva); 1647 if (pte == NULL || *pte == 0) 1648 continue; 1649 anyvalid = 1; 1650 if (pmap_remove_pte(pmap, pte, sva)) 1651 break; 1652 } 1653 } 1654 1655 if (anyvalid) 1656 pmap_invalidate_all(pmap); 1657} 1658 1659/* 1660 * Routine: pmap_remove_all 1661 * Function: 1662 * Removes this physical page from 1663 * all physical maps in which it resides. 1664 * Reflects back modify bits to the pager. 1665 * 1666 * Notes: 1667 * Original versions of this routine were very 1668 * inefficient because they iteratively called 1669 * pmap_remove (slow...) 1670 */ 1671 1672void 1673pmap_remove_all(vm_page_t m) 1674{ 1675 register pv_entry_t pv; 1676 pt_entry_t *pte, tpte; 1677 int s; 1678 1679#if defined(PMAP_DIAGNOSTIC) 1680 /* 1681 * XXX This makes pmap_remove_all() illegal for non-managed pages! 1682 */ 1683 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) { 1684 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%lx", 1685 VM_PAGE_TO_PHYS(m)); 1686 } 1687#endif 1688 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1689 s = splvm(); 1690 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 1691 pv->pv_pmap->pm_stats.resident_count--; 1692 pte = pmap_pte(pv->pv_pmap, pv->pv_va); 1693 tpte = pte_load_clear(pte); 1694 if (tpte & PG_W) 1695 pv->pv_pmap->pm_stats.wired_count--; 1696 if (tpte & PG_A) 1697 vm_page_flag_set(m, PG_REFERENCED); 1698 1699 /* 1700 * Update the vm_page_t clean and reference bits. 1701 */ 1702 if (tpte & PG_M) { 1703#if defined(PMAP_DIAGNOSTIC) 1704 if (pmap_nw_modified((pt_entry_t) tpte)) { 1705 printf( 1706 "pmap_remove_all: modified page not writable: va: 0x%lx, pte: 0x%lx\n", 1707 pv->pv_va, tpte); 1708 } 1709#endif 1710 if (pmap_track_modified(pv->pv_va)) 1711 vm_page_dirty(m); 1712 } 1713 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 1714 TAILQ_REMOVE(&pv->pv_pmap->pm_pvlist, pv, pv_plist); 1715 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1716 m->md.pv_list_count--; 1717 pmap_unuse_pt(pv->pv_pmap, pv->pv_va, pv->pv_ptem); 1718 free_pv_entry(pv); 1719 } 1720 vm_page_flag_clear(m, PG_WRITEABLE); 1721 splx(s); 1722} 1723 1724/* 1725 * Set the physical protection on the 1726 * specified range of this map as requested. 1727 */ 1728void 1729pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 1730{ 1731 vm_offset_t va_next; 1732 pml4_entry_t *pml4e; 1733 pdp_entry_t *pdpe; 1734 pd_entry_t ptpaddr, *pde; 1735 int anychanged; 1736 1737 if (pmap == NULL) 1738 return; 1739 1740 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 1741 pmap_remove(pmap, sva, eva); 1742 return; 1743 } 1744 1745 if (prot & VM_PROT_WRITE) 1746 return; 1747 1748 anychanged = 0; 1749 1750 for (; sva < eva; sva = va_next) { 1751 1752 pml4e = pmap_pml4e(pmap, sva); 1753 if (pml4e == 0) { 1754 va_next = (sva + NBPML4) & ~PML4MASK; 1755 continue; 1756 } 1757 1758 pdpe = pmap_pdpe(pmap, sva); 1759 if (pdpe == 0) { 1760 va_next = (sva + NBPDP) & ~PDPMASK; 1761 continue; 1762 } 1763 1764 va_next = (sva + NBPDR) & ~PDRMASK; 1765 1766 pde = pmap_pde(pmap, sva); 1767 if (pde == NULL) 1768 continue; 1769 ptpaddr = *pde; 1770 1771 /* 1772 * Weed out invalid mappings. Note: we assume that the page 1773 * directory table is always allocated, and in kernel virtual. 1774 */ 1775 if (ptpaddr == 0) 1776 continue; 1777 1778 /* 1779 * Check for large page. 1780 */ 1781 if ((ptpaddr & PG_PS) != 0) { 1782 *pde &= ~(PG_M|PG_RW); 1783 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1784 anychanged = 1; 1785 continue; 1786 } 1787 1788 if (va_next > eva) 1789 va_next = eva; 1790 1791 for (; sva != va_next; sva += PAGE_SIZE) { 1792 pt_entry_t pbits; 1793 pt_entry_t *pte; 1794 vm_page_t m; 1795 1796 pte = pmap_pte(pmap, sva); 1797 if (pte == NULL) 1798 continue; 1799 pbits = *pte; 1800 if (pbits & PG_MANAGED) { 1801 m = NULL; 1802 if (pbits & PG_A) { 1803 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); 1804 vm_page_flag_set(m, PG_REFERENCED); 1805 pbits &= ~PG_A; 1806 } 1807 if ((pbits & PG_M) != 0 && 1808 pmap_track_modified(sva)) { 1809 if (m == NULL) 1810 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); 1811 vm_page_dirty(m); 1812 pbits &= ~PG_M; 1813 } 1814 } 1815 1816 pbits &= ~PG_RW; 1817 1818 if (pbits != *pte) { 1819 pte_store(pte, pbits); 1820 anychanged = 1; 1821 } 1822 } 1823 } 1824 if (anychanged) 1825 pmap_invalidate_all(pmap); 1826} 1827 1828/* 1829 * Insert the given physical page (p) at 1830 * the specified virtual address (v) in the 1831 * target physical map with the protection requested. 1832 * 1833 * If specified, the page will be wired down, meaning 1834 * that the related pte can not be reclaimed. 1835 * 1836 * NB: This is the only routine which MAY NOT lazy-evaluate 1837 * or lose information. That is, this routine must actually 1838 * insert this page into the given map NOW. 1839 */ 1840void 1841pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 1842 boolean_t wired) 1843{ 1844 vm_paddr_t pa; 1845 register pt_entry_t *pte; 1846 vm_paddr_t opa; 1847 pt_entry_t origpte, newpte; 1848 vm_page_t mpte; 1849 1850 if (pmap == NULL) 1851 return; 1852 1853 va = trunc_page(va); 1854#ifdef PMAP_DIAGNOSTIC 1855 if (va > VM_MAX_KERNEL_ADDRESS) 1856 panic("pmap_enter: toobig"); 1857 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 1858 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%lx)", va); 1859#endif 1860 1861 mpte = NULL; 1862 /* 1863 * In the case that a page table page is not 1864 * resident, we are creating it here. 1865 */ 1866 if (va < VM_MAXUSER_ADDRESS) { 1867 mpte = pmap_allocpte(pmap, va); 1868 } 1869#if 0 && defined(PMAP_DIAGNOSTIC) 1870 else { 1871 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 1872 origpte = *pdeaddr; 1873 if ((origpte & PG_V) == 0) { 1874 panic("pmap_enter: invalid kernel page table page, pde=%p, va=%p\n", 1875 origpte, va); 1876 } 1877 } 1878#endif 1879 1880 pte = pmap_pte(pmap, va); 1881 1882 /* 1883 * Page Directory table entry not valid, we need a new PT page 1884 */ 1885 if (pte == NULL) 1886 panic("pmap_enter: invalid page directory va=%#lx\n", va); 1887 1888 pa = VM_PAGE_TO_PHYS(m) & PG_FRAME; 1889 origpte = *pte; 1890 opa = origpte & PG_FRAME; 1891 1892 if (origpte & PG_PS) 1893 panic("pmap_enter: attempted pmap_enter on 2MB page"); 1894 1895 /* 1896 * Mapping has not changed, must be protection or wiring change. 1897 */ 1898 if (origpte && (opa == pa)) { 1899 /* 1900 * Wiring change, just update stats. We don't worry about 1901 * wiring PT pages as they remain resident as long as there 1902 * are valid mappings in them. Hence, if a user page is wired, 1903 * the PT page will be also. 1904 */ 1905 if (wired && ((origpte & PG_W) == 0)) 1906 pmap->pm_stats.wired_count++; 1907 else if (!wired && (origpte & PG_W)) 1908 pmap->pm_stats.wired_count--; 1909 1910#if defined(PMAP_DIAGNOSTIC) 1911 if (pmap_nw_modified((pt_entry_t) origpte)) { 1912 printf( 1913 "pmap_enter: modified page not writable: va: 0x%lx, pte: 0x%lx\n", 1914 va, origpte); 1915 } 1916#endif 1917 1918 /* 1919 * Remove extra pte reference 1920 */ 1921 if (mpte) 1922 mpte->hold_count--; 1923 1924 /* 1925 * We might be turning off write access to the page, 1926 * so we go ahead and sense modify status. 1927 */ 1928 if (origpte & PG_MANAGED) { 1929 if ((origpte & PG_M) && pmap_track_modified(va)) { 1930 vm_page_t om; 1931 om = PHYS_TO_VM_PAGE(opa & PG_FRAME); 1932 vm_page_dirty(om); 1933 } 1934 pa |= PG_MANAGED; 1935 } 1936 goto validate; 1937 } 1938 /* 1939 * Mapping has changed, invalidate old range and fall through to 1940 * handle validating new mapping. 1941 */ 1942 if (opa) { 1943 int err; 1944 vm_page_lock_queues(); 1945 err = pmap_remove_pte(pmap, pte, va); 1946 vm_page_unlock_queues(); 1947 if (err) 1948 panic("pmap_enter: pte vanished, va: 0x%lx", va); 1949 } 1950 1951 /* 1952 * Enter on the PV list if part of our managed memory. Note that we 1953 * raise IPL while manipulating pv_table since pmap_enter can be 1954 * called at interrupt time. 1955 */ 1956 if (pmap_initialized && 1957 (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) { 1958 pmap_insert_entry(pmap, va, mpte, m); 1959 pa |= PG_MANAGED; 1960 } 1961 1962 /* 1963 * Increment counters 1964 */ 1965 pmap->pm_stats.resident_count++; 1966 if (wired) 1967 pmap->pm_stats.wired_count++; 1968 1969validate: 1970 /* 1971 * Now validate mapping with desired protection/wiring. 1972 */ 1973 newpte = (pt_entry_t)(pa | PG_V); 1974 if ((prot & VM_PROT_WRITE) != 0) 1975 newpte |= PG_RW; 1976 if ((prot & VM_PROT_EXECUTE) == 0) 1977 newpte |= pg_nx; 1978 if (wired) 1979 newpte |= PG_W; 1980 if (va < VM_MAXUSER_ADDRESS) 1981 newpte |= PG_U; 1982 if (pmap == kernel_pmap) 1983 newpte |= PG_G; 1984 1985 /* 1986 * if the mapping or permission bits are different, we need 1987 * to update the pte. 1988 */ 1989 if ((origpte & ~(PG_M|PG_A)) != newpte) { 1990 pte_store(pte, newpte | PG_A); 1991 /*if (origpte)*/ { 1992 pmap_invalidate_page(pmap, va); 1993 } 1994 } 1995} 1996 1997/* 1998 * this code makes some *MAJOR* assumptions: 1999 * 1. Current pmap & pmap exists. 2000 * 2. Not wired. 2001 * 3. Read access. 2002 * 4. No page table pages. 2003 * 5. Tlbflush is deferred to calling procedure. 2004 * 6. Page IS managed. 2005 * but is *MUCH* faster than pmap_enter... 2006 */ 2007 2008vm_page_t 2009pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_page_t mpte) 2010{ 2011 pt_entry_t *pte; 2012 vm_paddr_t pa; 2013 2014 /* 2015 * In the case that a page table page is not 2016 * resident, we are creating it here. 2017 */ 2018 if (va < VM_MAXUSER_ADDRESS) { 2019 vm_pindex_t ptepindex; 2020 pd_entry_t *ptepa; 2021 2022 /* 2023 * Calculate pagetable page index 2024 */ 2025 ptepindex = pmap_pde_pindex(va); 2026 if (mpte && (mpte->pindex == ptepindex)) { 2027 mpte->hold_count++; 2028 } else { 2029 retry: 2030 /* 2031 * Get the page directory entry 2032 */ 2033 ptepa = pmap_pde(pmap, va); 2034 2035 /* 2036 * If the page table page is mapped, we just increment 2037 * the hold count, and activate it. 2038 */ 2039 if (ptepa && (*ptepa & PG_V) != 0) { 2040 if (*ptepa & PG_PS) 2041 panic("pmap_enter_quick: unexpected mapping into 2MB page"); 2042 mpte = PHYS_TO_VM_PAGE(*ptepa & PG_FRAME); 2043 mpte->hold_count++; 2044 } else { 2045 mpte = _pmap_allocpte(pmap, ptepindex); 2046 if (mpte == NULL) 2047 goto retry; 2048 } 2049 } 2050 } else { 2051 mpte = NULL; 2052 } 2053 2054 /* 2055 * This call to vtopte makes the assumption that we are 2056 * entering the page into the current pmap. In order to support 2057 * quick entry into any pmap, one would likely use pmap_pte. 2058 * But that isn't as quick as vtopte. 2059 */ 2060 pte = vtopte(va); 2061 if (*pte) { 2062 if (mpte != NULL) { 2063 vm_page_lock_queues(); 2064 pmap_unwire_pte_hold(pmap, va, mpte); 2065 vm_page_unlock_queues(); 2066 } 2067 return 0; 2068 } 2069 2070 /* 2071 * Enter on the PV list if part of our managed memory. Note that we 2072 * raise IPL while manipulating pv_table since pmap_enter can be 2073 * called at interrupt time. 2074 */ 2075 if ((m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) 2076 pmap_insert_entry(pmap, va, mpte, m); 2077 2078 /* 2079 * Increment counters 2080 */ 2081 pmap->pm_stats.resident_count++; 2082 2083 pa = VM_PAGE_TO_PHYS(m); 2084 2085 /* 2086 * Now validate mapping with RO protection 2087 */ 2088 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 2089 pte_store(pte, pa | PG_V | PG_U); 2090 else 2091 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 2092 2093 return mpte; 2094} 2095 2096/* 2097 * Make a temporary mapping for a physical address. This is only intended 2098 * to be used for panic dumps. 2099 */ 2100void * 2101pmap_kenter_temporary(vm_paddr_t pa, int i) 2102{ 2103 vm_offset_t va; 2104 2105 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 2106 pmap_kenter(va, pa); 2107 invlpg(va); 2108 return ((void *)crashdumpmap); 2109} 2110 2111/* 2112 * This code maps large physical mmap regions into the 2113 * processor address space. Note that some shortcuts 2114 * are taken, but the code works. 2115 */ 2116void 2117pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 2118 vm_object_t object, vm_pindex_t pindex, 2119 vm_size_t size) 2120{ 2121 vm_page_t p; 2122 2123 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 2124 KASSERT(object->type == OBJT_DEVICE, 2125 ("pmap_object_init_pt: non-device object")); 2126 if (((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 2127 int i; 2128 vm_page_t m[1]; 2129 int npdes; 2130 pd_entry_t ptepa, *pde; 2131 2132 pde = pmap_pde(pmap, addr); 2133 if (pde != 0 && (*pde & PG_V) != 0) 2134 return; 2135retry: 2136 p = vm_page_lookup(object, pindex); 2137 if (p != NULL) { 2138 vm_page_lock_queues(); 2139 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 2140 goto retry; 2141 } else { 2142 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 2143 if (p == NULL) 2144 return; 2145 m[0] = p; 2146 2147 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 2148 vm_page_lock_queues(); 2149 vm_page_free(p); 2150 vm_page_unlock_queues(); 2151 return; 2152 } 2153 2154 p = vm_page_lookup(object, pindex); 2155 vm_page_lock_queues(); 2156 vm_page_wakeup(p); 2157 } 2158 vm_page_unlock_queues(); 2159 2160 ptepa = VM_PAGE_TO_PHYS(p); 2161 if (ptepa & (NBPDR - 1)) 2162 return; 2163 2164 p->valid = VM_PAGE_BITS_ALL; 2165 2166 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 2167 npdes = size >> PDRSHIFT; 2168 for(i = 0; i < npdes; i++) { 2169 pde_store(pde, ptepa | PG_U | PG_RW | PG_V | PG_PS); 2170 ptepa += NBPDR; 2171 pde++; 2172 } 2173 pmap_invalidate_all(pmap); 2174 } 2175} 2176 2177/* 2178 * Routine: pmap_change_wiring 2179 * Function: Change the wiring attribute for a map/virtual-address 2180 * pair. 2181 * In/out conditions: 2182 * The mapping must already exist in the pmap. 2183 */ 2184void 2185pmap_change_wiring(pmap, va, wired) 2186 register pmap_t pmap; 2187 vm_offset_t va; 2188 boolean_t wired; 2189{ 2190 register pt_entry_t *pte; 2191 2192 if (pmap == NULL) 2193 return; 2194 2195 /* 2196 * Wiring is not a hardware characteristic so there is no need to 2197 * invalidate TLB. 2198 */ 2199 pte = pmap_pte(pmap, va); 2200 if (wired && (*pte & PG_W) == 0) { 2201 pmap->pm_stats.wired_count++; 2202 *pte |= PG_W; 2203 } else if (!wired && (*pte & PG_W) != 0) { 2204 pmap->pm_stats.wired_count--; 2205 *pte &= ~PG_W; 2206 } 2207} 2208 2209 2210 2211/* 2212 * Copy the range specified by src_addr/len 2213 * from the source map to the range dst_addr/len 2214 * in the destination map. 2215 * 2216 * This routine is only advisory and need not do anything. 2217 */ 2218 2219void 2220pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 2221 vm_offset_t src_addr) 2222{ 2223 vm_offset_t addr; 2224 vm_offset_t end_addr = src_addr + len; 2225 vm_offset_t va_next; 2226 vm_page_t m; 2227 2228 if (dst_addr != src_addr) 2229 return; 2230 2231 if (!pmap_is_current(src_pmap)) 2232 return; 2233 2234 for (addr = src_addr; addr < end_addr; addr = va_next) { 2235 pt_entry_t *src_pte, *dst_pte; 2236 vm_page_t dstmpte, srcmpte; 2237 pml4_entry_t *pml4e; 2238 pdp_entry_t *pdpe; 2239 pd_entry_t srcptepaddr, *pde; 2240 vm_pindex_t ptepindex; 2241 2242 if (addr >= UPT_MIN_ADDRESS) 2243 panic("pmap_copy: invalid to pmap_copy page tables\n"); 2244 2245 /* 2246 * Don't let optional prefaulting of pages make us go 2247 * way below the low water mark of free pages or way 2248 * above high water mark of used pv entries. 2249 */ 2250 if (cnt.v_free_count < cnt.v_free_reserved || 2251 pv_entry_count > pv_entry_high_water) 2252 break; 2253 2254 pml4e = pmap_pml4e(src_pmap, addr); 2255 if (pml4e == 0) { 2256 va_next = (addr + NBPML4) & ~PML4MASK; 2257 continue; 2258 } 2259 2260 pdpe = pmap_pdpe(src_pmap, addr); 2261 if (pdpe == 0) { 2262 va_next = (addr + NBPDP) & ~PDPMASK; 2263 continue; 2264 } 2265 2266 va_next = (addr + NBPDR) & ~PDRMASK; 2267 ptepindex = pmap_pde_pindex(addr); 2268 2269 pde = pmap_pde(src_pmap, addr); 2270 if (pde) 2271 srcptepaddr = *pde; 2272 else 2273 continue; 2274 if (srcptepaddr == 0) 2275 continue; 2276 2277 if (srcptepaddr & PG_PS) { 2278 pde = pmap_pde(dst_pmap, addr); 2279 if (pde == 0) { 2280 /* 2281 * XXX should do an allocpte here to 2282 * instantiate the pde 2283 */ 2284 continue; 2285 } 2286 if (*pde == 0) { 2287 *pde = srcptepaddr; 2288 dst_pmap->pm_stats.resident_count += 2289 NBPDR / PAGE_SIZE; 2290 } 2291 continue; 2292 } 2293 2294 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 2295 if (srcmpte->hold_count == 0 || (srcmpte->flags & PG_BUSY)) 2296 continue; 2297 2298 if (va_next > end_addr) 2299 va_next = end_addr; 2300 2301 src_pte = vtopte(addr); 2302 while (addr < va_next) { 2303 pt_entry_t ptetemp; 2304 ptetemp = *src_pte; 2305 /* 2306 * we only virtual copy managed pages 2307 */ 2308 if ((ptetemp & PG_MANAGED) != 0) { 2309 /* 2310 * We have to check after allocpte for the 2311 * pte still being around... allocpte can 2312 * block. 2313 */ 2314 dstmpte = pmap_allocpte(dst_pmap, addr); 2315 dst_pte = pmap_pte(dst_pmap, addr); 2316 if ((*dst_pte == 0) && (ptetemp = *src_pte)) { 2317 /* 2318 * Clear the modified and 2319 * accessed (referenced) bits 2320 * during the copy. 2321 */ 2322 m = PHYS_TO_VM_PAGE(ptetemp & PG_FRAME); 2323 *dst_pte = ptetemp & ~(PG_M | PG_A); 2324 dst_pmap->pm_stats.resident_count++; 2325 pmap_insert_entry(dst_pmap, addr, 2326 dstmpte, m); 2327 } else { 2328 vm_page_lock_queues(); 2329 pmap_unwire_pte_hold(dst_pmap, addr, dstmpte); 2330 vm_page_unlock_queues(); 2331 } 2332 if (dstmpte->hold_count >= srcmpte->hold_count) 2333 break; 2334 } 2335 addr += PAGE_SIZE; 2336 src_pte++; 2337 } 2338 } 2339} 2340 2341/* 2342 * pmap_zero_page zeros the specified hardware page by mapping 2343 * the page into KVM and using bzero to clear its contents. 2344 */ 2345void 2346pmap_zero_page(vm_page_t m) 2347{ 2348 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)); 2349 2350 pagezero((void *)va); 2351} 2352 2353/* 2354 * pmap_zero_page_area zeros the specified hardware page by mapping 2355 * the page into KVM and using bzero to clear its contents. 2356 * 2357 * off and size may not cover an area beyond a single hardware page. 2358 */ 2359void 2360pmap_zero_page_area(vm_page_t m, int off, int size) 2361{ 2362 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)); 2363 2364 if (off == 0 && size == PAGE_SIZE) 2365 pagezero((void *)va); 2366 else 2367 bzero((char *)va + off, size); 2368} 2369 2370/* 2371 * pmap_zero_page_idle zeros the specified hardware page by mapping 2372 * the page into KVM and using bzero to clear its contents. This 2373 * is intended to be called from the vm_pagezero process only and 2374 * outside of Giant. 2375 */ 2376void 2377pmap_zero_page_idle(vm_page_t m) 2378{ 2379 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)); 2380 2381 pagezero((void *)va); 2382} 2383 2384/* 2385 * pmap_copy_page copies the specified (machine independent) 2386 * page by mapping the page into virtual memory and using 2387 * bcopy to copy the page, one machine dependent page at a 2388 * time. 2389 */ 2390void 2391pmap_copy_page(vm_page_t msrc, vm_page_t mdst) 2392{ 2393 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc)); 2394 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst)); 2395 2396 pagecopy((void *)src, (void *)dst); 2397} 2398 2399/* 2400 * Returns true if the pmap's pv is one of the first 2401 * 16 pvs linked to from this page. This count may 2402 * be changed upwards or downwards in the future; it 2403 * is only necessary that true be returned for a small 2404 * subset of pmaps for proper page aging. 2405 */ 2406boolean_t 2407pmap_page_exists_quick(pmap, m) 2408 pmap_t pmap; 2409 vm_page_t m; 2410{ 2411 pv_entry_t pv; 2412 int loops = 0; 2413 int s; 2414 2415 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 2416 return FALSE; 2417 2418 s = splvm(); 2419 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2420 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2421 if (pv->pv_pmap == pmap) { 2422 splx(s); 2423 return TRUE; 2424 } 2425 loops++; 2426 if (loops >= 16) 2427 break; 2428 } 2429 splx(s); 2430 return (FALSE); 2431} 2432 2433#define PMAP_REMOVE_PAGES_CURPROC_ONLY 2434/* 2435 * Remove all pages from specified address space 2436 * this aids process exit speeds. Also, this code 2437 * is special cased for current process only, but 2438 * can have the more generic (and slightly slower) 2439 * mode enabled. This is much faster than pmap_remove 2440 * in the case of running down an entire address space. 2441 */ 2442void 2443pmap_remove_pages(pmap, sva, eva) 2444 pmap_t pmap; 2445 vm_offset_t sva, eva; 2446{ 2447 pt_entry_t *pte, tpte; 2448 vm_page_t m; 2449 pv_entry_t pv, npv; 2450 int s; 2451 2452#ifdef PMAP_REMOVE_PAGES_CURPROC_ONLY 2453 if (!curthread || (pmap != vmspace_pmap(curthread->td_proc->p_vmspace))) { 2454 printf("warning: pmap_remove_pages called with non-current pmap\n"); 2455 return; 2456 } 2457#endif 2458 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2459 s = splvm(); 2460 for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) { 2461 2462 if (pv->pv_va >= eva || pv->pv_va < sva) { 2463 npv = TAILQ_NEXT(pv, pv_plist); 2464 continue; 2465 } 2466 2467#ifdef PMAP_REMOVE_PAGES_CURPROC_ONLY 2468 pte = vtopte(pv->pv_va); 2469#else 2470 pte = pmap_pte(pv->pv_pmap, pv->pv_va); 2471#endif 2472 tpte = *pte; 2473 2474 if (tpte == 0) { 2475 printf("TPTE at %p IS ZERO @ VA %08lx\n", 2476 pte, pv->pv_va); 2477 panic("bad pte"); 2478 } 2479 2480/* 2481 * We cannot remove wired pages from a process' mapping at this time 2482 */ 2483 if (tpte & PG_W) { 2484 npv = TAILQ_NEXT(pv, pv_plist); 2485 continue; 2486 } 2487 2488 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 2489 KASSERT(m->phys_addr == (tpte & PG_FRAME), 2490 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 2491 m, (uintmax_t)m->phys_addr, (uintmax_t)tpte)); 2492 2493 KASSERT(m < &vm_page_array[vm_page_array_size], 2494 ("pmap_remove_pages: bad tpte %#jx", (uintmax_t)tpte)); 2495 2496 pv->pv_pmap->pm_stats.resident_count--; 2497 2498 pte_clear(pte); 2499 2500 /* 2501 * Update the vm_page_t clean and reference bits. 2502 */ 2503 if (tpte & PG_M) { 2504 vm_page_dirty(m); 2505 } 2506 2507 npv = TAILQ_NEXT(pv, pv_plist); 2508 TAILQ_REMOVE(&pv->pv_pmap->pm_pvlist, pv, pv_plist); 2509 2510 m->md.pv_list_count--; 2511 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2512 if (TAILQ_FIRST(&m->md.pv_list) == NULL) { 2513 vm_page_flag_clear(m, PG_WRITEABLE); 2514 } 2515 2516 pmap_unuse_pt(pv->pv_pmap, pv->pv_va, pv->pv_ptem); 2517 free_pv_entry(pv); 2518 } 2519 splx(s); 2520 pmap_invalidate_all(pmap); 2521} 2522 2523/* 2524 * pmap_is_modified: 2525 * 2526 * Return whether or not the specified physical page was modified 2527 * in any physical maps. 2528 */ 2529boolean_t 2530pmap_is_modified(vm_page_t m) 2531{ 2532 pv_entry_t pv; 2533 pt_entry_t *pte; 2534 int s; 2535 2536 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 2537 return FALSE; 2538 2539 s = splvm(); 2540 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2541 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2542 /* 2543 * if the bit being tested is the modified bit, then 2544 * mark clean_map and ptes as never 2545 * modified. 2546 */ 2547 if (!pmap_track_modified(pv->pv_va)) 2548 continue; 2549#if defined(PMAP_DIAGNOSTIC) 2550 if (!pv->pv_pmap) { 2551 printf("Null pmap (tb) at va: 0x%lx\n", pv->pv_va); 2552 continue; 2553 } 2554#endif 2555 pte = pmap_pte(pv->pv_pmap, pv->pv_va); 2556 if (*pte & PG_M) { 2557 splx(s); 2558 return TRUE; 2559 } 2560 } 2561 splx(s); 2562 return (FALSE); 2563} 2564 2565/* 2566 * pmap_is_prefaultable: 2567 * 2568 * Return whether or not the specified virtual address is elgible 2569 * for prefault. 2570 */ 2571boolean_t 2572pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 2573{ 2574 pd_entry_t *pde; 2575 pt_entry_t *pte; 2576 2577 pde = pmap_pde(pmap, addr); 2578 if (pde == NULL || (*pde & PG_V) == 0) 2579 return (FALSE); 2580 pte = vtopte(addr); 2581 if ((*pte & PG_V) == 0) 2582 return (FALSE); 2583 return (TRUE); 2584} 2585 2586/* 2587 * Clear the given bit in each of the given page's ptes. 2588 */ 2589static __inline void 2590pmap_clear_ptes(vm_page_t m, int bit) 2591{ 2592 register pv_entry_t pv; 2593 pt_entry_t pbits, *pte; 2594 int s; 2595 2596 if (!pmap_initialized || (m->flags & PG_FICTITIOUS) || 2597 (bit == PG_RW && (m->flags & PG_WRITEABLE) == 0)) 2598 return; 2599 2600 s = splvm(); 2601 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2602 /* 2603 * Loop over all current mappings setting/clearing as appropos If 2604 * setting RO do we need to clear the VAC? 2605 */ 2606 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2607 /* 2608 * don't write protect pager mappings 2609 */ 2610 if (bit == PG_RW) { 2611 if (!pmap_track_modified(pv->pv_va)) 2612 continue; 2613 } 2614 2615#if defined(PMAP_DIAGNOSTIC) 2616 if (!pv->pv_pmap) { 2617 printf("Null pmap (cb) at va: 0x%lx\n", pv->pv_va); 2618 continue; 2619 } 2620#endif 2621 2622 pte = pmap_pte(pv->pv_pmap, pv->pv_va); 2623 pbits = *pte; 2624 if (pbits & bit) { 2625 if (bit == PG_RW) { 2626 if (pbits & PG_M) { 2627 vm_page_dirty(m); 2628 } 2629 pte_store(pte, pbits & ~(PG_M|PG_RW)); 2630 } else { 2631 pte_store(pte, pbits & ~bit); 2632 } 2633 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 2634 } 2635 } 2636 if (bit == PG_RW) 2637 vm_page_flag_clear(m, PG_WRITEABLE); 2638 splx(s); 2639} 2640 2641/* 2642 * pmap_page_protect: 2643 * 2644 * Lower the permission for all mappings to a given page. 2645 */ 2646void 2647pmap_page_protect(vm_page_t m, vm_prot_t prot) 2648{ 2649 if ((prot & VM_PROT_WRITE) == 0) { 2650 if (prot & (VM_PROT_READ | VM_PROT_EXECUTE)) { 2651 pmap_clear_ptes(m, PG_RW); 2652 } else { 2653 pmap_remove_all(m); 2654 } 2655 } 2656} 2657 2658/* 2659 * pmap_ts_referenced: 2660 * 2661 * Return a count of reference bits for a page, clearing those bits. 2662 * It is not necessary for every reference bit to be cleared, but it 2663 * is necessary that 0 only be returned when there are truly no 2664 * reference bits set. 2665 * 2666 * XXX: The exact number of bits to check and clear is a matter that 2667 * should be tested and standardized at some point in the future for 2668 * optimal aging of shared pages. 2669 */ 2670int 2671pmap_ts_referenced(vm_page_t m) 2672{ 2673 register pv_entry_t pv, pvf, pvn; 2674 pt_entry_t *pte; 2675 pt_entry_t v; 2676 int s; 2677 int rtval = 0; 2678 2679 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 2680 return (rtval); 2681 2682 s = splvm(); 2683 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2684 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2685 2686 pvf = pv; 2687 2688 do { 2689 pvn = TAILQ_NEXT(pv, pv_list); 2690 2691 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2692 2693 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2694 2695 if (!pmap_track_modified(pv->pv_va)) 2696 continue; 2697 2698 pte = pmap_pte(pv->pv_pmap, pv->pv_va); 2699 2700 if (pte && ((v = pte_load(pte)) & PG_A) != 0) { 2701 pte_store(pte, v & ~PG_A); 2702 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 2703 2704 rtval++; 2705 if (rtval > 4) { 2706 break; 2707 } 2708 } 2709 } while ((pv = pvn) != NULL && pv != pvf); 2710 } 2711 splx(s); 2712 2713 return (rtval); 2714} 2715 2716/* 2717 * Clear the modify bits on the specified physical page. 2718 */ 2719void 2720pmap_clear_modify(vm_page_t m) 2721{ 2722 pmap_clear_ptes(m, PG_M); 2723} 2724 2725/* 2726 * pmap_clear_reference: 2727 * 2728 * Clear the reference bit on the specified physical page. 2729 */ 2730void 2731pmap_clear_reference(vm_page_t m) 2732{ 2733 pmap_clear_ptes(m, PG_A); 2734} 2735 2736/* 2737 * Miscellaneous support routines follow 2738 */ 2739 2740/* 2741 * Map a set of physical memory pages into the kernel virtual 2742 * address space. Return a pointer to where it is mapped. This 2743 * routine is intended to be used for mapping device memory, 2744 * NOT real memory. 2745 */ 2746void * 2747pmap_mapdev(pa, size) 2748 vm_paddr_t pa; 2749 vm_size_t size; 2750{ 2751 vm_offset_t va, tmpva, offset; 2752 2753 /* If this fits within the direct map window, use it */ 2754 if (pa < dmaplimit && (pa + size) < dmaplimit) 2755 return ((void *)PHYS_TO_DMAP(pa)); 2756 offset = pa & PAGE_MASK; 2757 size = roundup(offset + size, PAGE_SIZE); 2758 va = kmem_alloc_nofault(kernel_map, size); 2759 if (!va) 2760 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 2761 pa = pa & PG_FRAME; 2762 for (tmpva = va; size > 0; ) { 2763 pmap_kenter(tmpva, pa); 2764 size -= PAGE_SIZE; 2765 tmpva += PAGE_SIZE; 2766 pa += PAGE_SIZE; 2767 } 2768 pmap_invalidate_range(kernel_pmap, va, tmpva); 2769 return ((void *)(va + offset)); 2770} 2771 2772void 2773pmap_unmapdev(va, size) 2774 vm_offset_t va; 2775 vm_size_t size; 2776{ 2777 vm_offset_t base, offset, tmpva; 2778 2779 /* If we gave a direct map region in pmap_mapdev, do nothing */ 2780 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) 2781 return; 2782 base = trunc_page(va); 2783 offset = va & PAGE_MASK; 2784 size = roundup(offset + size, PAGE_SIZE); 2785 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 2786 pmap_kremove(tmpva); 2787 pmap_invalidate_range(kernel_pmap, va, tmpva); 2788 kmem_free(kernel_map, base, size); 2789} 2790 2791/* 2792 * perform the pmap work for mincore 2793 */ 2794int 2795pmap_mincore(pmap, addr) 2796 pmap_t pmap; 2797 vm_offset_t addr; 2798{ 2799 pt_entry_t *ptep, pte; 2800 vm_page_t m; 2801 int val = 0; 2802 2803 ptep = pmap_pte(pmap, addr); 2804 if (ptep == 0) { 2805 return 0; 2806 } 2807 2808 if ((pte = *ptep) != 0) { 2809 vm_paddr_t pa; 2810 2811 val = MINCORE_INCORE; 2812 if ((pte & PG_MANAGED) == 0) 2813 return val; 2814 2815 pa = pte & PG_FRAME; 2816 2817 m = PHYS_TO_VM_PAGE(pa); 2818 2819 /* 2820 * Modified by us 2821 */ 2822 if (pte & PG_M) 2823 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 2824 else { 2825 /* 2826 * Modified by someone else 2827 */ 2828 vm_page_lock_queues(); 2829 if (m->dirty || pmap_is_modified(m)) 2830 val |= MINCORE_MODIFIED_OTHER; 2831 vm_page_unlock_queues(); 2832 } 2833 /* 2834 * Referenced by us 2835 */ 2836 if (pte & PG_A) 2837 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 2838 else { 2839 /* 2840 * Referenced by someone else 2841 */ 2842 vm_page_lock_queues(); 2843 if ((m->flags & PG_REFERENCED) || 2844 pmap_ts_referenced(m)) { 2845 val |= MINCORE_REFERENCED_OTHER; 2846 vm_page_flag_set(m, PG_REFERENCED); 2847 } 2848 vm_page_unlock_queues(); 2849 } 2850 } 2851 return val; 2852} 2853 2854void 2855pmap_activate(struct thread *td) 2856{ 2857 struct proc *p = td->td_proc; 2858 pmap_t pmap, oldpmap; 2859 u_int64_t cr3; 2860 2861 critical_enter(); 2862 pmap = vmspace_pmap(td->td_proc->p_vmspace); 2863 oldpmap = PCPU_GET(curpmap); 2864#ifdef SMP 2865if (oldpmap) /* XXX FIXME */ 2866 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 2867 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 2868#else 2869if (oldpmap) /* XXX FIXME */ 2870 oldpmap->pm_active &= ~PCPU_GET(cpumask); 2871 pmap->pm_active |= PCPU_GET(cpumask); 2872#endif 2873 cr3 = vtophys(pmap->pm_pml4); 2874 /* XXXKSE this is wrong. 2875 * pmap_activate is for the current thread on the current cpu 2876 */ 2877 if (p->p_flag & P_SA) { 2878 /* Make sure all other cr3 entries are updated. */ 2879 /* what if they are running? XXXKSE (maybe abort them) */ 2880 FOREACH_THREAD_IN_PROC(p, td) { 2881 td->td_pcb->pcb_cr3 = cr3; 2882 } 2883 } else { 2884 td->td_pcb->pcb_cr3 = cr3; 2885 } 2886 load_cr3(cr3); 2887 critical_exit(); 2888} 2889 2890vm_offset_t 2891pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size) 2892{ 2893 2894 if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) { 2895 return addr; 2896 } 2897 2898 addr = (addr + (NBPDR - 1)) & ~(NBPDR - 1); 2899 return addr; 2900} 2901