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$FreeBSD: head/share/man/man4/gpio.4 255531 2013-09-13 21:23:04Z sbruno $
.Dd September 13, 2013 .Dt GPIO 4 .Os .Sh NAME .Nm gpiobus .Nd GPIO bus system .Sh SYNOPSIS To compile these devices into your kernel and use the device hints, place the following lines in your kernel configuration file: d -ragged -offset indent .Cd "device gpiobus" .Cd "device gpioiic" .Cd "device gpio" .Cd "device gpioc" .Cd "device gpioled" .Ed
p Additional device entries for the .Li ARM architecure include: d -ragged -offset indent .Cd "device a10_gpio" .Cd "device bcm_gpio" .Cd "device imx51_gpio" .Cd "device lpcgpio" .Cd "device mv_gpio" .Cd "device ti_gpio" .Cd "device gpio_avila" .Cd "device gpio_cambria" .Cd "device zy7_gpio" .Cd "device pxagpio" .Ed
p Additional device entries for the .Li MIPS architecure include: d -ragged -offset indent .Cd "device ar71xxx_gpio" .Cd "device octeon_gpio" .Cd "device rt305_gpio" .Ed
p Additional device entries for the .Li POWERPC architecure include: d -ragged -offset indent .Cd "device wiigpio" .Cd "device macgpio" .Ed .Sh DESCRIPTION The .Em gpiobus system provides a simple interface to the bit banging style GPIO bus found on embedded architectures.
p The acronym .Li GPIO means .Dq General-Purpose Input/Output.
p The BUS physically consists of multiple pins that can be configured for input/output, IRQ delivery, SDA/SCL .Em iicbus use, etc. On most embedded architechtures (mips/arm), discovery of the bus and configuration of the pins is done via .Xr device.hints 5 in the platform's kernel .Xr config 5 file.
p Assignment of .Xr gpioiic 4 bus variables is done via: l -tag -width ".Va hint.gpioiic.%d.atXXX" t Va hint.gpioiic.%d.at Normally just gpiobus0. t Va hint.gpioiic.%d.pins This is a bitmask of the pins on the gpio board that are to be used for SCLOCK and SDATA from the IIC bus. To configure pin 0 and 7, use the bitmask of 10000001 and convert it to a hexadecimal value of 0x0081. Should only ever have two bits set in mask. t Va hint.gpioiic.%d.scl Indicates which bit in the .Va hint.gpioiic.%d.pins should be used as the SCLOCK source. t Va hint.gpioiic.%d.sda Indicates which bit in the .Va hint.gpioiic.%d.pins should be used as the SDATA source. .El
p The following are only provided by the .Cd ar71xx_gpio driver. l -tag -width ".Va hint.gpioiic.%d.atXXX" t Va hint.gpio.%d.pinmask This is a bitmask of pins on the gpio board that we would like to expose for use to the host o/s. To expose pin 0, 4 and 7, use the bitmask of 10010001 converted to the hexadecimal value 0x0091. t Va hint.gpio.%d.pinon This is a bitmask of pins on the gpio board that will be set to ON at host start. To set pin 2, 5 and 13 to be set ON at boot, use the bitmask of 10000000010010 converted to the hexadecimal value 0x2012. t Va hint.gpio.function_set t Va hint.gpio.function_clear These are a bitmask of pins that will remap a pin to handle a specific function (USB, UART TX/RX, etc) in the Atheros function registers. This is mainly used to set/clear functions that we need when they are setup or not setup by uBoot. .El
p These values are configureable from the .Xr gpioled 4 interface and help create .Xr led 4 compatible devices in
a /dev/led/<name> . l -tag -width ".Va hint.gpioiic.%d.atXXX" t Va hint.gpioled.%d.at Normally assigned to gpiobus0. t Va hint.gpioled.%d.name Arbitrary name of device in
a /dev/led/ to create for .Xr led 4 interfaces. t Va hint.gpioled.%d.pins Which pin on the GPIO interface to map to this instance. .El
p Simply put, each pin of the GPIO interface is connected to an input/output of some device in a system. .Sh SEE ALSO .Xr iicbus 4 , .Xr gpioctl 8 .Sh HISTORY The .Nm manual page first appeared in .Fx 10.0 . .Sh AUTHORS This manual page was written by .An Sean Bruno Aq sbruno@FreeBSD.org .