Copyright (c) 2012 Robert N. M. Watson
All rights reserved.
This software was developed by SRI International and the University of
Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
("CTSRD"), as part of the DARPA CRASH research programme.
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$FreeBSD: releng/10.2/share/man/man4/altera_jtag_uart.4 239676 2012-08-25 11:30:36Z rwatson $
.Dd August 18, 2012 .Dt ALTERA_JTAG_UART 4 .Os .Sh NAME .Nm altera_jtag_uart .Nd driver for the Altera JTAG UART Core .Sh SYNOPSIS .Cd "device altera_jtag_uart"
p In
a /boot/device.hints : .Cd hint.altera_jtag_uart.0.at="nexus0" .Cd hint.altera_jtag_uart.0.maddr=0x7f000000 .Cd hint.altera_jtag_uart.0.msize=0x40 .Cd hint.altera_jtag_uart.0.irq=0 .Cd hint.altera_jtag_uart.1.at="nexus0" .Cd hint.altera_jtag_uart.1.maddr=0x7f001000 .Cd hint.altera_jtag_uart.1.msize=0x40 .Sh DESCRIPTION The .Nm device driver provides support for the Altera JTAG UART core, which allows multiple UART-like streams to be carried over JTAG. .Nm allows JTAG UART streams to be attached to both the low-level console interface, used for direct kernel input and output, and the .Xr tty 4 layer, to be used with .Xr ttys 5 and .Xr login 1 . Sequential Altera JTAG UART devices will appear as .Li ttyu0 , .Li ttyu1 , etc. .Sh HARDWARE Altera JTAG UART devices can be connected to using Altera's
a nios2-terminal program, with the instance selected using the .Li --instance argument on the management host. .Nm supports JTAG UART cores with or without interrupt lines connected; if the .Li irq portion of the
a device.hints entry is omitted, the driver will poll rather than configure interrupts. .Sh SEE ALSO .Xr login 1 , .Xr tty 4 , .Xr ttys 5 .Rs .%T Altera Embedded Peripherals IP User Guide .%D June 2011 .%I Altera Corporation .%U http://www.altera.com/literature/ug/ug_embedded_ip.pdf .Re .Sh HISTORY The .Nm device driver first appeared in .Fx 10.0 . .Sh AUTHORS The .Nm device driver and this manual page were developed by SRI International and the University of Cambridge Computer Laboratory under DARPA/AFRL contract
q FA8750-10-C-0237
q Do CTSRD Dc , as part of the DARPA CRASH research programme. This device driver was written by .An Robert N. M. Watson . .Sh BUGS .Nm must dynamically poll to detect when JTAG is present, in order to disable flow control in the event that there is no receiving endpoint. Otherwise, the boot may hang waiting for the JTAG client to be attached, and user processes attached to JTAG UART devices might block indefinitely. However, there is no way to flush the output buffer once JTAG is detected to have disappeared; this means that a small amount of stale output data will remain in the output buffer, being displayed by .Li nios2-terminal when it is connected. Loss of JTAG will not generate a hang-up event, as that is rarely the desired behaviour.
p .Li nios2-terminal does not place the client-side TTY in raw mode, and so by default will not pass all control characters through to the UART.