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$FreeBSD: head/lib/libpmc/pmc.k7.3 183084 2008-09-16 16:34:55Z jkoshy $
.Dd September 16, 2008 .Os .Dt PMC.K7 3 .Sh NAME .Nm pmc.k7 .Nd measurement events for .Tn AMD .Tn Athlon (K7 family) CPUs .Sh LIBRARY .Lb libpmc .Sh SYNOPSIS n pmc.h .Sh DESCRIPTION AMD K7 PMCs are present in the .Tn "AMD Athlon" series of CPUs and are documented in: .Rs .%B "AMD Athlon Processor x86 Code Optimization Guide" .%N "Publication No. 22007" .%D "February 2002" .%Q "Advanced Micro Devices, Inc." .Re .Ss PMC Features AMD K7 PMCs are 48 bits wide. Each K7 CPU contains 4 PMCs with the following capabilities: l -column "PMC_CAP_INTERRUPT" "Support" t Em Capability Ta Em Support t PMC_CAP_CASCADE Ta No t PMC_CAP_EDGE Ta Yes t PMC_CAP_INTERRUPT Ta Yes t PMC_CAP_INVERT Ta Yes t PMC_CAP_READ Ta Yes t PMC_CAP_PRECISE Ta No t PMC_CAP_SYSTEM Ta Yes t PMC_CAP_TAGGING Ta No t PMC_CAP_THRESHOLD Ta Yes t PMC_CAP_USER Ta Yes t PMC_CAP_WRITE Ta Yes .El .Ss Event Qualifiers
p Event specifiers for AMD K7 PMCs can have the following optional qualifiers: l -tag -width indent t Li count= Ns Ar value Configure the counter to increment only if the number of configured events measured in a cycle is greater than or equal to .Ar value . t Li edge Configure the counter to only count negated-to-asserted transitions of the conditions expressed by the other qualifiers. In other words, the counter will increment only once whenever a given condition becomes true, irrespective of the number of clocks during which the condition remains true. t Li inv Invert the sense of comparision when the .Dq Li count qualifier is present, making the counter to increment when the number of events per cycle is less than the value specified by the .Dq Li count qualifier. t Li os Configure the PMC to count events happening at privilege level 0. t Li unitmask= Ns Ar mask This qualifier is used to further qualify a select few events, .Dq Li k7-dc-refills-from-l2 , .Dq Li k7-dc-refills-from-system and .Dq Li k7-dc-writebacks . Here .Ar mask is a string of the following characters optionally separated by .Ql + characters:
p l -tag -width indent -compact t Li m Count operations for lines in the .Dq Modified state. t Li o Count operations for lines in the .Dq Owner state. t Li e Count operations for lines in the .Dq Exclusive state. t Li s Count operations for lines in the .Dq Shared state. t Li i Count operations for lines in the .Dq Invalid state. .El
p If no .Dq Li unitmask qualifier is specified, the default is to count events for caches lines in any of the above states. t Li usr Configure the PMC to count events occurring at privilege levels 1, 2 or 3. .El
p If neither of the .Dq Li os or .Dq Li usr qualifiers were specified, the default is to enable both. .Ss AMD K7 Event Specifiers The event specifiers supported on AMD K7 PMCs are: l -tag -width indent t Li k7-dc-accesses Count data cache accesses. t Li k7-dc-misses Count data cache misses. t Li k7-dc-refills-from-l2 Op Li ,unitmask= Ns Ar mask Count data cache refills from L2 cache. This event may be further qualified using the .Dq Li unitmask qualifier. t Li k7-dc-refills-from-system Op Li ,unitmask= Ns Ar mask Count data cache refills from system memory. This event may be further qualified using the .Dq Li unitmask qualifier. t Li k7-dc-writebacks Op Li ,unitmask= Ns Ar mask Count data cache writebacks. This event may be further qualified using the .Dq Li unitmask qualifier. t Li k7-l1-dtlb-miss-and-l2-dtlb-hits Count L1 DTLB misses and L2 DTLB hits. t Li k7-l1-and-l2-dtlb-misses Count L1 and L2 DTLB misses. t Li k7-misaligned-references Count misaligned data references. t Li k7-ic-fetches Count instruction cache fetches. t Li k7-ic-misses Count instruction cache misses. t Li k7-l1-itlb-misses Count L1 ITLB misses that are L2 ITLB hits. t Li k7-l1-l2-itlb-misses Count L1 (and L2) ITLB misses. t Li k7-retired-instructions Count all retired instructions. t Li k7-retired-ops Count retired ops. t Li k7-retired-branches Count all retired branches (conditional, unconditional, exceptions and interrupts). t Li k7-retired-branches-mispredicted Count all misprediced retired branches. t Li k7-retired-taken-branches Count retired taken branches. t Li k7-retired-taken-branches-mispredicted Count mispredicted taken branches that were retired. t Li k7-retired-far-control-transfers Count retired far control transfers. t Li k7-retired-resync-branches Count retired resync branches (non control transfer branches). t Li k7-interrupts-masked-cycles Count the number of cycles when the processor's .Va IF flag was zero. t Li k7-interrupts-masked-while-pending-cycles Count the number of cycles interrupts were masked while pending due to the processor's .Va IF flag being zero. t Li k7-hardware-interrupts Count the number of taken hardware interrupts. .El .Ss Event Name Aliases The following table shows the mapping between the PMC-independent aliases supported by .Lb libpmc and the underlying hardware events used. l -column "branch-mispredicts" "Description" t Em Alias Ta Em Event t Li branches Ta Li k7-retired-branches t Li branch-mispredicts Ta Li k7-retired-branches-mispredicted t Li dc-misses Ta Li k7-dc-misses t Li ic-misses Ta Li k7-ic-misses t Li instructions Ta Li k7-retired-instructions t Li interrupts Ta Li k7-hardware-interrupts t Li unhalted-cycles Ta (unsupported) .El .Sh SEE ALSO .Xr pmc 3 , .Xr pmc.k8 3 , .Xr pmc.p4 3 , .Xr pmc.p5 3 , .Xr pmc.p6 3 , .Xr pmc.tsc 3 , .Xr pmclog 3 , .Xr hwpmc 4 .Sh HISTORY The .Nm pmc library first appeared in .Fx 6.0 . .Sh AUTHORS The .Lb libpmc library was written by .An "Joseph Koshy" .Aq jkoshy@FreeBSD.org .