fpu_arith.h revision 91174
191174Stmm/* 291174Stmm * Copyright (c) 1992, 1993 391174Stmm * The Regents of the University of California. All rights reserved. 491174Stmm * 591174Stmm * This software was developed by the Computer Systems Engineering group 691174Stmm * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 791174Stmm * contributed to Berkeley. 891174Stmm * 991174Stmm * All advertising materials mentioning features or use of this software 1091174Stmm * must display the following acknowledgement: 1191174Stmm * This product includes software developed by the University of 1291174Stmm * California, Lawrence Berkeley Laboratory. 1391174Stmm * 1491174Stmm * Redistribution and use in source and binary forms, with or without 1591174Stmm * modification, are permitted provided that the following conditions 1691174Stmm * are met: 1791174Stmm * 1. Redistributions of source code must retain the above copyright 1891174Stmm * notice, this list of conditions and the following disclaimer. 1991174Stmm * 2. Redistributions in binary form must reproduce the above copyright 2091174Stmm * notice, this list of conditions and the following disclaimer in the 2191174Stmm * documentation and/or other materials provided with the distribution. 2291174Stmm * 3. All advertising materials mentioning features or use of this software 2391174Stmm * must display the following acknowledgement: 2491174Stmm * This product includes software developed by the University of 2591174Stmm * California, Berkeley and its contributors. 2691174Stmm * 4. Neither the name of the University nor the names of its contributors 2791174Stmm * may be used to endorse or promote products derived from this software 2891174Stmm * without specific prior written permission. 2991174Stmm * 3091174Stmm * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 3191174Stmm * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 3291174Stmm * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 3391174Stmm * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 3491174Stmm * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 3591174Stmm * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 3691174Stmm * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3791174Stmm * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3891174Stmm * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3991174Stmm * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 4091174Stmm * SUCH DAMAGE. 4191174Stmm * 4291174Stmm * from: @(#)fpu_arith.h 8.1 (Berkeley) 6/11/93 4391174Stmm * from: NetBSD: fpu_arith.h,v 1.3 2000/07/24 04:11:03 mycroft 4491174Stmm * 4591174Stmm * $FreeBSD: head/lib/libc/sparc64/fpu/fpu_arith.h 91174 2002-02-23 21:37:18Z tmm $ 4691174Stmm */ 4791174Stmm 4891174Stmm/* 4991174Stmm * Extended-precision arithmetic. 5091174Stmm * 5191174Stmm * We hold the notion of a `carry register', which may or may not be a 5291174Stmm * machine carry bit or register. On the SPARC, it is just the machine's 5391174Stmm * carry bit. 5491174Stmm * 5591174Stmm * In the worst case, you can compute the carry from x+y as 5691174Stmm * (unsigned)(x + y) < (unsigned)x 5791174Stmm * and from x+y+c as 5891174Stmm * ((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0) 5991174Stmm * for example. 6091174Stmm */ 6191174Stmm 6291174Stmm/* set up for extended-precision arithemtic */ 6391174Stmm#define FPU_DECL_CARRY 6491174Stmm 6591174Stmm/* 6691174Stmm * We have three kinds of add: 6791174Stmm * add with carry: r = x + y + c 6891174Stmm * add (ignoring current carry) and set carry: c'r = x + y + 0 6991174Stmm * add with carry and set carry: c'r = x + y + c 7091174Stmm * The macros use `C' for `use carry' and `S' for `set carry'. 7191174Stmm * Note that the state of the carry is undefined after ADDC and SUBC, 7291174Stmm * so if all you have for these is `add with carry and set carry', 7391174Stmm * that is OK. 7491174Stmm * 7591174Stmm * The same goes for subtract, except that we compute x - y - c. 7691174Stmm * 7791174Stmm * Finally, we have a way to get the carry into a `regular' variable, 7891174Stmm * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero 7991174Stmm * into carry; GET_CARRY sets its argument to 0 or 1. 8091174Stmm */ 8191174Stmm#define FPU_ADDC(r, x, y) \ 8291174Stmm __asm __volatile("addx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y)) 8391174Stmm#define FPU_ADDS(r, x, y) \ 8491174Stmm __asm __volatile("addcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y)) 8591174Stmm#define FPU_ADDCS(r, x, y) \ 8691174Stmm __asm __volatile("addxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y)) 8791174Stmm#define FPU_SUBC(r, x, y) \ 8891174Stmm __asm __volatile("subx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y)) 8991174Stmm#define FPU_SUBS(r, x, y) \ 9091174Stmm __asm __volatile("subcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y)) 9191174Stmm#define FPU_SUBCS(r, x, y) \ 9291174Stmm __asm __volatile("subxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y)) 9391174Stmm 9491174Stmm#define FPU_GET_CARRY(r) __asm __volatile("addx %%g0,%%g0,%0" : "=r"(r)) 9591174Stmm#define FPU_SET_CARRY(v) __asm __volatile("addcc %0,-1,%%g0" : : "r"(v)) 9691174Stmm 9791174Stmm#define FPU_SHL1_BY_ADD /* shift left 1 faster by ADDC than (a<<1)|(b>>31) */ 98