1275760SdimPull in r221170 from upstream clang trunk (by Roman Divacky): 2275760Sdim 3275760Sdim Implement vaarg lowering for ppc32. Lowering of scalars and 4275760Sdim aggregates is supported. Complex numbers are not. 5275760Sdim 6283015SdimPull in r221174 from upstream clang trunk (by Roman Divacky): 7283015Sdim 8283015Sdim Require asserts to unbreak the buildbots. 9283015Sdim 10283015SdimPull in r221284 from upstream clang trunk (by Roman Divacky): 11283015Sdim 12283015Sdim Rewrite the test to not require asserts. 13283015Sdim 14283015SdimPull in r221285 from upstream clang trunk (by Roman Divacky): 15283015Sdim 16283015Sdim Since the file has both ppc and ppc64 tests in it rename it. 17283015Sdim 18275760SdimThis adds va_args support for PowerPC (32 bit) to clang. 19275760Sdim 20275760SdimIntroduced here: http://svnweb.freebsd.org/changeset/base/275759 21275760Sdim 22275760SdimIndex: tools/clang/lib/CodeGen/TargetInfo.cpp 23275760Sdim=================================================================== 24275760Sdim--- tools/clang/lib/CodeGen/TargetInfo.cpp 25275760Sdim+++ tools/clang/lib/CodeGen/TargetInfo.cpp 26275760Sdim@@ -2733,12 +2733,20 @@ llvm::Value *NaClX86_64ABIInfo::EmitVAArg(llvm::Va 27275760Sdim 28275760Sdim 29275760Sdim // PowerPC-32 30275760Sdim- 31275760Sdim namespace { 32275760Sdim-class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 33275760Sdim+/// PPC32_SVR4_ABIInfo - The 32-bit PowerPC ELF (SVR4) ABI information. 34275760Sdim+class PPC32_SVR4_ABIInfo : public DefaultABIInfo { 35275760Sdim public: 36275760Sdim- PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 37275760Sdim+ PPC32_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {} 38275760Sdim 39275760Sdim+ llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 40275760Sdim+ CodeGenFunction &CGF) const; 41275760Sdim+}; 42275760Sdim+ 43275760Sdim+class PPC32TargetCodeGenInfo : public TargetCodeGenInfo { 44275760Sdim+public: 45275760Sdim+ PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : TargetCodeGenInfo(new PPC32_SVR4_ABIInfo(CGT)) {} 46275760Sdim+ 47275760Sdim int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 48275760Sdim // This is recovered from gcc output. 49275760Sdim return 1; // r1 is the dedicated stack pointer 50275760Sdim@@ -2750,6 +2758,96 @@ namespace { 51275760Sdim 52275760Sdim } 53275760Sdim 54275760Sdim+llvm::Value *PPC32_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr, 55275760Sdim+ QualType Ty, 56275760Sdim+ CodeGenFunction &CGF) const { 57275760Sdim+ if (const ComplexType *CTy = Ty->getAs<ComplexType>()) { 58275760Sdim+ // TODO: Implement this. For now ignore. 59275760Sdim+ (void)CTy; 60275760Sdim+ return NULL; 61275760Sdim+ } 62275760Sdim+ 63275760Sdim+ bool isI64 = Ty->isIntegerType() && getContext().getTypeSize(Ty) == 64; 64275760Sdim+ bool isInt = Ty->isIntegerType() || Ty->isPointerType() || Ty->isAggregateType(); 65275760Sdim+ llvm::Type *CharPtr = CGF.Int8PtrTy; 66275760Sdim+ llvm::Type *CharPtrPtr = CGF.Int8PtrPtrTy; 67275760Sdim+ 68275760Sdim+ CGBuilderTy &Builder = CGF.Builder; 69275760Sdim+ llvm::Value *GPRPtr = Builder.CreateBitCast(VAListAddr, CharPtr, "gprptr"); 70275760Sdim+ llvm::Value *GPRPtrAsInt = Builder.CreatePtrToInt(GPRPtr, CGF.Int32Ty); 71275760Sdim+ llvm::Value *FPRPtrAsInt = Builder.CreateAdd(GPRPtrAsInt, Builder.getInt32(1)); 72275760Sdim+ llvm::Value *FPRPtr = Builder.CreateIntToPtr(FPRPtrAsInt, CharPtr); 73275760Sdim+ llvm::Value *OverflowAreaPtrAsInt = Builder.CreateAdd(FPRPtrAsInt, Builder.getInt32(3)); 74275760Sdim+ llvm::Value *OverflowAreaPtr = Builder.CreateIntToPtr(OverflowAreaPtrAsInt, CharPtrPtr); 75275760Sdim+ llvm::Value *RegsaveAreaPtrAsInt = Builder.CreateAdd(OverflowAreaPtrAsInt, Builder.getInt32(4)); 76275760Sdim+ llvm::Value *RegsaveAreaPtr = Builder.CreateIntToPtr(RegsaveAreaPtrAsInt, CharPtrPtr); 77275760Sdim+ llvm::Value *GPR = Builder.CreateLoad(GPRPtr, false, "gpr"); 78275760Sdim+ // Align GPR when TY is i64. 79275760Sdim+ if (isI64) { 80275760Sdim+ llvm::Value *GPRAnd = Builder.CreateAnd(GPR, Builder.getInt8(1)); 81275760Sdim+ llvm::Value *CC64 = Builder.CreateICmpEQ(GPRAnd, Builder.getInt8(1)); 82275760Sdim+ llvm::Value *GPRPlusOne = Builder.CreateAdd(GPR, Builder.getInt8(1)); 83275760Sdim+ GPR = Builder.CreateSelect(CC64, GPRPlusOne, GPR); 84275760Sdim+ } 85275760Sdim+ llvm::Value *FPR = Builder.CreateLoad(FPRPtr, false, "fpr"); 86275760Sdim+ llvm::Value *OverflowArea = Builder.CreateLoad(OverflowAreaPtr, false, "overflow_area"); 87275760Sdim+ llvm::Value *OverflowAreaAsInt = Builder.CreatePtrToInt(OverflowArea, CGF.Int32Ty); 88275760Sdim+ llvm::Value *RegsaveArea = Builder.CreateLoad(RegsaveAreaPtr, false, "regsave_area"); 89275760Sdim+ llvm::Value *RegsaveAreaAsInt = Builder.CreatePtrToInt(RegsaveArea, CGF.Int32Ty); 90275760Sdim+ 91275760Sdim+ llvm::Value *CC = Builder.CreateICmpULT(isInt ? GPR : FPR, 92275760Sdim+ Builder.getInt8(8), "cond"); 93275760Sdim+ 94275760Sdim+ llvm::Value *RegConstant = Builder.CreateMul(isInt ? GPR : FPR, 95275760Sdim+ Builder.getInt8(isInt ? 4 : 8)); 96275760Sdim+ 97275760Sdim+ llvm::Value *OurReg = Builder.CreateAdd(RegsaveAreaAsInt, Builder.CreateSExt(RegConstant, CGF.Int32Ty)); 98275760Sdim+ 99275760Sdim+ if (Ty->isFloatingType()) 100275760Sdim+ OurReg = Builder.CreateAdd(OurReg, Builder.getInt32(32)); 101275760Sdim+ 102275760Sdim+ llvm::BasicBlock *UsingRegs = CGF.createBasicBlock("using_regs"); 103275760Sdim+ llvm::BasicBlock *UsingOverflow = CGF.createBasicBlock("using_overflow"); 104275760Sdim+ llvm::BasicBlock *Cont = CGF.createBasicBlock("cont"); 105275760Sdim+ 106275760Sdim+ Builder.CreateCondBr(CC, UsingRegs, UsingOverflow); 107275760Sdim+ 108275760Sdim+ CGF.EmitBlock(UsingRegs); 109275760Sdim+ 110275760Sdim+ llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 111275760Sdim+ llvm::Value *Result1 = Builder.CreateIntToPtr(OurReg, PTy); 112275760Sdim+ // Increase the GPR/FPR indexes. 113275760Sdim+ if (isInt) { 114275760Sdim+ GPR = Builder.CreateAdd(GPR, Builder.getInt8(isI64 ? 2 : 1)); 115275760Sdim+ Builder.CreateStore(GPR, GPRPtr); 116275760Sdim+ } else { 117275760Sdim+ FPR = Builder.CreateAdd(FPR, Builder.getInt8(1)); 118275760Sdim+ Builder.CreateStore(FPR, FPRPtr); 119275760Sdim+ } 120275760Sdim+ CGF.EmitBranch(Cont); 121275760Sdim+ 122275760Sdim+ CGF.EmitBlock(UsingOverflow); 123275760Sdim+ 124275760Sdim+ // Increase the overflow area. 125275760Sdim+ llvm::Value *Result2 = Builder.CreateIntToPtr(OverflowAreaAsInt, PTy); 126275760Sdim+ OverflowAreaAsInt = Builder.CreateAdd(OverflowAreaAsInt, Builder.getInt32(isInt ? 4 : 8)); 127275760Sdim+ Builder.CreateStore(Builder.CreateIntToPtr(OverflowAreaAsInt, CharPtr), OverflowAreaPtr); 128275760Sdim+ CGF.EmitBranch(Cont); 129275760Sdim+ 130275760Sdim+ CGF.EmitBlock(Cont); 131275760Sdim+ 132275760Sdim+ llvm::PHINode *Result = CGF.Builder.CreatePHI(PTy, 2, "vaarg.addr"); 133275760Sdim+ Result->addIncoming(Result1, UsingRegs); 134275760Sdim+ Result->addIncoming(Result2, UsingOverflow); 135275760Sdim+ 136275760Sdim+ if (Ty->isAggregateType()) { 137275760Sdim+ llvm::Value *AGGPtr = Builder.CreateBitCast(Result, CharPtrPtr, "aggrptr") ; 138275760Sdim+ return Builder.CreateLoad(AGGPtr, false, "aggr"); 139275760Sdim+ } 140275760Sdim+ 141275760Sdim+ return Result; 142275760Sdim+} 143275760Sdim+ 144275760Sdim bool 145275760Sdim PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 146275760Sdim llvm::Value *Address) const { 147275760SdimIndex: tools/clang/test/CodeGen/ppc64-varargs-struct.c 148275760Sdim=================================================================== 149275760Sdim--- tools/clang/test/CodeGen/ppc64-varargs-struct.c 150275760Sdim+++ tools/clang/test/CodeGen/ppc64-varargs-struct.c 151283015Sdim@@ -1,30 +0,0 @@ 152283015Sdim-// REQUIRES: ppc64-registered-target 153283015Sdim-// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s 154283015Sdim- 155283015Sdim-#include <stdarg.h> 156283015Sdim- 157283015Sdim-struct x { 158283015Sdim- long a; 159283015Sdim- double b; 160283015Sdim-}; 161283015Sdim- 162283015Sdim-void testva (int n, ...) 163283015Sdim-{ 164283015Sdim- va_list ap; 165283015Sdim- 166283015Sdim- struct x t = va_arg (ap, struct x); 167283015Sdim-// CHECK: bitcast i8* %{{[a-z.0-9]*}} to %struct.x* 168283015Sdim-// CHECK: bitcast %struct.x* %t to i8* 169283015Sdim-// CHECK: bitcast %struct.x* %{{[0-9]+}} to i8* 170283015Sdim-// CHECK: call void @llvm.memcpy 171283015Sdim- 172283015Sdim- int v = va_arg (ap, int); 173283015Sdim-// CHECK: ptrtoint i8* %{{[a-z.0-9]*}} to i64 174283015Sdim-// CHECK: add i64 %{{[0-9]+}}, 4 175283015Sdim-// CHECK: inttoptr i64 %{{[0-9]+}} to i8* 176283015Sdim-// CHECK: bitcast i8* %{{[0-9]+}} to i32* 177283015Sdim- 178283015Sdim- __int128_t u = va_arg (ap, __int128_t); 179283015Sdim-// CHECK: bitcast i8* %{{[a-z.0-9]+}} to i128* 180283015Sdim-// CHECK-NEXT: load i128* %{{[0-9]+}} 181283015Sdim-} 182283015SdimIndex: tools/clang/test/CodeGen/ppc-varargs-struct.c 183283015Sdim=================================================================== 184283015Sdim--- tools/clang/test/CodeGen/ppc-varargs-struct.c 185283015Sdim+++ tools/clang/test/CodeGen/ppc-varargs-struct.c 186283015Sdim@@ -0,0 +1,112 @@ 187283015Sdim+// REQUIRES: ppc64-registered-target 188283015Sdim+// REQUIRES: asserts 189283015Sdim+// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s 190275760Sdim+// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-PPC 191283015Sdim+ 192283015Sdim+#include <stdarg.h> 193283015Sdim+ 194283015Sdim+struct x { 195283015Sdim+ long a; 196283015Sdim+ double b; 197283015Sdim+}; 198283015Sdim+ 199283015Sdim+void testva (int n, ...) 200283015Sdim+{ 201283015Sdim+ va_list ap; 202283015Sdim+ 203283015Sdim+ struct x t = va_arg (ap, struct x); 204283015Sdim+// CHECK: bitcast i8* %{{[a-z.0-9]*}} to %struct.x* 205283015Sdim+// CHECK: bitcast %struct.x* %t to i8* 206283015Sdim+// CHECK: bitcast %struct.x* %{{[0-9]+}} to i8* 207283015Sdim+// CHECK: call void @llvm.memcpy 208283015Sdim+// CHECK-PPC: [[ARRAYDECAY:%[a-z0-9]+]] = getelementptr inbounds [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0 209283015Sdim+// CHECK-PPC-NEXT: [[GPRPTR:%[a-z0-9]+]] = bitcast %struct.__va_list_tag* [[ARRAYDECAY]] to i8* 210283015Sdim+// CHECK-PPC-NEXT: [[ZERO:%[0-9]+]] = ptrtoint i8* [[GPRPTR]] to i32 211283015Sdim+// CHECK-PPC-NEXT: [[ONE:%[0-9]+]] = add i32 [[ZERO]], 1 212283015Sdim+// CHECK-PPC-NEXT: [[TWO:%[0-9]+]] = inttoptr i32 [[ONE]] to i8* 213283015Sdim+// CHECK-PPC-NEXT: [[THREE:%[0-9]+]] = add i32 [[ONE]], 3 214283015Sdim+// CHECK-PPC-NEXT: [[FOUR:%[0-9]+]] = inttoptr i32 [[THREE]] to i8** 215283015Sdim+// CHECK-PPC-NEXT: [[FIVE:%[0-9]+]] = add i32 [[THREE]], 4 216283015Sdim+// CHECK-PPC-NEXT: [[SIX:%[0-9]+]] = inttoptr i32 [[FIVE]] to i8** 217283015Sdim+// CHECK-PPC-NEXT: [[GPR:%[a-z0-9]+]] = load i8* [[GPRPTR]] 218283015Sdim+// CHECK-PPC-NEXT: [[FPR:%[a-z0-9]+]] = load i8* [[TWO]] 219283015Sdim+// CHECK-PPC-NEXT: [[OVERFLOW_AREA:%[a-z_0-9]+]] = load i8** [[FOUR]] 220283015Sdim+// CHECK-PPC-NEXT: [[SEVEN:%[0-9]+]] = ptrtoint i8* [[OVERFLOW_AREA]] to i32 221283015Sdim+// CHECK-PPC-NEXT: [[REGSAVE_AREA:%[a-z_0-9]+]] = load i8** [[SIX]] 222283015Sdim+// CHECK-PPC-NEXT: [[EIGHT:%[0-9]+]] = ptrtoint i8* [[REGSAVE_AREA]] to i32 223283015Sdim+// CHECK-PPC-NEXT: [[COND:%[a-z0-9]+]] = icmp ult i8 [[GPR]], 8 224283015Sdim+// CHECK-PPC-NEXT: [[NINE:%[0-9]+]] = mul i8 [[GPR]], 4 225283015Sdim+// CHECK-PPC-NEXT: [[TEN:%[0-9]+]] = sext i8 [[NINE]] to i32 226283015Sdim+// CHECK-PPC-NEXT: [[ELEVEN:%[0-9]+]] = add i32 [[EIGHT]], [[TEN]] 227283015Sdim+// CHECK-PPC-NEXT: br i1 [[COND]], label [[USING_REGS:%[a-z_0-9]+]], label [[USING_OVERFLOW:%[a-z_0-9]+]] 228275760Sdim+// 229283015Sdim+// CHECK-PPC1:[[USING_REGS]] 230283015Sdim+// CHECK-PPC: [[TWELVE:%[0-9]+]] = inttoptr i32 [[ELEVEN]] to %struct.x* 231283015Sdim+// CHECK-PPC-NEXT: [[THIRTEEN:%[0-9]+]] = add i8 [[GPR]], 1 232283015Sdim+// CHECK-PPC-NEXT: store i8 [[THIRTEEN]], i8* [[GPRPTR]] 233283015Sdim+// CHECK-PPC-NEXT: br label [[CONT:%[a-z0-9]+]] 234275760Sdim+// 235283015Sdim+// CHECK-PPC1:[[USING_OVERFLOW]] 236283015Sdim+// CHECK-PPC: [[FOURTEEN:%[0-9]+]] = inttoptr i32 [[SEVEN]] to %struct.x* 237283015Sdim+// CHECK-PPC-NEXT: [[FIFTEEN:%[0-9]+]] = add i32 [[SEVEN]], 4 238283015Sdim+// CHECK-PPC-NEXT: [[SIXTEEN:%[0-9]+]] = inttoptr i32 [[FIFTEEN]] to i8* 239283015Sdim+// CHECK-PPC-NEXT: store i8* [[SIXTEEN]], i8** [[FOUR]] 240283015Sdim+// CHECK-PPC-NEXT: br label [[CONT]] 241275760Sdim+// 242283015Sdim+// CHECK-PPC1:[[CONT]] 243283015Sdim+// CHECK-PPC: [[VAARG_ADDR:%[a-z.0-9]+]] = phi %struct.x* [ [[TWELVE]], [[USING_REGS]] ], [ [[FOURTEEN]], [[USING_OVERFLOW]] ] 244283015Sdim+// CHECK-PPC-NEXT: [[AGGRPTR:%[a-z0-9]+]] = bitcast %struct.x* [[VAARG_ADDR]] to i8** 245283015Sdim+// CHECK-PPC-NEXT: [[AGGR:%[a-z0-9]+]] = load i8** [[AGGRPTR]] 246283015Sdim+// CHECK-PPC-NEXT: [[SEVENTEEN:%[0-9]+]] = bitcast %struct.x* %t to i8* 247283015Sdim+// CHECK-PPC-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[SEVENTEEN]], i8* [[AGGR]], i32 16, i32 8, i1 false) 248283015Sdim+ 249283015Sdim+ int v = va_arg (ap, int); 250283015Sdim+// CHECK: ptrtoint i8* %{{[a-z.0-9]*}} to i64 251283015Sdim+// CHECK: add i64 %{{[0-9]+}}, 4 252283015Sdim+// CHECK: inttoptr i64 %{{[0-9]+}} to i8* 253283015Sdim+// CHECK: bitcast i8* %{{[0-9]+}} to i32* 254283015Sdim+// CHECK-PPC: [[ARRAYDECAY1:%[a-z0-9]+]] = getelementptr inbounds [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0 255283015Sdim+// CHECK-PPC-NEXT: [[GPRPTR1:%[a-z0-9]+]] = bitcast %struct.__va_list_tag* [[ARRAYDECAY1]] to i8* 256283015Sdim+// CHECK-PPC-NEXT: [[EIGHTEEN:%[0-9]+]] = ptrtoint i8* [[GPRPTR1]] to i32 257283015Sdim+// CHECK-PPC-NEXT: [[NINETEEN:%[0-9]+]] = add i32 [[EIGHTEEN]], 1 258283015Sdim+// CHECK-PPC-NEXT: [[TWENTY:%[0-9]+]] = inttoptr i32 [[NINETEEN]] to i8* 259283015Sdim+// CHECK-PPC-NEXT: [[TWENTYONE:%[0-9]+]] = add i32 [[NINETEEN]], 3 260283015Sdim+// CHECK-PPC-NEXT: [[TWENTYTWO:%[0-9]+]] = inttoptr i32 [[TWENTYONE]] to i8** 261283015Sdim+// CHECK-PPC-NEXT: [[TWENTYTHREE:%[0-9]+]] = add i32 [[TWENTYONE]], 4 262283015Sdim+// CHECK-PPC-NEXT: [[TWENTYFOUR:%[0-9]+]] = inttoptr i32 [[TWENTYTHREE]] to i8** 263283015Sdim+// CHECK-PPC-NEXT: [[GPR1:%[a-z0-9]+]] = load i8* [[GPRPTR1]] 264283015Sdim+// CHECK-PPC-NEXT: [[FPR1:%[a-z0-9]+]] = load i8* [[TWENTY]] 265283015Sdim+// CHECK-PPC-NEXT: [[OVERFLOW_AREA1:%[a-z_0-9]+]] = load i8** [[TWENTYTWO]] 266283015Sdim+// CHECK-PPC-NEXT: [[TWENTYFIVE:%[0-9]+]] = ptrtoint i8* [[OVERFLOW_AREA1]] to i32 267283015Sdim+// CHECK-PPC-NEXT: [[REGSAVE_AREA1:%[a-z_0-9]+]] = load i8** [[TWENTYFOUR]] 268283015Sdim+// CHECK-PPC-NEXT: [[TWENTYSIX:%[0-9]+]] = ptrtoint i8* [[REGSAVE_AREA1]] to i32 269283015Sdim+// CHECK-PPC-NEXT: [[COND1:%[a-z0-9]+]] = icmp ult i8 [[GPR1]], 8 270283015Sdim+// CHECK-PPC-NEXT: [[TWENTYSEVEN:%[0-9]+]] = mul i8 [[GPR1]], 4 271283015Sdim+// CHECK-PPC-NEXT: [[TWENTYEIGHT:%[0-9]+]] = sext i8 [[TWENTYSEVEN]] to i32 272283015Sdim+// CHECK-PPC-NEXT: [[TWENTYNINE:%[0-9]+]] = add i32 [[TWENTYSIX]], [[TWENTYEIGHT]] 273283015Sdim+// CHECK-PPC-NEXT: br i1 [[COND1]], label [[USING_REGS1:%[a-z_0-9]+]], label [[USING_OVERFLOW1:%[a-z_0-9]+]] 274275760Sdim+// 275283015Sdim+// CHECK-PPC1:[[USING_REGS1]]: 276283015Sdim+// CHECK-PPC: [[THIRTY:%[0-9]+]] = inttoptr i32 [[TWENTYNINE]] to i32* 277283015Sdim+// CHECK-PPC-NEXT: [[THIRTYONE:%[0-9]+]] = add i8 [[GPR1]], 1 278283015Sdim+// CHECK-PPC-NEXT: store i8 [[THIRTYONE]], i8* [[GPRPTR1]] 279283015Sdim+// CHECK-PPC-NEXT: br label [[CONT1:%[a-z0-9]+]] 280275760Sdim+// 281283015Sdim+// CHECK-PPC1:[[USING_OVERFLOW1]]: 282283015Sdim+// CHECK-PPC: [[THIRTYTWO:%[0-9]+]] = inttoptr i32 [[TWENTYFIVE]] to i32* 283283015Sdim+// CHECK-PPC-NEXT: [[THIRTYTHREE:%[0-9]+]] = add i32 [[TWENTYFIVE]], 4 284283015Sdim+// CHECK-PPC-NEXT: [[THIRTYFOUR:%[0-9]+]] = inttoptr i32 [[THIRTYTHREE]] to i8* 285283015Sdim+// CHECK-PPC-NEXT: store i8* [[THIRTYFOUR]], i8** [[TWENTYTWO]] 286283015Sdim+// CHECK-PPC-NEXT: br label [[CONT1]] 287275760Sdim+// 288283015Sdim+// CHECK-PPC1:[[CONT1]]: 289283015Sdim+// CHECK-PPC: [[VAARG_ADDR1:%[a-z.0-9]+]] = phi i32* [ [[THIRTY]], [[USING_REGS1]] ], [ [[THIRTYTWO]], [[USING_OVERFLOW1]] ] 290283015Sdim+// CHECK-PPC-NEXT: [[THIRTYFIVE:%[0-9]+]] = load i32* [[VAARG_ADDR1]] 291283015Sdim+// CHECK-PPC-NEXT: store i32 [[THIRTYFIVE]], i32* %v, align 4 292283015Sdim+ 293275760Sdim+#ifdef __powerpc64__ 294283015Sdim+ __int128_t u = va_arg (ap, __int128_t); 295275760Sdim+#endif 296283015Sdim+// CHECK: bitcast i8* %{{[a-z.0-9]+}} to i128* 297283015Sdim+// CHECK-NEXT: load i128* %{{[0-9]+}} 298283015Sdim+} 299