1263320SdimPull in r200617 from upstream llvm trunk (by Venkatraman Govindaraju):
2263320Sdim
3263320Sdim  [Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly.
4263320Sdim
5269012SemasteIntroduced here: http://svnweb.freebsd.org/changeset/base/262261
6263320Sdim
7263320SdimIndex: lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
8263320Sdim===================================================================
9263320Sdim--- lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
10263320Sdim+++ lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
11263320Sdim@@ -33,6 +33,25 @@
12263320Sdim 
13263320Sdim using namespace llvm;
14263320Sdim 
15263320Sdim+
16263320Sdim+static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
17263320Sdim+                                       StringRef TT) {
18263320Sdim+  MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
19263320Sdim+  unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
20263320Sdim+  MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 0);
21263320Sdim+  MAI->addInitialFrameState(Inst);
22263320Sdim+  return MAI;
23263320Sdim+}
24263320Sdim+
25263320Sdim+static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
26263320Sdim+                                       StringRef TT) {
27263320Sdim+  MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
28263320Sdim+  unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
29263320Sdim+  MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 2047);
30263320Sdim+  MAI->addInitialFrameState(Inst);
31263320Sdim+  return MAI;
32263320Sdim+}
33263320Sdim+
34263320Sdim static MCInstrInfo *createSparcMCInstrInfo() {
35263320Sdim   MCInstrInfo *X = new MCInstrInfo();
36263320Sdim   InitSparcMCInstrInfo(X);
37263320Sdim@@ -41,7 +60,7 @@ static MCInstrInfo *createSparcMCInstrInfo() {
38263320Sdim 
39263320Sdim static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) {
40263320Sdim   MCRegisterInfo *X = new MCRegisterInfo();
41263320Sdim-  InitSparcMCRegisterInfo(X, SP::I7);
42263320Sdim+  InitSparcMCRegisterInfo(X, SP::O7);
43263320Sdim   return X;
44263320Sdim }
45263320Sdim 
46263320Sdim@@ -132,8 +151,8 @@ static MCInstPrinter *createSparcMCInstPrinter(con
47263320Sdim 
48263320Sdim extern "C" void LLVMInitializeSparcTargetMC() {
49263320Sdim   // Register the MC asm info.
50263320Sdim-  RegisterMCAsmInfo<SparcELFMCAsmInfo> X(TheSparcTarget);
51263320Sdim-  RegisterMCAsmInfo<SparcELFMCAsmInfo> Y(TheSparcV9Target);
52263320Sdim+  RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo);
53263320Sdim+  RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo);
54263320Sdim 
55263320Sdim   // Register the MC codegen info.
56263320Sdim   TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
57263320SdimIndex: lib/Target/Sparc/SparcRegisterInfo.cpp
58263320Sdim===================================================================
59263320Sdim--- lib/Target/Sparc/SparcRegisterInfo.cpp
60263320Sdim+++ lib/Target/Sparc/SparcRegisterInfo.cpp
61263320Sdim@@ -35,7 +35,7 @@ ReserveAppRegisters("sparc-reserve-app-registers",
62263320Sdim                     cl::desc("Reserve application registers (%g2-%g4)"));
63263320Sdim 
64263320Sdim SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st)
65263320Sdim-  : SparcGenRegisterInfo(SP::I7), Subtarget(st) {
66263320Sdim+  : SparcGenRegisterInfo(SP::O7), Subtarget(st) {
67263320Sdim }
68263320Sdim 
69263320Sdim const uint16_t* SparcRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
70263320SdimIndex: test/CodeGen/SPARC/exception.ll
71263320Sdim===================================================================
72263320Sdim--- test/CodeGen/SPARC/exception.ll
73263320Sdim+++ test/CodeGen/SPARC/exception.ll
74263320Sdim@@ -56,7 +56,11 @@
75263320Sdim ; V8PIC_NOCFI-NEXT:   .word _ZTIi
76263320Sdim ; V8PIC_NOCFI:        .section .eh_frame
77263320Sdim ; V8PIC_NOCFI-NOT:    .section
78263320Sdim+; V8PIC_NOCFI:        .byte 15                     ! CIE Return Address Column
79263320Sdim ; V8PIC_NOCFI:        .word %r_disp32(DW.ref.__gxx_personality_v0)
80263320Sdim+; V8PIC_NOCFI:        .byte 12                     ! DW_CFA_def_cfa
81263320Sdim+; V8PIC_NOCFI:        .byte 14                     ! Reg 14
82263320Sdim+; V8PIC_NOCFI-NEXT:   .byte 0                      ! Offset 0
83263320Sdim ; V8PIC_NOCFI:        .word %r_disp32(.Ltmp{{.+}}) ! FDE initial location
84263320Sdim 
85263320Sdim 
86263320Sdim@@ -94,7 +98,11 @@
87263320Sdim ; V9PIC_NOCFI-NEXT:   .xword _ZTIi
88263320Sdim ; V9PIC_NOCFI:        .section .eh_frame
89263320Sdim ; V9PIC_NOCFI-NOT:    .section
90263320Sdim+; V9PIC_NOCFI:        .byte 15                     ! CIE Return Address Column
91263320Sdim ; V9PIC_NOCFI:        .word %r_disp32(DW.ref.__gxx_personality_v0)
92263320Sdim+; V9PIC_NOCFI:        .byte 12                     ! DW_CFA_def_cfa
93263320Sdim+; V9PIC_NOCFI-NEXT:   .byte 14                     ! Reg 14
94263320Sdim+; V9PIC_NOCFI:        .ascii "\377\017"            ! Offset 2047
95263320Sdim ; V9PIC_NOCFI:        .word %r_disp32(.Ltmp{{.+}}) ! FDE initial location
96263320Sdim 
97263320Sdim define i32 @main(i32 %argc, i8** nocapture readnone %argv) unnamed_addr #0 {
98