X86Subtarget.cpp revision 205218
1//===-- X86Subtarget.cpp - X86 Subtarget Information ------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the X86 specific subclass of TargetSubtarget. 11// 12//===----------------------------------------------------------------------===// 13 14#define DEBUG_TYPE "subtarget" 15#include "X86Subtarget.h" 16#include "X86InstrInfo.h" 17#include "X86GenSubtarget.inc" 18#include "llvm/GlobalValue.h" 19#include "llvm/Support/Debug.h" 20#include "llvm/Support/raw_ostream.h" 21#include "llvm/System/Host.h" 22#include "llvm/Target/TargetMachine.h" 23#include "llvm/Target/TargetOptions.h" 24#include "llvm/ADT/SmallVector.h" 25using namespace llvm; 26 27#if defined(_MSC_VER) 28#include <intrin.h> 29#endif 30 31/// ClassifyBlockAddressReference - Classify a blockaddress reference for the 32/// current subtarget according to how we should reference it in a non-pcrel 33/// context. 34unsigned char X86Subtarget:: 35ClassifyBlockAddressReference() const { 36 if (isPICStyleGOT()) // 32-bit ELF targets. 37 return X86II::MO_GOTOFF; 38 39 if (isPICStyleStubPIC()) // Darwin/32 in PIC mode. 40 return X86II::MO_PIC_BASE_OFFSET; 41 42 // Direct static reference to label. 43 return X86II::MO_NO_FLAG; 44} 45 46/// ClassifyGlobalReference - Classify a global variable reference for the 47/// current subtarget according to how we should reference it in a non-pcrel 48/// context. 49unsigned char X86Subtarget:: 50ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const { 51 // DLLImport only exists on windows, it is implemented as a load from a 52 // DLLIMPORT stub. 53 if (GV->hasDLLImportLinkage()) 54 return X86II::MO_DLLIMPORT; 55 56 // Materializable GVs (in JIT lazy compilation mode) do not require an 57 // extra load from stub. 58 bool isDecl = GV->isDeclaration() && !GV->isMaterializable(); 59 60 // X86-64 in PIC mode. 61 if (isPICStyleRIPRel()) { 62 // Large model never uses stubs. 63 if (TM.getCodeModel() == CodeModel::Large) 64 return X86II::MO_NO_FLAG; 65 66 if (isTargetDarwin()) { 67 // If symbol visibility is hidden, the extra load is not needed if 68 // target is x86-64 or the symbol is definitely defined in the current 69 // translation unit. 70 if (GV->hasDefaultVisibility() && 71 (isDecl || GV->isWeakForLinker())) 72 return X86II::MO_GOTPCREL; 73 } else { 74 assert(isTargetELF() && "Unknown rip-relative target"); 75 76 // Extra load is needed for all externally visible. 77 if (!GV->hasLocalLinkage() && GV->hasDefaultVisibility()) 78 return X86II::MO_GOTPCREL; 79 } 80 81 return X86II::MO_NO_FLAG; 82 } 83 84 if (isPICStyleGOT()) { // 32-bit ELF targets. 85 // Extra load is needed for all externally visible. 86 if (GV->hasLocalLinkage() || GV->hasHiddenVisibility()) 87 return X86II::MO_GOTOFF; 88 return X86II::MO_GOT; 89 } 90 91 if (isPICStyleStubPIC()) { // Darwin/32 in PIC mode. 92 // Determine whether we have a stub reference and/or whether the reference 93 // is relative to the PIC base or not. 94 95 // If this is a strong reference to a definition, it is definitely not 96 // through a stub. 97 if (!isDecl && !GV->isWeakForLinker()) 98 return X86II::MO_PIC_BASE_OFFSET; 99 100 // Unless we have a symbol with hidden visibility, we have to go through a 101 // normal $non_lazy_ptr stub because this symbol might be resolved late. 102 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference. 103 return X86II::MO_DARWIN_NONLAZY_PIC_BASE; 104 105 // If symbol visibility is hidden, we have a stub for common symbol 106 // references and external declarations. 107 if (isDecl || GV->hasCommonLinkage()) { 108 // Hidden $non_lazy_ptr reference. 109 return X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE; 110 } 111 112 // Otherwise, no stub. 113 return X86II::MO_PIC_BASE_OFFSET; 114 } 115 116 if (isPICStyleStubNoDynamic()) { // Darwin/32 in -mdynamic-no-pic mode. 117 // Determine whether we have a stub reference. 118 119 // If this is a strong reference to a definition, it is definitely not 120 // through a stub. 121 if (!isDecl && !GV->isWeakForLinker()) 122 return X86II::MO_NO_FLAG; 123 124 // Unless we have a symbol with hidden visibility, we have to go through a 125 // normal $non_lazy_ptr stub because this symbol might be resolved late. 126 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference. 127 return X86II::MO_DARWIN_NONLAZY; 128 129 // Otherwise, no stub. 130 return X86II::MO_NO_FLAG; 131 } 132 133 // Direct static reference to global. 134 return X86II::MO_NO_FLAG; 135} 136 137 138/// getBZeroEntry - This function returns the name of a function which has an 139/// interface like the non-standard bzero function, if such a function exists on 140/// the current subtarget and it is considered prefereable over memset with zero 141/// passed as the second argument. Otherwise it returns null. 142const char *X86Subtarget::getBZeroEntry() const { 143 // Darwin 10 has a __bzero entry point for this purpose. 144 if (getDarwinVers() >= 10) 145 return "__bzero"; 146 147 return 0; 148} 149 150/// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls 151/// to immediate address. 152bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const { 153 if (Is64Bit) 154 return false; 155 return isTargetELF() || TM.getRelocationModel() == Reloc::Static; 156} 157 158/// getSpecialAddressLatency - For targets where it is beneficial to 159/// backschedule instructions that compute addresses, return a value 160/// indicating the number of scheduling cycles of backscheduling that 161/// should be attempted. 162unsigned X86Subtarget::getSpecialAddressLatency() const { 163 // For x86 out-of-order targets, back-schedule address computations so 164 // that loads and stores aren't blocked. 165 // This value was chosen arbitrarily. 166 return 200; 167} 168 169/// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the 170/// specified arguments. If we can't run cpuid on the host, return true. 171static bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX, 172 unsigned *rEBX, unsigned *rECX, unsigned *rEDX) { 173#if defined(__x86_64__) || defined(_M_AMD64) || defined (_M_X64) 174 #if defined(__GNUC__) 175 // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually. 176 asm ("movq\t%%rbx, %%rsi\n\t" 177 "cpuid\n\t" 178 "xchgq\t%%rbx, %%rsi\n\t" 179 : "=a" (*rEAX), 180 "=S" (*rEBX), 181 "=c" (*rECX), 182 "=d" (*rEDX) 183 : "a" (value)); 184 return false; 185 #elif defined(_MSC_VER) 186 int registers[4]; 187 __cpuid(registers, value); 188 *rEAX = registers[0]; 189 *rEBX = registers[1]; 190 *rECX = registers[2]; 191 *rEDX = registers[3]; 192 return false; 193 #endif 194#elif defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86) 195 #if defined(__GNUC__) 196 asm ("movl\t%%ebx, %%esi\n\t" 197 "cpuid\n\t" 198 "xchgl\t%%ebx, %%esi\n\t" 199 : "=a" (*rEAX), 200 "=S" (*rEBX), 201 "=c" (*rECX), 202 "=d" (*rEDX) 203 : "a" (value)); 204 return false; 205 #elif defined(_MSC_VER) 206 __asm { 207 mov eax,value 208 cpuid 209 mov esi,rEAX 210 mov dword ptr [esi],eax 211 mov esi,rEBX 212 mov dword ptr [esi],ebx 213 mov esi,rECX 214 mov dword ptr [esi],ecx 215 mov esi,rEDX 216 mov dword ptr [esi],edx 217 } 218 return false; 219 #endif 220#endif 221 return true; 222} 223 224static void DetectFamilyModel(unsigned EAX, unsigned &Family, unsigned &Model) { 225 Family = (EAX >> 8) & 0xf; // Bits 8 - 11 226 Model = (EAX >> 4) & 0xf; // Bits 4 - 7 227 if (Family == 6 || Family == 0xf) { 228 if (Family == 0xf) 229 // Examine extended family ID if family ID is F. 230 Family += (EAX >> 20) & 0xff; // Bits 20 - 27 231 // Examine extended model ID if family ID is 6 or F. 232 Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19 233 } 234} 235 236void X86Subtarget::AutoDetectSubtargetFeatures() { 237 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; 238 union { 239 unsigned u[3]; 240 char c[12]; 241 } text; 242 243 if (GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1)) 244 return; 245 246 GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX); 247 248 if ((EDX >> 15) & 1) HasCMov = true; 249 if ((EDX >> 23) & 1) X86SSELevel = MMX; 250 if ((EDX >> 25) & 1) X86SSELevel = SSE1; 251 if ((EDX >> 26) & 1) X86SSELevel = SSE2; 252 if (ECX & 0x1) X86SSELevel = SSE3; 253 if ((ECX >> 9) & 1) X86SSELevel = SSSE3; 254 if ((ECX >> 19) & 1) X86SSELevel = SSE41; 255 if ((ECX >> 20) & 1) X86SSELevel = SSE42; 256 257 bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0; 258 bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0; 259 260 HasFMA3 = IsIntel && ((ECX >> 12) & 0x1); 261 HasAVX = ((ECX >> 28) & 0x1); 262 263 if (IsIntel || IsAMD) { 264 // Determine if bit test memory instructions are slow. 265 unsigned Family = 0; 266 unsigned Model = 0; 267 DetectFamilyModel(EAX, Family, Model); 268 IsBTMemSlow = IsAMD || (Family == 6 && Model >= 13); 269 270 GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); 271 HasX86_64 = (EDX >> 29) & 0x1; 272 HasSSE4A = IsAMD && ((ECX >> 6) & 0x1); 273 HasFMA4 = IsAMD && ((ECX >> 16) & 0x1); 274 } 275} 276 277X86Subtarget::X86Subtarget(const std::string &TT, const std::string &FS, 278 bool is64Bit) 279 : PICStyle(PICStyles::None) 280 , X86SSELevel(NoMMXSSE) 281 , X863DNowLevel(NoThreeDNow) 282 , HasCMov(false) 283 , HasX86_64(false) 284 , HasSSE4A(false) 285 , HasAVX(false) 286 , HasFMA3(false) 287 , HasFMA4(false) 288 , IsBTMemSlow(false) 289 , HasVectorUAMem(false) 290 , DarwinVers(0) 291 , stackAlignment(8) 292 // FIXME: this is a known good value for Yonah. How about others? 293 , MaxInlineSizeThreshold(128) 294 , Is64Bit(is64Bit) 295 , TargetType(isELF) { // Default to ELF unless otherwise specified. 296 297 // default to hard float ABI 298 if (FloatABIType == FloatABI::Default) 299 FloatABIType = FloatABI::Hard; 300 301 // Determine default and user specified characteristics 302 if (!FS.empty()) { 303 // If feature string is not empty, parse features string. 304 std::string CPU = sys::getHostCPUName(); 305 ParseSubtargetFeatures(FS, CPU); 306 // All X86-64 CPUs also have SSE2, however user might request no SSE via 307 // -mattr, so don't force SSELevel here. 308 } else { 309 // Otherwise, use CPUID to auto-detect feature set. 310 AutoDetectSubtargetFeatures(); 311 // Make sure SSE2 is enabled; it is available on all X86-64 CPUs. 312 if (Is64Bit && X86SSELevel < SSE2) 313 X86SSELevel = SSE2; 314 } 315 316 // If requesting codegen for X86-64, make sure that 64-bit features 317 // are enabled. 318 if (Is64Bit) { 319 HasX86_64 = true; 320 321 // All 64-bit cpus have cmov support. 322 HasCMov = true; 323 } 324 325 326 DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel 327 << ", 3DNowLevel " << X863DNowLevel 328 << ", 64bit " << HasX86_64 << "\n"); 329 assert((!Is64Bit || HasX86_64) && 330 "64-bit code requested on a subtarget that doesn't support it!"); 331 332 // Set the boolean corresponding to the current target triple, or the default 333 // if one cannot be determined, to true. 334 if (TT.length() > 5) { 335 size_t Pos; 336 if ((Pos = TT.find("-darwin")) != std::string::npos) { 337 TargetType = isDarwin; 338 339 // Compute the darwin version number. 340 if (isdigit(TT[Pos+7])) 341 DarwinVers = atoi(&TT[Pos+7]); 342 else 343 DarwinVers = 8; // Minimum supported darwin is Tiger. 344 } else if (TT.find("linux") != std::string::npos) { 345 // Linux doesn't imply ELF, but we don't currently support anything else. 346 TargetType = isELF; 347 } else if (TT.find("cygwin") != std::string::npos) { 348 TargetType = isCygwin; 349 } else if (TT.find("mingw") != std::string::npos) { 350 TargetType = isMingw; 351 } else if (TT.find("win32") != std::string::npos) { 352 TargetType = isWindows; 353 } else if (TT.find("windows") != std::string::npos) { 354 TargetType = isWindows; 355 } else if (TT.find("-cl") != std::string::npos) { 356 TargetType = isDarwin; 357 DarwinVers = 9; 358 } 359 } 360 361 // Stack alignment is 16 bytes on Darwin (both 32 and 64 bit) and for all 64 362 // bit targets. 363 if (TargetType == isDarwin || Is64Bit) 364 stackAlignment = 16; 365 366 if (StackAlignment) 367 stackAlignment = StackAlignment; 368} 369 370bool X86Subtarget::enablePostRAScheduler( 371 CodeGenOpt::Level OptLevel, 372 TargetSubtarget::AntiDepBreakMode& Mode, 373 RegClassVector& CriticalPathRCs) const { 374 Mode = TargetSubtarget::ANTIDEP_CRITICAL; 375 CriticalPathRCs.clear(); 376 return OptLevel >= CodeGenOpt::Aggressive; 377} 378