X86ATTInstPrinter.cpp revision 226633
1218885Sdim//===-- X86ATTInstPrinter.cpp - AT&T assembly instruction printing --------===// 2218885Sdim// 3218885Sdim// The LLVM Compiler Infrastructure 4218885Sdim// 5218885Sdim// This file is distributed under the University of Illinois Open Source 6218885Sdim// License. See LICENSE.TXT for details. 7218885Sdim// 8218885Sdim//===----------------------------------------------------------------------===// 9218885Sdim// 10218885Sdim// This file includes code for rendering MCInst instances as AT&T-style 11218885Sdim// assembly. 12218885Sdim// 13218885Sdim//===----------------------------------------------------------------------===// 14218885Sdim 15218885Sdim#define DEBUG_TYPE "asm-printer" 16218885Sdim#include "X86ATTInstPrinter.h" 17218885Sdim#include "X86InstComments.h" 18224145Sdim#include "MCTargetDesc/X86MCTargetDesc.h" 19218885Sdim#include "llvm/MC/MCInst.h" 20218885Sdim#include "llvm/MC/MCAsmInfo.h" 21218885Sdim#include "llvm/MC/MCExpr.h" 22218885Sdim#include "llvm/Support/ErrorHandling.h" 23218885Sdim#include "llvm/Support/Format.h" 24218885Sdim#include "llvm/Support/FormattedStream.h" 25221345Sdim#include <map> 26218885Sdimusing namespace llvm; 27218885Sdim 28218885Sdim// Include the auto-generated portion of the assembly writer. 29218885Sdim#define GET_INSTRUCTION_NAME 30221345Sdim#define PRINT_ALIAS_INSTR 31218885Sdim#include "X86GenAsmWriter.inc" 32218885Sdim 33224145SdimX86ATTInstPrinter::X86ATTInstPrinter(const MCAsmInfo &MAI) 34221345Sdim : MCInstPrinter(MAI) { 35221345Sdim} 36221345Sdim 37223017Sdimvoid X86ATTInstPrinter::printRegName(raw_ostream &OS, 38223017Sdim unsigned RegNo) const { 39223017Sdim OS << '%' << getRegisterName(RegNo); 40223017Sdim} 41223017Sdim 42226633Sdimvoid X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, 43226633Sdim StringRef Annot) { 44221345Sdim // Try to print any aliases first. 45221345Sdim if (!printAliasInstr(MI, OS)) 46221345Sdim printInstruction(MI, OS); 47218885Sdim 48218885Sdim // If verbose assembly is enabled, we can print some informative comments. 49226633Sdim if (CommentStream) { 50226633Sdim printAnnotation(OS, Annot); 51218885Sdim EmitAnyX86InstComments(MI, *CommentStream, getRegisterName); 52226633Sdim } 53218885Sdim} 54221345Sdim 55218885SdimStringRef X86ATTInstPrinter::getOpcodeName(unsigned Opcode) const { 56218885Sdim return getInstructionName(Opcode); 57218885Sdim} 58218885Sdim 59218885Sdimvoid X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op, 60218885Sdim raw_ostream &O) { 61218885Sdim switch (MI->getOperand(Op).getImm()) { 62218885Sdim default: assert(0 && "Invalid ssecc argument!"); 63218885Sdim case 0: O << "eq"; break; 64218885Sdim case 1: O << "lt"; break; 65218885Sdim case 2: O << "le"; break; 66218885Sdim case 3: O << "unord"; break; 67218885Sdim case 4: O << "neq"; break; 68218885Sdim case 5: O << "nlt"; break; 69218885Sdim case 6: O << "nle"; break; 70218885Sdim case 7: O << "ord"; break; 71218885Sdim } 72218885Sdim} 73218885Sdim 74218885Sdim/// print_pcrel_imm - This is used to print an immediate value that ends up 75218885Sdim/// being encoded as a pc-relative value (e.g. for jumps and calls). These 76218885Sdim/// print slightly differently than normal immediates. For example, a $ is not 77218885Sdim/// emitted. 78218885Sdimvoid X86ATTInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo, 79218885Sdim raw_ostream &O) { 80218885Sdim const MCOperand &Op = MI->getOperand(OpNo); 81218885Sdim if (Op.isImm()) 82218885Sdim // Print this as a signed 32-bit value. 83218885Sdim O << (int)Op.getImm(); 84218885Sdim else { 85218885Sdim assert(Op.isExpr() && "unknown pcrel immediate operand"); 86218885Sdim O << *Op.getExpr(); 87218885Sdim } 88218885Sdim} 89218885Sdim 90218885Sdimvoid X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, 91218885Sdim raw_ostream &O) { 92218885Sdim const MCOperand &Op = MI->getOperand(OpNo); 93218885Sdim if (Op.isReg()) { 94218885Sdim O << '%' << getRegisterName(Op.getReg()); 95218885Sdim } else if (Op.isImm()) { 96226633Sdim // Print X86 immediates as signed values. 97226633Sdim O << '$' << (int64_t)Op.getImm(); 98218885Sdim 99218885Sdim if (CommentStream && (Op.getImm() > 255 || Op.getImm() < -256)) 100218885Sdim *CommentStream << format("imm = 0x%llX\n", (long long)Op.getImm()); 101218885Sdim 102218885Sdim } else { 103218885Sdim assert(Op.isExpr() && "unknown operand kind in printOperand"); 104218885Sdim O << '$' << *Op.getExpr(); 105218885Sdim } 106218885Sdim} 107218885Sdim 108218885Sdimvoid X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op, 109218885Sdim raw_ostream &O) { 110218885Sdim const MCOperand &BaseReg = MI->getOperand(Op); 111218885Sdim const MCOperand &IndexReg = MI->getOperand(Op+2); 112218885Sdim const MCOperand &DispSpec = MI->getOperand(Op+3); 113218885Sdim const MCOperand &SegReg = MI->getOperand(Op+4); 114218885Sdim 115218885Sdim // If this has a segment register, print it. 116218885Sdim if (SegReg.getReg()) { 117218885Sdim printOperand(MI, Op+4, O); 118218885Sdim O << ':'; 119218885Sdim } 120218885Sdim 121218885Sdim if (DispSpec.isImm()) { 122218885Sdim int64_t DispVal = DispSpec.getImm(); 123218885Sdim if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) 124218885Sdim O << DispVal; 125218885Sdim } else { 126218885Sdim assert(DispSpec.isExpr() && "non-immediate displacement for LEA?"); 127218885Sdim O << *DispSpec.getExpr(); 128218885Sdim } 129218885Sdim 130218885Sdim if (IndexReg.getReg() || BaseReg.getReg()) { 131218885Sdim O << '('; 132218885Sdim if (BaseReg.getReg()) 133218885Sdim printOperand(MI, Op, O); 134218885Sdim 135218885Sdim if (IndexReg.getReg()) { 136218885Sdim O << ','; 137218885Sdim printOperand(MI, Op+2, O); 138218885Sdim unsigned ScaleVal = MI->getOperand(Op+1).getImm(); 139218885Sdim if (ScaleVal != 1) 140218885Sdim O << ',' << ScaleVal; 141218885Sdim } 142218885Sdim O << ')'; 143218885Sdim } 144218885Sdim} 145