SIRegisterInfo.h revision 249259
1249259Sdim//===-- SIRegisterInfo.h - SI Register Info Interface ----------*- C++ -*--===// 2249259Sdim// 3249259Sdim// The LLVM Compiler Infrastructure 4249259Sdim// 5249259Sdim// This file is distributed under the University of Illinois Open Source 6249259Sdim// License. See LICENSE.TXT for details. 7249259Sdim// 8249259Sdim//===----------------------------------------------------------------------===// 9249259Sdim// 10249259Sdim/// \file 11249259Sdim/// \brief Interface definition for SIRegisterInfo 12249259Sdim// 13249259Sdim//===----------------------------------------------------------------------===// 14249259Sdim 15249259Sdim 16249259Sdim#ifndef SIREGISTERINFO_H_ 17249259Sdim#define SIREGISTERINFO_H_ 18249259Sdim 19249259Sdim#include "AMDGPURegisterInfo.h" 20249259Sdim 21249259Sdimnamespace llvm { 22249259Sdim 23249259Sdimclass AMDGPUTargetMachine; 24249259Sdimclass TargetInstrInfo; 25249259Sdim 26249259Sdimstruct SIRegisterInfo : public AMDGPURegisterInfo { 27249259Sdim AMDGPUTargetMachine &TM; 28249259Sdim const TargetInstrInfo &TII; 29249259Sdim 30249259Sdim SIRegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii); 31249259Sdim 32249259Sdim virtual BitVector getReservedRegs(const MachineFunction &MF) const; 33249259Sdim 34249259Sdim virtual unsigned getRegPressureLimit(const TargetRegisterClass *RC, 35249259Sdim MachineFunction &MF) const; 36249259Sdim 37249259Sdim /// \param RC is an AMDIL reg class. 38249259Sdim /// 39249259Sdim /// \returns the SI register class that is equivalent to \p RC. 40249259Sdim virtual const TargetRegisterClass * 41249259Sdim getISARegClass(const TargetRegisterClass *RC) const; 42249259Sdim 43249259Sdim /// \brief get the register class of the specified type to use in the 44249259Sdim /// CFGStructurizer 45249259Sdim virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const; 46249259Sdim}; 47249259Sdim 48249259Sdim} // End namespace llvm 49249259Sdim 50249259Sdim#endif // SIREGISTERINFO_H_ 51