PPCTargetMachine.h revision 234353
1234353Sdim//===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===// 2193323Sed// 3353358Sdim// The LLVM Compiler Infrastructure 4353358Sdim// 5353358Sdim// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// This file declares the PowerPC specific subclass of TargetMachine. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14280031Sdim#ifndef PPC_TARGETMACHINE_H 15280031Sdim#define PPC_TARGETMACHINE_H 16280031Sdim 17193323Sed#include "PPCFrameLowering.h" 18193323Sed#include "PPCSubtarget.h" 19193323Sed#include "PPCJITInfo.h" 20193323Sed#include "PPCInstrInfo.h" 21193323Sed#include "PPCISelLowering.h" 22193323Sed#include "PPCSelectionDAGInfo.h" 23193323Sed#include "llvm/Target/TargetMachine.h" 24193323Sed#include "llvm/Target/TargetData.h" 25193323Sed 26193323Sednamespace llvm { 27193323Sed 28193323Sed/// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets. 29193323Sed/// 30193323Sedclass PPCTargetMachine : public LLVMTargetMachine { 31193323Sed PPCSubtarget Subtarget; 32193323Sed const TargetData DataLayout; // Calculates type size & alignment 33193323Sed PPCInstrInfo InstrInfo; 34193323Sed PPCFrameLowering FrameLowering; 35193323Sed PPCJITInfo JITInfo; 36193323Sed PPCTargetLowering TLInfo; 37193323Sed PPCSelectionDAGInfo TSInfo; 38193323Sed InstrItineraryData InstrItins; 39193323Sed 40193323Sedpublic: 41193323Sed PPCTargetMachine(const Target &T, StringRef TT, 42193323Sed StringRef CPU, StringRef FS, const TargetOptions &Options, 43193323Sed Reloc::Model RM, CodeModel::Model CM, 44193323Sed CodeGenOpt::Level OL, bool is64Bit); 45193323Sed 46193323Sed virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; } 47193323Sed virtual const PPCFrameLowering *getFrameLowering() const { 48193323Sed return &FrameLowering; 49193323Sed } 50193323Sed virtual PPCJITInfo *getJITInfo() { return &JITInfo; } 51193323Sed virtual const PPCTargetLowering *getTargetLowering() const { 52193323Sed return &TLInfo; 53193323Sed } 54193323Sed virtual const PPCSelectionDAGInfo* getSelectionDAGInfo() const { 55193323Sed return &TSInfo; 56193323Sed } 57193323Sed virtual const PPCRegisterInfo *getRegisterInfo() const { 58193323Sed return &InstrInfo.getRegisterInfo(); 59193323Sed } 60193323Sed 61193323Sed virtual const TargetData *getTargetData() const { return &DataLayout; } 62193323Sed virtual const PPCSubtarget *getSubtargetImpl() const { return &Subtarget; } 63193323Sed virtual const InstrItineraryData *getInstrItineraryData() const { 64193323Sed return &InstrItins; 65193323Sed } 66193323Sed 67193323Sed // Pass Pipeline Configuration 68193323Sed virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); 69193323Sed virtual bool addCodeEmitter(PassManagerBase &PM, 70193323Sed JITCodeEmitter &JCE); 71193323Sed}; 72193323Sed 73193323Sed/// PPC32TargetMachine - PowerPC 32-bit target machine. 74193323Sed/// 75193323Sedclass PPC32TargetMachine : public PPCTargetMachine { 76193323Sed virtual void anchor(); 77193323Sedpublic: 78193323Sed PPC32TargetMachine(const Target &T, StringRef TT, 79193323Sed StringRef CPU, StringRef FS, const TargetOptions &Options, 80193323Sed Reloc::Model RM, CodeModel::Model CM, 81193323Sed CodeGenOpt::Level OL); 82193323Sed}; 83193323Sed 84193323Sed/// PPC64TargetMachine - PowerPC 64-bit target machine. 85193323Sed/// 86193323Sedclass PPC64TargetMachine : public PPCTargetMachine { 87193323Sed virtual void anchor(); 88193323Sedpublic: 89193323Sed PPC64TargetMachine(const Target &T, StringRef TT, 90193323Sed StringRef CPU, StringRef FS, const TargetOptions &Options, 91193323Sed Reloc::Model RM, CodeModel::Model CM, 92193323Sed CodeGenOpt::Level OL); 93193323Sed}; 94193323Sed 95193323Sed} // end namespace llvm 96193323Sed 97193323Sed#endif 98193323Sed