NVPTXTargetMachine.h revision 243830
1//===-- NVPTXTargetMachine.h - Define TargetMachine for NVPTX ---*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the NVPTX specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14
15#ifndef NVPTX_TARGETMACHINE_H
16#define NVPTX_TARGETMACHINE_H
17
18#include "NVPTXInstrInfo.h"
19#include "NVPTXISelLowering.h"
20#include "NVPTXRegisterInfo.h"
21#include "NVPTXSubtarget.h"
22#include "NVPTXFrameLowering.h"
23#include "ManagedStringPool.h"
24#include "llvm/DataLayout.h"
25#include "llvm/Target/TargetFrameLowering.h"
26#include "llvm/Target/TargetMachine.h"
27#include "llvm/Target/TargetSelectionDAGInfo.h"
28#include "llvm/Target/TargetTransformImpl.h"
29
30namespace llvm {
31
32/// NVPTXTargetMachine
33///
34class NVPTXTargetMachine : public LLVMTargetMachine {
35  NVPTXSubtarget        Subtarget;
36  const DataLayout      DL;       // Calculates type size & alignment
37  NVPTXInstrInfo        InstrInfo;
38  NVPTXTargetLowering   TLInfo;
39  TargetSelectionDAGInfo   TSInfo;
40
41  // NVPTX does not have any call stack frame, but need a NVPTX specific
42  // FrameLowering class because TargetFrameLowering is abstract.
43  NVPTXFrameLowering       FrameLowering;
44
45  // Hold Strings that can be free'd all together with NVPTXTargetMachine
46  ManagedStringPool     ManagedStrPool;
47
48  ScalarTargetTransformImpl STTI;
49  VectorTargetTransformImpl VTTI;
50
51  //bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level,
52  //                            bool DisableVerify, MCContext *&OutCtx);
53
54public:
55  NVPTXTargetMachine(const Target &T, StringRef TT, StringRef CPU,
56                     StringRef FS, const TargetOptions &Options,
57                     Reloc::Model RM, CodeModel::Model CM,
58                     CodeGenOpt::Level OP,
59                     bool is64bit);
60
61  virtual const TargetFrameLowering *getFrameLowering() const {
62    return &FrameLowering;
63  }
64  virtual const NVPTXInstrInfo *getInstrInfo() const  { return &InstrInfo; }
65  virtual const DataLayout *getDataLayout() const     { return &DL;}
66  virtual const NVPTXSubtarget *getSubtargetImpl() const { return &Subtarget;}
67
68  virtual const NVPTXRegisterInfo *getRegisterInfo() const {
69    return &(InstrInfo.getRegisterInfo());
70  }
71
72  virtual NVPTXTargetLowering *getTargetLowering() const {
73    return const_cast<NVPTXTargetLowering*>(&TLInfo);
74  }
75
76  virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const {
77    return &TSInfo;
78  }
79  virtual const ScalarTargetTransformInfo *getScalarTargetTransformInfo()const {
80    return &STTI;
81  }
82  virtual const VectorTargetTransformInfo *getVectorTargetTransformInfo()const {
83    return &VTTI;
84  }
85
86  //virtual bool addInstSelector(PassManagerBase &PM,
87  //                             CodeGenOpt::Level OptLevel);
88
89  //virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level);
90
91  ManagedStringPool *getManagedStrPool() const {
92    return const_cast<ManagedStringPool*>(&ManagedStrPool);
93  }
94
95  virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
96
97  // Emission of machine code through JITCodeEmitter is not supported.
98  virtual bool addPassesToEmitMachineCode(PassManagerBase &,
99                                          JITCodeEmitter &,
100                                          bool = true) {
101    return true;
102  }
103
104  // Emission of machine code through MCJIT is not supported.
105  virtual bool addPassesToEmitMC(PassManagerBase &,
106                                 MCContext *&,
107                                 raw_ostream &,
108                                 bool = true) {
109    return true;
110  }
111
112}; // NVPTXTargetMachine.
113
114class NVPTXTargetMachine32 : public NVPTXTargetMachine {
115  virtual void anchor();
116public:
117  NVPTXTargetMachine32(const Target &T, StringRef TT, StringRef CPU,
118                       StringRef FS, const TargetOptions &Options,
119                       Reloc::Model RM, CodeModel::Model CM,
120                       CodeGenOpt::Level OL);
121};
122
123class NVPTXTargetMachine64 : public NVPTXTargetMachine {
124  virtual void anchor();
125public:
126  NVPTXTargetMachine64(const Target &T, StringRef TT, StringRef CPU,
127                       StringRef FS, const TargetOptions &Options,
128                       Reloc::Model RM, CodeModel::Model CM,
129                       CodeGenOpt::Level OL);
130};
131
132
133} // end namespace llvm
134
135#endif
136