1234353Sdim//===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===// 2193323Sed// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// This file declares the Mips specific subclass of TargetMachine. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14193323Sed#ifndef MIPSTARGETMACHINE_H 15193323Sed#define MIPSTARGETMACHINE_H 16193323Sed 17234353Sdim#include "MipsFrameLowering.h" 18249423Sdim#include "MipsISelLowering.h" 19193323Sed#include "MipsInstrInfo.h" 20234353Sdim#include "MipsJITInfo.h" 21208599Srdivacky#include "MipsSelectionDAGInfo.h" 22234353Sdim#include "MipsSubtarget.h" 23249423Sdim#include "llvm/ADT/OwningPtr.h" 24251662Sdim#include "llvm/CodeGen/Passes.h" 25251662Sdim#include "llvm/CodeGen/SelectionDAGISel.h" 26249423Sdim#include "llvm/IR/DataLayout.h" 27249423Sdim#include "llvm/Target/TargetFrameLowering.h" 28193323Sed#include "llvm/Target/TargetMachine.h" 29193323Sed 30193323Sednamespace llvm { 31239462Sdimclass formatted_raw_ostream; 32239462Sdimclass MipsRegisterInfo; 33218893Sdim 34239462Sdimclass MipsTargetMachine : public LLVMTargetMachine { 35239462Sdim MipsSubtarget Subtarget; 36243830Sdim const DataLayout DL; // Calculates type size & alignment 37249423Sdim OwningPtr<const MipsInstrInfo> InstrInfo; 38249423Sdim OwningPtr<const MipsFrameLowering> FrameLowering; 39249423Sdim OwningPtr<const MipsTargetLowering> TLInfo; 40251662Sdim OwningPtr<const MipsInstrInfo> InstrInfo16; 41251662Sdim OwningPtr<const MipsFrameLowering> FrameLowering16; 42251662Sdim OwningPtr<const MipsTargetLowering> TLInfo16; 43251662Sdim OwningPtr<const MipsInstrInfo> InstrInfoSE; 44251662Sdim OwningPtr<const MipsFrameLowering> FrameLoweringSE; 45251662Sdim OwningPtr<const MipsTargetLowering> TLInfoSE; 46239462Sdim MipsSelectionDAGInfo TSInfo; 47263508Sdim const InstrItineraryData &InstrItins; 48239462Sdim MipsJITInfo JITInfo; 49226633Sdim 50239462Sdimpublic: 51239462Sdim MipsTargetMachine(const Target &T, StringRef TT, 52239462Sdim StringRef CPU, StringRef FS, const TargetOptions &Options, 53239462Sdim Reloc::Model RM, CodeModel::Model CM, 54239462Sdim CodeGenOpt::Level OL, 55239462Sdim bool isLittle); 56218893Sdim 57249423Sdim virtual ~MipsTargetMachine() {} 58193323Sed 59251662Sdim virtual void addAnalysisPasses(PassManagerBase &PM); 60251662Sdim 61239462Sdim virtual const MipsInstrInfo *getInstrInfo() const 62249423Sdim { return InstrInfo.get(); } 63239462Sdim virtual const TargetFrameLowering *getFrameLowering() const 64249423Sdim { return FrameLowering.get(); } 65239462Sdim virtual const MipsSubtarget *getSubtargetImpl() const 66239462Sdim { return &Subtarget; } 67243830Sdim virtual const DataLayout *getDataLayout() const 68243830Sdim { return &DL;} 69263508Sdim 70263508Sdim virtual const InstrItineraryData *getInstrItineraryData() const { 71263508Sdim return Subtarget.inMips16Mode() ? 0 : &InstrItins; 72263508Sdim } 73263508Sdim 74239462Sdim virtual MipsJITInfo *getJITInfo() 75239462Sdim { return &JITInfo; } 76226633Sdim 77239462Sdim virtual const MipsRegisterInfo *getRegisterInfo() const { 78239462Sdim return &InstrInfo->getRegisterInfo(); 79239462Sdim } 80193323Sed 81239462Sdim virtual const MipsTargetLowering *getTargetLowering() const { 82249423Sdim return TLInfo.get(); 83239462Sdim } 84193323Sed 85239462Sdim virtual const MipsSelectionDAGInfo* getSelectionDAGInfo() const { 86239462Sdim return &TSInfo; 87239462Sdim } 88208599Srdivacky 89239462Sdim // Pass Pipeline Configuration 90239462Sdim virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); 91239462Sdim virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE); 92251662Sdim 93251662Sdim // Set helper classes 94251662Sdim void setHelperClassesMips16(); 95251662Sdim 96251662Sdim void setHelperClassesMipsSE(); 97251662Sdim 98251662Sdim 99239462Sdim}; 100226633Sdim 101239462Sdim/// MipsebTargetMachine - Mips32/64 big endian target machine. 102193323Sed/// 103226633Sdimclass MipsebTargetMachine : public MipsTargetMachine { 104234353Sdim virtual void anchor(); 105226633Sdimpublic: 106226633Sdim MipsebTargetMachine(const Target &T, StringRef TT, 107234353Sdim StringRef CPU, StringRef FS, const TargetOptions &Options, 108234353Sdim Reloc::Model RM, CodeModel::Model CM, 109234353Sdim CodeGenOpt::Level OL); 110226633Sdim}; 111226633Sdim 112239462Sdim/// MipselTargetMachine - Mips32/64 little endian target machine. 113226633Sdim/// 114193323Sedclass MipselTargetMachine : public MipsTargetMachine { 115234353Sdim virtual void anchor(); 116193323Sedpublic: 117226633Sdim MipselTargetMachine(const Target &T, StringRef TT, 118234353Sdim StringRef CPU, StringRef FS, const TargetOptions &Options, 119234353Sdim Reloc::Model RM, CodeModel::Model CM, 120234353Sdim CodeGenOpt::Level OL); 121193323Sed}; 122193323Sed 123193323Sed} // End llvm namespace 124193323Sed 125193323Sed#endif 126