MipsSEISelLowering.h revision 256281
138889Sjdp//===-- MipsSEISelLowering.h - MipsSE DAG Lowering Interface ----*- C++ -*-===//
2218822Sdim//
338889Sjdp//                     The LLVM Compiler Infrastructure
438889Sjdp//
538889Sjdp// This file is distributed under the University of Illinois Open Source
638889Sjdp// License. See LICENSE.TXT for details.
738889Sjdp//
838889Sjdp//===----------------------------------------------------------------------===//
938889Sjdp//
1038889Sjdp// Subclass of MipsTargetLowering specialized for mips32/64.
1138889Sjdp//
1238889Sjdp//===----------------------------------------------------------------------===//
1338889Sjdp
1438889Sjdp#ifndef MipsSEISELLOWERING_H
1538889Sjdp#define MipsSEISELLOWERING_H
1638889Sjdp
1738889Sjdp#include "MipsISelLowering.h"
18218822Sdim#include "MipsRegisterInfo.h"
19218822Sdim
2038889Sjdpnamespace llvm {
2138889Sjdp  class MipsSETargetLowering : public MipsTargetLowering  {
2238889Sjdp  public:
2338889Sjdp    explicit MipsSETargetLowering(MipsTargetMachine &TM);
2489857Sobrien
2538889Sjdp    virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const;
2689857Sobrien
2789857Sobrien    virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
2889857Sobrien
2989857Sobrien    virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
3089857Sobrien
3138889Sjdp    virtual MachineBasicBlock *
3238889Sjdp    EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const;
3389857Sobrien
3438889Sjdp    virtual bool isShuffleMaskLegal(const SmallVectorImpl<int> &Mask,
3538889Sjdp                                    EVT VT) const {
3638889Sjdp      return false;
3738889Sjdp    }
38130561Sobrien
39130561Sobrien    virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const {
4038889Sjdp      if (VT == MVT::Untyped)
4138889Sjdp        return Subtarget->hasDSP() ? &Mips::ACRegsDSPRegClass :
4238889Sjdp                                     &Mips::ACRegsRegClass;
4338889Sjdp
4438889Sjdp      return TargetLowering::getRepRegClassFor(VT);
4538889Sjdp    }
4638889Sjdp
4738889Sjdp  private:
48130561Sobrien    virtual bool
4938889Sjdp    isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo,
5038889Sjdp                                      unsigned NextStackOffset,
5138889Sjdp                                      const MipsFunctionInfo& FI) const;
5238889Sjdp
5338889Sjdp    virtual void
5438889Sjdp    getOpndList(SmallVectorImpl<SDValue> &Ops,
5538889Sjdp                std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
56130561Sobrien                bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
5738889Sjdp                CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const;
5838889Sjdp
5938889Sjdp    SDValue lowerMulDiv(SDValue Op, unsigned NewOpc, bool HasLo, bool HasHi,
6038889Sjdp                        SelectionDAG &DAG) const;
6138889Sjdp
6238889Sjdp    SDValue lowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
6338889Sjdp    SDValue lowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const;
6438889Sjdp
6577298Sobrien    MachineBasicBlock *emitBPOSGE32(MachineInstr *MI,
6638889Sjdp                                    MachineBasicBlock *BB) const;
6738889Sjdp  };
6838889Sjdp}
6938889Sjdp
7038889Sjdp#endif // MipsSEISELLOWERING_H
7138889Sjdp