ARMSubtarget.h revision 194612
121308Sache//=====---- ARMSubtarget.h - Define Subtarget for the ARM -----*- C++ -*--====//
221308Sache//
321308Sache//                     The LLVM Compiler Infrastructure
421308Sache//
521308Sache// This file is distributed under the University of Illinois Open Source
621308Sache// License. See LICENSE.TXT for details.
721308Sache//
821308Sache//===----------------------------------------------------------------------===//
921308Sache//
1021308Sache// This file declares the ARM specific subclass of TargetSubtarget.
1158310Sache//
1221308Sache//===----------------------------------------------------------------------===//
1321308Sache
1421308Sache#ifndef ARMSUBTARGET_H
1521308Sache#define ARMSUBTARGET_H
1621308Sache
1721308Sache#include "llvm/Target/TargetInstrItineraries.h"
1821308Sache#include "llvm/Target/TargetSubtarget.h"
1921308Sache#include <string>
2021308Sache
2121308Sachenamespace llvm {
2258310Sacheclass Module;
2321308Sache
2421308Sacheclass ARMSubtarget : public TargetSubtarget {
2521308Sacheprotected:
2621308Sache  enum ARMArchEnum {
2721308Sache    V4T, V5T, V5TE, V6, V6T2, V7A
2821308Sache  };
2921308Sache
3021308Sache  enum ARMFPEnum {
3121308Sache    None, VFPv2, VFPv3, NEON
3221308Sache  };
3321308Sache
3421308Sache  enum ThumbTypeEnum {
3521308Sache    Thumb1,
3626497Sache    Thumb2
3726497Sache  };
3826497Sache
3926497Sache  /// ARMArchVersion - ARM architecture version: V4T (base), V5T, V5TE,
4026497Sache  /// V6, V6T2, V7A.
4126497Sache  ARMArchEnum ARMArchVersion;
4221308Sache
43119610Sache  /// ARMFPUType - Floating Point Unit type.
44119610Sache  ARMFPEnum ARMFPUType;
4521308Sache
4621308Sache  /// IsThumb - True if we are in thumb mode, false if in ARM mode.
4721308Sache  bool IsThumb;
4858310Sache
4958310Sache  /// ThumbMode - Indicates supported Thumb version.
5058310Sache  ThumbTypeEnum ThumbMode;
5126497Sache
5226497Sache  /// IsR9Reserved - True if R9 is a not available as general purpose register.
5326497Sache  bool IsR9Reserved;
5426497Sache
5521308Sache  /// stackAlignment - The minimum alignment known to hold of the stack frame on
5675406Sache  /// entry to the function and which must be maintained by every function.
5721308Sache  unsigned stackAlignment;
5821308Sache
59119610Sache  /// CPUString - String name of used CPU.
6021308Sache  std::string CPUString;
6121308Sache
6221308Sache  /// Selected instruction itineraries (one entry per itinerary class.)
6358310Sache  InstrItineraryData InstrItins;
6421308Sache
6521308Sache public:
6658310Sache  enum {
6758310Sache    isELF, isDarwin
6858310Sache  } TargetType;
6958310Sache
7058310Sache  enum {
71119610Sache    ARM_ABI_APCS,
72119610Sache    ARM_ABI_AAPCS // ARM EABI
73119610Sache  } TargetABI;
74119610Sache
75119610Sache  /// This constructor initializes the data members to match that
76119610Sache  /// of the specified module.
77119610Sache  ///
7858310Sache  ARMSubtarget(const Module &M, const std::string &FS, bool isThumb);
7958310Sache
8058310Sache  /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
8158310Sache  /// that still makes it profitable to inline the call.
8258310Sache  unsigned getMaxInlineSizeThreshold() const {
8358310Sache    // FIXME: For now, we don't lower memcpy's to loads / stores for Thumb.
8458310Sache    // Change this once Thumb ldmia / stmia support is added.
85119610Sache    return isThumb() ? 0 : 64;
8658310Sache  }
8758310Sache  /// ParseSubtargetFeatures - Parses features string setting specified
8875406Sache  /// subtarget options.  Definition of function is auto generated by tblgen.
8975406Sache  std::string ParseSubtargetFeatures(const std::string &FS,
9075406Sache                                     const std::string &CPU);
9158310Sache
9258310Sache  bool hasV4TOps()  const { return ARMArchVersion >= V4T;  }
9321308Sache  bool hasV5TOps()  const { return ARMArchVersion >= V5T;  }
9421308Sache  bool hasV5TEOps() const { return ARMArchVersion >= V5TE; }
9521308Sache  bool hasV6Ops()   const { return ARMArchVersion >= V6;   }
9621308Sache  bool hasV6T2Ops() const { return ARMArchVersion >= V6T2; }
9721308Sache  bool hasV7Ops()   const { return ARMArchVersion >= V7A;  }
9821308Sache
9921308Sache  bool hasVFP2() const { return ARMFPUType >= VFPv2; }
10021308Sache  bool hasVFP3() const { return ARMFPUType >= VFPv3; }
10121308Sache  bool hasNEON() const { return ARMFPUType >= NEON;  }
10221308Sache
10321308Sache  bool isTargetDarwin() const { return TargetType == isDarwin; }
10421308Sache  bool isTargetELF() const { return TargetType == isELF; }
10575406Sache
10675406Sache  bool isAPCS_ABI() const { return TargetABI == ARM_ABI_APCS; }
10775406Sache  bool isAAPCS_ABI() const { return TargetABI == ARM_ABI_AAPCS; }
10821308Sache
10975406Sache  bool isThumb() const { return IsThumb; }
11075406Sache  bool isThumb1Only() const { return IsThumb && (ThumbMode == Thumb1); }
11121308Sache  bool hasThumb2() const { return IsThumb && (ThumbMode >= Thumb2); }
11275406Sache
11321308Sache  bool isR9Reserved() const { return IsR9Reserved; }
11421308Sache
11521308Sache  const std::string & getCPUString() const { return CPUString; }
11621308Sache
11775406Sache  /// getInstrItins - Return the instruction itineraies based on subtarget
11821308Sache  /// selection.
11921308Sache  const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
12021308Sache
12121308Sache  /// getStackAlignment - Returns the minimum alignment known to hold of the
12221308Sache  /// stack frame on entry to the function and which must be maintained by every
12321308Sache  /// function for this subtarget.
12421308Sache  unsigned getStackAlignment() const { return stackAlignment; }
12521308Sache};
12621308Sache} // End llvm namespace
12721308Sache
12821308Sache#endif  // ARMSUBTARGET_H
12921308Sache