PHIElimination.cpp revision 218893
1//===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass eliminates machine instruction PHI nodes by inserting copy 11// instructions. This destroys SSA information, but is the desired input for 12// some register allocators. 13// 14//===----------------------------------------------------------------------===// 15 16#define DEBUG_TYPE "phielim" 17#include "PHIEliminationUtils.h" 18#include "llvm/CodeGen/LiveVariables.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/CodeGen/MachineDominators.h" 21#include "llvm/CodeGen/MachineInstr.h" 22#include "llvm/CodeGen/MachineInstrBuilder.h" 23#include "llvm/CodeGen/MachineLoopInfo.h" 24#include "llvm/CodeGen/MachineRegisterInfo.h" 25#include "llvm/Target/TargetInstrInfo.h" 26#include "llvm/Function.h" 27#include "llvm/Target/TargetMachine.h" 28#include "llvm/ADT/SmallPtrSet.h" 29#include "llvm/ADT/STLExtras.h" 30#include "llvm/ADT/Statistic.h" 31#include "llvm/Support/Compiler.h" 32#include "llvm/Support/Debug.h" 33#include <algorithm> 34#include <map> 35using namespace llvm; 36 37namespace { 38 class PHIElimination : public MachineFunctionPass { 39 MachineRegisterInfo *MRI; // Machine register information 40 41 public: 42 static char ID; // Pass identification, replacement for typeid 43 PHIElimination() : MachineFunctionPass(ID) { 44 initializePHIEliminationPass(*PassRegistry::getPassRegistry()); 45 } 46 47 virtual bool runOnMachineFunction(MachineFunction &Fn); 48 virtual void getAnalysisUsage(AnalysisUsage &AU) const; 49 50 private: 51 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions 52 /// in predecessor basic blocks. 53 /// 54 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB); 55 void LowerAtomicPHINode(MachineBasicBlock &MBB, 56 MachineBasicBlock::iterator AfterPHIsIt); 57 58 /// analyzePHINodes - Gather information about the PHI nodes in 59 /// here. In particular, we want to map the number of uses of a virtual 60 /// register which is used in a PHI node. We map that to the BB the 61 /// vreg is coming from. This is used later to determine when the vreg 62 /// is killed in the BB. 63 /// 64 void analyzePHINodes(const MachineFunction& Fn); 65 66 /// Split critical edges where necessary for good coalescer performance. 67 bool SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB, 68 LiveVariables &LV, MachineLoopInfo *MLI); 69 70 typedef std::pair<unsigned, unsigned> BBVRegPair; 71 typedef DenseMap<BBVRegPair, unsigned> VRegPHIUse; 72 73 VRegPHIUse VRegPHIUseCount; 74 75 // Defs of PHI sources which are implicit_def. 76 SmallPtrSet<MachineInstr*, 4> ImpDefs; 77 78 // Map reusable lowered PHI node -> incoming join register. 79 typedef DenseMap<MachineInstr*, unsigned, 80 MachineInstrExpressionTrait> LoweredPHIMap; 81 LoweredPHIMap LoweredPHIs; 82 }; 83} 84 85STATISTIC(NumAtomic, "Number of atomic phis lowered"); 86STATISTIC(NumCriticalEdgesSplit, "Number of critical edges split"); 87STATISTIC(NumReused, "Number of reused lowered phis"); 88 89char PHIElimination::ID = 0; 90INITIALIZE_PASS(PHIElimination, "phi-node-elimination", 91 "Eliminate PHI nodes for register allocation", false, false) 92 93char& llvm::PHIEliminationID = PHIElimination::ID; 94 95void PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const { 96 AU.addPreserved<LiveVariables>(); 97 AU.addPreserved<MachineDominatorTree>(); 98 AU.addPreserved<MachineLoopInfo>(); 99 MachineFunctionPass::getAnalysisUsage(AU); 100} 101 102bool PHIElimination::runOnMachineFunction(MachineFunction &MF) { 103 MRI = &MF.getRegInfo(); 104 105 bool Changed = false; 106 107 // Split critical edges to help the coalescer 108 if (LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>()) { 109 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>(); 110 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 111 Changed |= SplitPHIEdges(MF, *I, *LV, MLI); 112 } 113 114 // Populate VRegPHIUseCount 115 analyzePHINodes(MF); 116 117 // Eliminate PHI instructions by inserting copies into predecessor blocks. 118 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 119 Changed |= EliminatePHINodes(MF, *I); 120 121 // Remove dead IMPLICIT_DEF instructions. 122 for (SmallPtrSet<MachineInstr*, 4>::iterator I = ImpDefs.begin(), 123 E = ImpDefs.end(); I != E; ++I) { 124 MachineInstr *DefMI = *I; 125 unsigned DefReg = DefMI->getOperand(0).getReg(); 126 if (MRI->use_nodbg_empty(DefReg)) 127 DefMI->eraseFromParent(); 128 } 129 130 // Clean up the lowered PHI instructions. 131 for (LoweredPHIMap::iterator I = LoweredPHIs.begin(), E = LoweredPHIs.end(); 132 I != E; ++I) 133 MF.DeleteMachineInstr(I->first); 134 135 LoweredPHIs.clear(); 136 ImpDefs.clear(); 137 VRegPHIUseCount.clear(); 138 139 return Changed; 140} 141 142/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in 143/// predecessor basic blocks. 144/// 145bool PHIElimination::EliminatePHINodes(MachineFunction &MF, 146 MachineBasicBlock &MBB) { 147 if (MBB.empty() || !MBB.front().isPHI()) 148 return false; // Quick exit for basic blocks without PHIs. 149 150 // Get an iterator to the first instruction after the last PHI node (this may 151 // also be the end of the basic block). 152 MachineBasicBlock::iterator AfterPHIsIt = MBB.SkipPHIsAndLabels(MBB.begin()); 153 154 while (MBB.front().isPHI()) 155 LowerAtomicPHINode(MBB, AfterPHIsIt); 156 157 return true; 158} 159 160/// isSourceDefinedByImplicitDef - Return true if all sources of the phi node 161/// are implicit_def's. 162static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi, 163 const MachineRegisterInfo *MRI) { 164 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) { 165 unsigned SrcReg = MPhi->getOperand(i).getReg(); 166 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 167 if (!DefMI || !DefMI->isImplicitDef()) 168 return false; 169 } 170 return true; 171} 172 173 174 175/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block, 176/// under the assuption that it needs to be lowered in a way that supports 177/// atomic execution of PHIs. This lowering method is always correct all of the 178/// time. 179/// 180void PHIElimination::LowerAtomicPHINode( 181 MachineBasicBlock &MBB, 182 MachineBasicBlock::iterator AfterPHIsIt) { 183 ++NumAtomic; 184 // Unlink the PHI node from the basic block, but don't delete the PHI yet. 185 MachineInstr *MPhi = MBB.remove(MBB.begin()); 186 187 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2; 188 unsigned DestReg = MPhi->getOperand(0).getReg(); 189 assert(MPhi->getOperand(0).getSubReg() == 0 && "Can't handle sub-reg PHIs"); 190 bool isDead = MPhi->getOperand(0).isDead(); 191 192 // Create a new register for the incoming PHI arguments. 193 MachineFunction &MF = *MBB.getParent(); 194 unsigned IncomingReg = 0; 195 bool reusedIncoming = false; // Is IncomingReg reused from an earlier PHI? 196 197 // Insert a register to register copy at the top of the current block (but 198 // after any remaining phi nodes) which copies the new incoming register 199 // into the phi node destination. 200 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); 201 if (isSourceDefinedByImplicitDef(MPhi, MRI)) 202 // If all sources of a PHI node are implicit_def, just emit an 203 // implicit_def instead of a copy. 204 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), 205 TII->get(TargetOpcode::IMPLICIT_DEF), DestReg); 206 else { 207 // Can we reuse an earlier PHI node? This only happens for critical edges, 208 // typically those created by tail duplication. 209 unsigned &entry = LoweredPHIs[MPhi]; 210 if (entry) { 211 // An identical PHI node was already lowered. Reuse the incoming register. 212 IncomingReg = entry; 213 reusedIncoming = true; 214 ++NumReused; 215 DEBUG(dbgs() << "Reusing " << PrintReg(IncomingReg) << " for " << *MPhi); 216 } else { 217 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg); 218 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC); 219 } 220 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), 221 TII->get(TargetOpcode::COPY), DestReg) 222 .addReg(IncomingReg); 223 } 224 225 // Update live variable information if there is any. 226 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>(); 227 if (LV) { 228 MachineInstr *PHICopy = prior(AfterPHIsIt); 229 230 if (IncomingReg) { 231 LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg); 232 233 // Increment use count of the newly created virtual register. 234 VI.NumUses++; 235 LV->setPHIJoin(IncomingReg); 236 237 // When we are reusing the incoming register, it may already have been 238 // killed in this block. The old kill will also have been inserted at 239 // AfterPHIsIt, so it appears before the current PHICopy. 240 if (reusedIncoming) 241 if (MachineInstr *OldKill = VI.findKill(&MBB)) { 242 DEBUG(dbgs() << "Remove old kill from " << *OldKill); 243 LV->removeVirtualRegisterKilled(IncomingReg, OldKill); 244 DEBUG(MBB.dump()); 245 } 246 247 // Add information to LiveVariables to know that the incoming value is 248 // killed. Note that because the value is defined in several places (once 249 // each for each incoming block), the "def" block and instruction fields 250 // for the VarInfo is not filled in. 251 LV->addVirtualRegisterKilled(IncomingReg, PHICopy); 252 } 253 254 // Since we are going to be deleting the PHI node, if it is the last use of 255 // any registers, or if the value itself is dead, we need to move this 256 // information over to the new copy we just inserted. 257 LV->removeVirtualRegistersKilled(MPhi); 258 259 // If the result is dead, update LV. 260 if (isDead) { 261 LV->addVirtualRegisterDead(DestReg, PHICopy); 262 LV->removeVirtualRegisterDead(DestReg, MPhi); 263 } 264 } 265 266 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node. 267 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) 268 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i+1).getMBB()->getNumber(), 269 MPhi->getOperand(i).getReg())]; 270 271 // Now loop over all of the incoming arguments, changing them to copy into the 272 // IncomingReg register in the corresponding predecessor basic block. 273 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto; 274 for (int i = NumSrcs - 1; i >= 0; --i) { 275 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg(); 276 unsigned SrcSubReg = MPhi->getOperand(i*2+1).getSubReg(); 277 278 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) && 279 "Machine PHI Operands must all be virtual registers!"); 280 281 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source 282 // path the PHI. 283 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB(); 284 285 // If source is defined by an implicit def, there is no need to insert a 286 // copy. 287 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 288 if (DefMI->isImplicitDef()) { 289 ImpDefs.insert(DefMI); 290 continue; 291 } 292 293 // Check to make sure we haven't already emitted the copy for this block. 294 // This can happen because PHI nodes may have multiple entries for the same 295 // basic block. 296 if (!MBBsInsertedInto.insert(&opBlock)) 297 continue; // If the copy has already been emitted, we're done. 298 299 // Find a safe location to insert the copy, this may be the first terminator 300 // in the block (or end()). 301 MachineBasicBlock::iterator InsertPos = 302 findPHICopyInsertPoint(&opBlock, &MBB, SrcReg); 303 304 // Insert the copy. 305 if (!reusedIncoming && IncomingReg) 306 BuildMI(opBlock, InsertPos, MPhi->getDebugLoc(), 307 TII->get(TargetOpcode::COPY), IncomingReg).addReg(SrcReg, 0, SrcSubReg); 308 309 // Now update live variable information if we have it. Otherwise we're done 310 if (!LV) continue; 311 312 // We want to be able to insert a kill of the register if this PHI (aka, the 313 // copy we just inserted) is the last use of the source value. Live 314 // variable analysis conservatively handles this by saying that the value is 315 // live until the end of the block the PHI entry lives in. If the value 316 // really is dead at the PHI copy, there will be no successor blocks which 317 // have the value live-in. 318 319 // Also check to see if this register is in use by another PHI node which 320 // has not yet been eliminated. If so, it will be killed at an appropriate 321 // point later. 322 323 // Is it used by any PHI instructions in this block? 324 bool ValueIsUsed = VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)]; 325 326 // Okay, if we now know that the value is not live out of the block, we can 327 // add a kill marker in this block saying that it kills the incoming value! 328 if (!ValueIsUsed && !LV->isLiveOut(SrcReg, opBlock)) { 329 // In our final twist, we have to decide which instruction kills the 330 // register. In most cases this is the copy, however, the first 331 // terminator instruction at the end of the block may also use the value. 332 // In this case, we should mark *it* as being the killing block, not the 333 // copy. 334 MachineBasicBlock::iterator KillInst; 335 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator(); 336 if (Term != opBlock.end() && Term->readsRegister(SrcReg)) { 337 KillInst = Term; 338 339 // Check that no other terminators use values. 340#ifndef NDEBUG 341 for (MachineBasicBlock::iterator TI = llvm::next(Term); 342 TI != opBlock.end(); ++TI) { 343 if (TI->isDebugValue()) 344 continue; 345 assert(!TI->readsRegister(SrcReg) && 346 "Terminator instructions cannot use virtual registers unless" 347 "they are the first terminator in a block!"); 348 } 349#endif 350 } else if (reusedIncoming || !IncomingReg) { 351 // We may have to rewind a bit if we didn't insert a copy this time. 352 KillInst = Term; 353 while (KillInst != opBlock.begin()) { 354 --KillInst; 355 if (KillInst->isDebugValue()) 356 continue; 357 if (KillInst->readsRegister(SrcReg)) 358 break; 359 } 360 } else { 361 // We just inserted this copy. 362 KillInst = prior(InsertPos); 363 } 364 assert(KillInst->readsRegister(SrcReg) && "Cannot find kill instruction"); 365 366 // Finally, mark it killed. 367 LV->addVirtualRegisterKilled(SrcReg, KillInst); 368 369 // This vreg no longer lives all of the way through opBlock. 370 unsigned opBlockNum = opBlock.getNumber(); 371 LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum); 372 } 373 } 374 375 // Really delete the PHI instruction now, if it is not in the LoweredPHIs map. 376 if (reusedIncoming || !IncomingReg) 377 MF.DeleteMachineInstr(MPhi); 378} 379 380/// analyzePHINodes - Gather information about the PHI nodes in here. In 381/// particular, we want to map the number of uses of a virtual register which is 382/// used in a PHI node. We map that to the BB the vreg is coming from. This is 383/// used later to determine when the vreg is killed in the BB. 384/// 385void PHIElimination::analyzePHINodes(const MachineFunction& MF) { 386 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); 387 I != E; ++I) 388 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end(); 389 BBI != BBE && BBI->isPHI(); ++BBI) 390 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) 391 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(), 392 BBI->getOperand(i).getReg())]; 393} 394 395bool PHIElimination::SplitPHIEdges(MachineFunction &MF, 396 MachineBasicBlock &MBB, 397 LiveVariables &LV, 398 MachineLoopInfo *MLI) { 399 if (MBB.empty() || !MBB.front().isPHI() || MBB.isLandingPad()) 400 return false; // Quick exit for basic blocks without PHIs. 401 402 bool Changed = false; 403 for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end(); 404 BBI != BBE && BBI->isPHI(); ++BBI) { 405 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) { 406 unsigned Reg = BBI->getOperand(i).getReg(); 407 MachineBasicBlock *PreMBB = BBI->getOperand(i+1).getMBB(); 408 // We break edges when registers are live out from the predecessor block 409 // (not considering PHI nodes). If the register is live in to this block 410 // anyway, we would gain nothing from splitting. 411 // Avoid splitting backedges of loops. It would introduce small 412 // out-of-line blocks into the loop which is very bad for code placement. 413 if (PreMBB != &MBB && 414 !LV.isLiveIn(Reg, MBB) && LV.isLiveOut(Reg, *PreMBB)) { 415 if (!MLI || 416 !(MLI->getLoopFor(PreMBB) == MLI->getLoopFor(&MBB) && 417 MLI->isLoopHeader(&MBB))) { 418 if (PreMBB->SplitCriticalEdge(&MBB, this)) { 419 Changed = true; 420 ++NumCriticalEdgesSplit; 421 } 422 } 423 } 424 } 425 } 426 return Changed; 427} 428