PHIElimination.cpp revision 198090
1279264Sdelphij//===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===// 2110010Smarkm// 3110010Smarkm// The LLVM Compiler Infrastructure 4160819Ssimon// 5110010Smarkm// This file is distributed under the University of Illinois Open Source 6110010Smarkm// License. See LICENSE.TXT for details. 7110010Smarkm// 8110010Smarkm//===----------------------------------------------------------------------===// 9110010Smarkm// 10110010Smarkm// This pass eliminates machine instruction PHI nodes by inserting copy 11110010Smarkm// instructions. This destroys SSA information, but is the desired input for 12110010Smarkm// some register allocators. 13110010Smarkm// 14110010Smarkm//===----------------------------------------------------------------------===// 15110010Smarkm 16110010Smarkm#define DEBUG_TYPE "phielim" 17110010Smarkm#include "PHIElimination.h" 18110010Smarkm#include "llvm/BasicBlock.h" 19110010Smarkm#include "llvm/Instructions.h" 20215698Ssimon#include "llvm/CodeGen/LiveVariables.h" 21215698Ssimon#include "llvm/CodeGen/Passes.h" 22215698Ssimon#include "llvm/CodeGen/MachineFunctionPass.h" 23215698Ssimon#include "llvm/CodeGen/MachineInstr.h" 24215698Ssimon#include "llvm/CodeGen/MachineInstrBuilder.h" 25110010Smarkm#include "llvm/CodeGen/MachineRegisterInfo.h" 26110010Smarkm#include "llvm/Target/TargetMachine.h" 27110010Smarkm#include "llvm/ADT/SmallPtrSet.h" 28110010Smarkm#include "llvm/ADT/STLExtras.h" 29110010Smarkm#include "llvm/ADT/Statistic.h" 30110010Smarkm#include "llvm/Support/Compiler.h" 31110010Smarkm#include <algorithm> 32110010Smarkm#include <map> 33110010Smarkmusing namespace llvm; 34110010Smarkm 35110010SmarkmSTATISTIC(NumAtomic, "Number of atomic phis lowered"); 36110010Smarkm 37110010Smarkmchar PHIElimination::ID = 0; 38110010Smarkmstatic RegisterPass<PHIElimination> 39110010SmarkmX("phi-node-elimination", "Eliminate PHI nodes for register allocation"); 40110010Smarkm 41279264Sdelphijconst PassInfo *const llvm::PHIEliminationID = &X; 42279264Sdelphij 43110010Smarkmvoid llvm::PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const { 44110010Smarkm AU.setPreservesCFG(); 45215698Ssimon AU.addPreserved<LiveVariables>(); 46215698Ssimon AU.addPreservedID(MachineLoopInfoID); 47215698Ssimon AU.addPreservedID(MachineDominatorsID); 48215698Ssimon MachineFunctionPass::getAnalysisUsage(AU); 49160819Ssimon} 50215698Ssimon 51160819Ssimonbool llvm::PHIElimination::runOnMachineFunction(MachineFunction &Fn) { 52160819Ssimon MRI = &Fn.getRegInfo(); 53279264Sdelphij 54279264Sdelphij PHIDefs.clear(); 55279264Sdelphij PHIKills.clear(); 56110010Smarkm analyzePHINodes(Fn); 57279264Sdelphij 58279264Sdelphij bool Changed = false; 59279264Sdelphij 60279264Sdelphij // Eliminate PHI instructions by inserting copies into predecessor blocks. 61279264Sdelphij for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) 62279264Sdelphij Changed |= EliminatePHINodes(Fn, *I); 63215698Ssimon 64279264Sdelphij // Remove dead IMPLICIT_DEF instructions. 65279264Sdelphij for (SmallPtrSet<MachineInstr*,4>::iterator I = ImpDefs.begin(), 66279264Sdelphij E = ImpDefs.end(); I != E; ++I) { 67279264Sdelphij MachineInstr *DefMI = *I; 68279264Sdelphij unsigned DefReg = DefMI->getOperand(0).getReg(); 69215698Ssimon if (MRI->use_empty(DefReg)) 70279264Sdelphij DefMI->eraseFromParent(); 71110010Smarkm } 72110010Smarkm 73110010Smarkm ImpDefs.clear(); 74110010Smarkm VRegPHIUseCount.clear(); 75110010Smarkm return Changed; 76110010Smarkm} 77110010Smarkm 78110010Smarkm 79110010Smarkm/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in 80110010Smarkm/// predecessor basic blocks. 81110010Smarkm/// 82110010Smarkmbool llvm::PHIElimination::EliminatePHINodes(MachineFunction &MF, 83110010Smarkm MachineBasicBlock &MBB) { 84110010Smarkm if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI) 85110010Smarkm return false; // Quick exit for basic blocks without PHIs. 86110010Smarkm 87110010Smarkm // Get an iterator to the first instruction after the last PHI node (this may 88110010Smarkm // also be the end of the basic block). 89110010Smarkm MachineBasicBlock::iterator AfterPHIsIt = SkipPHIsAndLabels(MBB, MBB.begin()); 90110010Smarkm 91110010Smarkm while (MBB.front().getOpcode() == TargetInstrInfo::PHI) 92110010Smarkm LowerAtomicPHINode(MBB, AfterPHIsIt); 93110010Smarkm 94110010Smarkm return true; 95110010Smarkm} 96110010Smarkm 97110010Smarkm/// isSourceDefinedByImplicitDef - Return true if all sources of the phi node 98110010Smarkm/// are implicit_def's. 99110010Smarkmstatic bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi, 100110010Smarkm const MachineRegisterInfo *MRI) { 101110010Smarkm for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) { 102110010Smarkm unsigned SrcReg = MPhi->getOperand(i).getReg(); 103110010Smarkm const MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 104110010Smarkm if (!DefMI || DefMI->getOpcode() != TargetInstrInfo::IMPLICIT_DEF) 105110010Smarkm return false; 106110010Smarkm } 107110010Smarkm return true; 108110010Smarkm} 109110010Smarkm 110110010Smarkm// FindCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg. 111110010Smarkm// This needs to be after any def or uses of SrcReg, but before any subsequent 112110010Smarkm// point where control flow might jump out of the basic block. 113110010SmarkmMachineBasicBlock::iterator 114110010Smarkmllvm::PHIElimination::FindCopyInsertPoint(MachineBasicBlock &MBB, 115110010Smarkm unsigned SrcReg) { 116110010Smarkm // Handle the trivial case trivially. 117110010Smarkm if (MBB.empty()) 118110010Smarkm return MBB.begin(); 119110010Smarkm 120110010Smarkm // If this basic block does not contain an invoke, then control flow always 121110010Smarkm // reaches the end of it, so place the copy there. The logic below works in 122110010Smarkm // this case too, but is more expensive. 123110010Smarkm if (!isa<InvokeInst>(MBB.getBasicBlock()->getTerminator())) 124110010Smarkm return MBB.getFirstTerminator(); 125110010Smarkm 126110010Smarkm // Discover any definition/uses in this basic block. 127110010Smarkm SmallPtrSet<MachineInstr*, 8> DefUsesInMBB; 128110010Smarkm for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg), 129110010Smarkm RE = MRI->reg_end(); RI != RE; ++RI) { 130110010Smarkm MachineInstr *DefUseMI = &*RI; 131110010Smarkm if (DefUseMI->getParent() == &MBB) 132110010Smarkm DefUsesInMBB.insert(DefUseMI); 133160819Ssimon } 134110010Smarkm 135110010Smarkm MachineBasicBlock::iterator InsertPoint; 136279264Sdelphij if (DefUsesInMBB.empty()) { 137215698Ssimon // No def/uses. Insert the copy at the start of the basic block. 138215698Ssimon InsertPoint = MBB.begin(); 139215698Ssimon } else if (DefUsesInMBB.size() == 1) { 140215698Ssimon // Insert the copy immediately after the definition/use. 141110010Smarkm InsertPoint = *DefUsesInMBB.begin(); 142160819Ssimon ++InsertPoint; 143110010Smarkm } else { 144110010Smarkm // Insert the copy immediately after the last definition/use. 145110010Smarkm InsertPoint = MBB.end(); 146110010Smarkm while (!DefUsesInMBB.count(&*--InsertPoint)) {} 147215698Ssimon ++InsertPoint; 148160819Ssimon } 149110010Smarkm 150110010Smarkm // Make sure the copy goes after any phi nodes however. 151110010Smarkm return SkipPHIsAndLabels(MBB, InsertPoint); 152110010Smarkm} 153110010Smarkm 154110010Smarkm/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block, 155110010Smarkm/// under the assuption that it needs to be lowered in a way that supports 156110010Smarkm/// atomic execution of PHIs. This lowering method is always correct all of the 157110010Smarkm/// time. 158110010Smarkm/// 159110010Smarkmvoid llvm::PHIElimination::LowerAtomicPHINode( 160110010Smarkm MachineBasicBlock &MBB, 161110010Smarkm MachineBasicBlock::iterator AfterPHIsIt) { 162110010Smarkm // Unlink the PHI node from the basic block, but don't delete the PHI yet. 163110010Smarkm MachineInstr *MPhi = MBB.remove(MBB.begin()); 164110010Smarkm 165110010Smarkm unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2; 166110010Smarkm unsigned DestReg = MPhi->getOperand(0).getReg(); 167110010Smarkm bool isDead = MPhi->getOperand(0).isDead(); 168110010Smarkm 169110010Smarkm // Create a new register for the incoming PHI arguments. 170160819Ssimon MachineFunction &MF = *MBB.getParent(); 171110010Smarkm const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg); 172110010Smarkm unsigned IncomingReg = 0; 173160819Ssimon 174110010Smarkm // Insert a register to register copy at the top of the current block (but 175110010Smarkm // after any remaining phi nodes) which copies the new incoming register 176110010Smarkm // into the phi node destination. 177110010Smarkm const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); 178110010Smarkm if (isSourceDefinedByImplicitDef(MPhi, MRI)) 179110010Smarkm // If all sources of a PHI node are implicit_def, just emit an 180110010Smarkm // implicit_def instead of a copy. 181110010Smarkm BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), 182110010Smarkm TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg); 183110010Smarkm else { 184110010Smarkm IncomingReg = MF.getRegInfo().createVirtualRegister(RC); 185110010Smarkm TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC); 186110010Smarkm } 187279264Sdelphij 188279264Sdelphij // Record PHI def. 189279264Sdelphij assert(!hasPHIDef(DestReg) && "Vreg has multiple phi-defs?"); 190279264Sdelphij PHIDefs[DestReg] = &MBB; 191279264Sdelphij 192279264Sdelphij // Update live variable information if there is any. 193279264Sdelphij LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>(); 194279264Sdelphij if (LV) { 195279264Sdelphij MachineInstr *PHICopy = prior(AfterPHIsIt); 196279264Sdelphij 197110010Smarkm if (IncomingReg) { 198110010Smarkm // Increment use count of the newly created virtual register. 199110010Smarkm LV->getVarInfo(IncomingReg).NumUses++; 200110010Smarkm 201110010Smarkm // Add information to LiveVariables to know that the incoming value is 202110010Smarkm // killed. Note that because the value is defined in several places (once 203110010Smarkm // each for each incoming block), the "def" block and instruction fields 204110010Smarkm // for the VarInfo is not filled in. 205110010Smarkm LV->addVirtualRegisterKilled(IncomingReg, PHICopy); 206110010Smarkm } 207160819Ssimon 208160819Ssimon // Since we are going to be deleting the PHI node, if it is the last use of 209 // any registers, or if the value itself is dead, we need to move this 210 // information over to the new copy we just inserted. 211 LV->removeVirtualRegistersKilled(MPhi); 212 213 // If the result is dead, update LV. 214 if (isDead) { 215 LV->addVirtualRegisterDead(DestReg, PHICopy); 216 LV->removeVirtualRegisterDead(DestReg, MPhi); 217 } 218 } 219 220 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node. 221 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) 222 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i + 1).getMBB(), 223 MPhi->getOperand(i).getReg())]; 224 225 // Now loop over all of the incoming arguments, changing them to copy into the 226 // IncomingReg register in the corresponding predecessor basic block. 227 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto; 228 for (int i = NumSrcs - 1; i >= 0; --i) { 229 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg(); 230 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) && 231 "Machine PHI Operands must all be virtual registers!"); 232 233 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source 234 // path the PHI. 235 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB(); 236 237 // Record the kill. 238 PHIKills[SrcReg].insert(&opBlock); 239 240 // If source is defined by an implicit def, there is no need to insert a 241 // copy. 242 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 243 if (DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) { 244 ImpDefs.insert(DefMI); 245 continue; 246 } 247 248 // Check to make sure we haven't already emitted the copy for this block. 249 // This can happen because PHI nodes may have multiple entries for the same 250 // basic block. 251 if (!MBBsInsertedInto.insert(&opBlock)) 252 continue; // If the copy has already been emitted, we're done. 253 254 // Find a safe location to insert the copy, this may be the first terminator 255 // in the block (or end()). 256 MachineBasicBlock::iterator InsertPos = FindCopyInsertPoint(opBlock, SrcReg); 257 258 // Insert the copy. 259 TII->copyRegToReg(opBlock, InsertPos, IncomingReg, SrcReg, RC, RC); 260 261 // Now update live variable information if we have it. Otherwise we're done 262 if (!LV) continue; 263 264 // We want to be able to insert a kill of the register if this PHI (aka, the 265 // copy we just inserted) is the last use of the source value. Live 266 // variable analysis conservatively handles this by saying that the value is 267 // live until the end of the block the PHI entry lives in. If the value 268 // really is dead at the PHI copy, there will be no successor blocks which 269 // have the value live-in. 270 // 271 // Check to see if the copy is the last use, and if so, update the live 272 // variables information so that it knows the copy source instruction kills 273 // the incoming value. 274 LiveVariables::VarInfo &InRegVI = LV->getVarInfo(SrcReg); 275 276 // Loop over all of the successors of the basic block, checking to see if 277 // the value is either live in the block, or if it is killed in the block. 278 // Also check to see if this register is in use by another PHI node which 279 // has not yet been eliminated. If so, it will be killed at an appropriate 280 // point later. 281 282 // Is it used by any PHI instructions in this block? 283 bool ValueIsLive = VRegPHIUseCount[BBVRegPair(&opBlock, SrcReg)] != 0; 284 285 std::vector<MachineBasicBlock*> OpSuccBlocks; 286 287 // Otherwise, scan successors, including the BB the PHI node lives in. 288 for (MachineBasicBlock::succ_iterator SI = opBlock.succ_begin(), 289 E = opBlock.succ_end(); SI != E && !ValueIsLive; ++SI) { 290 MachineBasicBlock *SuccMBB = *SI; 291 292 // Is it alive in this successor? 293 unsigned SuccIdx = SuccMBB->getNumber(); 294 if (InRegVI.AliveBlocks.test(SuccIdx)) { 295 ValueIsLive = true; 296 break; 297 } 298 299 OpSuccBlocks.push_back(SuccMBB); 300 } 301 302 // Check to see if this value is live because there is a use in a successor 303 // that kills it. 304 if (!ValueIsLive) { 305 switch (OpSuccBlocks.size()) { 306 case 1: { 307 MachineBasicBlock *MBB = OpSuccBlocks[0]; 308 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i) 309 if (InRegVI.Kills[i]->getParent() == MBB) { 310 ValueIsLive = true; 311 break; 312 } 313 break; 314 } 315 case 2: { 316 MachineBasicBlock *MBB1 = OpSuccBlocks[0], *MBB2 = OpSuccBlocks[1]; 317 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i) 318 if (InRegVI.Kills[i]->getParent() == MBB1 || 319 InRegVI.Kills[i]->getParent() == MBB2) { 320 ValueIsLive = true; 321 break; 322 } 323 break; 324 } 325 default: 326 std::sort(OpSuccBlocks.begin(), OpSuccBlocks.end()); 327 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i) 328 if (std::binary_search(OpSuccBlocks.begin(), OpSuccBlocks.end(), 329 InRegVI.Kills[i]->getParent())) { 330 ValueIsLive = true; 331 break; 332 } 333 } 334 } 335 336 // Okay, if we now know that the value is not live out of the block, we can 337 // add a kill marker in this block saying that it kills the incoming value! 338 if (!ValueIsLive) { 339 // In our final twist, we have to decide which instruction kills the 340 // register. In most cases this is the copy, however, the first 341 // terminator instruction at the end of the block may also use the value. 342 // In this case, we should mark *it* as being the killing block, not the 343 // copy. 344 MachineBasicBlock::iterator KillInst = prior(InsertPos); 345 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator(); 346 if (Term != opBlock.end()) { 347 if (Term->readsRegister(SrcReg)) 348 KillInst = Term; 349 350 // Check that no other terminators use values. 351#ifndef NDEBUG 352 for (MachineBasicBlock::iterator TI = next(Term); TI != opBlock.end(); 353 ++TI) { 354 assert(!TI->readsRegister(SrcReg) && 355 "Terminator instructions cannot use virtual registers unless" 356 "they are the first terminator in a block!"); 357 } 358#endif 359 } 360 361 // Finally, mark it killed. 362 LV->addVirtualRegisterKilled(SrcReg, KillInst); 363 364 // This vreg no longer lives all of the way through opBlock. 365 unsigned opBlockNum = opBlock.getNumber(); 366 InRegVI.AliveBlocks.reset(opBlockNum); 367 } 368 } 369 370 // Really delete the PHI instruction now! 371 MF.DeleteMachineInstr(MPhi); 372 ++NumAtomic; 373} 374 375/// analyzePHINodes - Gather information about the PHI nodes in here. In 376/// particular, we want to map the number of uses of a virtual register which is 377/// used in a PHI node. We map that to the BB the vreg is coming from. This is 378/// used later to determine when the vreg is killed in the BB. 379/// 380void llvm::PHIElimination::analyzePHINodes(const MachineFunction& Fn) { 381 for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end(); 382 I != E; ++I) 383 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end(); 384 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) 385 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) 386 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i + 1).getMBB(), 387 BBI->getOperand(i).getReg())]; 388} 389