k6.md revision 117395
183098Smp;; AMD K6/K6-2 Scheduling 283098Smp;; Copyright (C) 2002 ;; Free Software Foundation, Inc. 383098Smp;; 483098Smp;; This file is part of GNU CC. 583098Smp;; 683098Smp;; GNU CC is free software; you can redistribute it and/or modify 783098Smp;; it under the terms of the GNU General Public License as published by 883098Smp;; the Free Software Foundation; either version 2, or (at your option) 983098Smp;; any later version. 1083098Smp;; 1183098Smp;; GNU CC is distributed in the hope that it will be useful, 1283098Smp;; but WITHOUT ANY WARRANTY; without even the implied warranty of 1383098Smp;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1483098Smp;; GNU General Public License for more details. 1583098Smp;; 1683098Smp;; You should have received a copy of the GNU General Public License 1783098Smp;; along with GNU CC; see the file COPYING. If not, write to 1883098Smp;; the Free Software Foundation, 59 Temple Place - Suite 330, 1983098Smp;; Boston, MA 02111-1307, USA. */ 2083098Smp;; 2183098Smp;; The K6 has similar architecture to PPro. Important difference is, that 2283098Smp;; there are only two decoders and they seems to be much slower than execution 2383098Smp;; units. So we have to pay much more attention to proper decoding for 2483098Smp;; schedulers. We share most of scheduler code for PPro in i386.c 2583098Smp;; 2683098Smp;; The fp unit is not pipelined and do one operation per two cycles including 2783098Smp;; the FXCH. 2883098Smp;; 2983098Smp;; alu describes both ALU units (ALU-X and ALU-Y). 3083098Smp;; alux describes X alu unit 3183098Smp;; fpu describes FPU unit 3283098Smp;; load describes load unit. 3383098Smp;; branch describes branch unit. 3483098Smp;; store decsribes store unit. This unit is not modelled completely and only 3583098Smp;; used to model lea operation. Otherwise it lie outside of the critical 3683098Smp;; path. 3783098Smp;; 3883098Smp;; ??? fxch isn't handled; not an issue until sched3 after reg-stack is real. 3983098Smp 4083098Smp;; The decoder specification is in the PPro section above! 4183098Smp 42;; Shift instructions and certain arithmetic are issued only to X pipe. 43(define_function_unit "k6_alux" 1 0 44 (and (eq_attr "cpu" "k6") 45 (eq_attr "type" "ishift,ishift1,rotate,rotate1,alu1,negnot,cld")) 46 1 1) 47 48;; The QI mode arithmetic is issued to X pipe only. 49(define_function_unit "k6_alux" 1 0 50 (and (eq_attr "cpu" "k6") 51 (and (eq_attr "type" "alu,alu1,negnot,icmp,test,imovx,incdec") 52 (match_operand:QI 0 "general_operand" ""))) 53 1 1) 54 55(define_function_unit "k6_alu" 2 0 56 (and (eq_attr "cpu" "k6") 57 (eq_attr "type" "ishift,ishift1,rotate,rotate1,alu1,negnot,alu,icmp,test,imovx,incdec,setcc,lea")) 58 1 1) 59 60(define_function_unit "k6_alu" 2 0 61 (and (eq_attr "cpu" "k6") 62 (and (eq_attr "type" "imov") 63 (eq_attr "memory" "none"))) 64 1 1) 65 66(define_function_unit "k6_branch" 1 0 67 (and (eq_attr "cpu" "k6") 68 (eq_attr "type" "call,callv,ibr")) 69 1 1) 70 71;; Load unit have two cycle latency, but we take care for it in adjust_cost 72(define_function_unit "k6_load" 1 0 73 (and (eq_attr "cpu" "k6") 74 (ior (eq_attr "type" "pop") 75 (eq_attr "memory" "load,both"))) 76 1 1) 77 78(define_function_unit "k6_load" 1 0 79 (and (eq_attr "cpu" "k6") 80 (and (eq_attr "type" "str") 81 (eq_attr "memory" "load,both"))) 82 10 10) 83 84;; Lea have two instructions, so latency is probably 2 85(define_function_unit "k6_store" 1 0 86 (and (eq_attr "cpu" "k6") 87 (eq_attr "type" "lea")) 88 2 1) 89 90(define_function_unit "k6_store" 1 0 91 (and (eq_attr "cpu" "k6") 92 (eq_attr "type" "str")) 93 10 10) 94 95(define_function_unit "k6_store" 1 0 96 (and (eq_attr "cpu" "k6") 97 (ior (eq_attr "type" "push") 98 (eq_attr "memory" "store,both"))) 99 1 1) 100 101(define_function_unit "k6_fpu" 1 1 102 (and (eq_attr "cpu" "k6") 103 (eq_attr "type" "fop,fmov,fcmp,fistp")) 104 2 2) 105 106(define_function_unit "k6_fpu" 1 1 107 (and (eq_attr "cpu" "k6") 108 (eq_attr "type" "fmul")) 109 2 2) 110 111;; ??? Guess 112(define_function_unit "k6_fpu" 1 1 113 (and (eq_attr "cpu" "k6") 114 (eq_attr "type" "fdiv,fpspc")) 115 56 56) 116 117(define_function_unit "k6_alu" 2 0 118 (and (eq_attr "cpu" "k6") 119 (eq_attr "type" "imul")) 120 2 2) 121 122(define_function_unit "k6_alux" 1 0 123 (and (eq_attr "cpu" "k6") 124 (eq_attr "type" "imul")) 125 2 2) 126 127;; ??? Guess 128(define_function_unit "k6_alu" 2 0 129 (and (eq_attr "cpu" "k6") 130 (eq_attr "type" "idiv")) 131 17 17) 132 133(define_function_unit "k6_alux" 1 0 134 (and (eq_attr "cpu" "k6") 135 (eq_attr "type" "idiv")) 136 17 17) 137