constraints.md revision 169689
1190688Sweongyo;; Constraint definitions for IA-32 and x86-64.
2190688Sweongyo;; Copyright (C) 2006 Free Software Foundation, Inc.
3190688Sweongyo;;
4190688Sweongyo;; This file is part of GCC.
5190688Sweongyo;;
6190688Sweongyo;; GCC is free software; you can redistribute it and/or modify
7190688Sweongyo;; it under the terms of the GNU General Public License as published by
8190688Sweongyo;; the Free Software Foundation; either version 2, or (at your option)
9190688Sweongyo;; any later version.
10190688Sweongyo;;
11190688Sweongyo;; GCC is distributed in the hope that it will be useful,
12190688Sweongyo;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13190688Sweongyo;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14190688Sweongyo;; GNU General Public License for more details.
15190688Sweongyo;;
16190688Sweongyo;; You should have received a copy of the GNU General Public License
17190688Sweongyo;; along with GCC; see the file COPYING.  If not, write to
18190688Sweongyo;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
19190688Sweongyo;; Boston, MA 02110-1301, USA.
20190688Sweongyo
21190688Sweongyo;;; Unused letters:
22190688Sweongyo;;;     B     H           TU W   
23190688Sweongyo;;;           h jk          vw  z
24190688Sweongyo
25190688Sweongyo;; Integer register constraints.
26190688Sweongyo;; It is not necessary to define 'r' here.
27190688Sweongyo(define_register_constraint "R" "LEGACY_REGS"
28190688Sweongyo "Legacy register---the eight integer registers available on all
29190688Sweongyo  i386 processors (@code{a}, @code{b}, @code{c}, @code{d},
30190688Sweongyo  @code{si}, @code{di}, @code{bp}, @code{sp}).")
31190688Sweongyo
32190688Sweongyo(define_register_constraint "q" "TARGET_64BIT ? GENERAL_REGS : Q_REGS"
33190688Sweongyo "Any register accessible as @code{@var{r}l}.  In 32-bit mode, @code{a},
34190688Sweongyo  @code{b}, @code{c}, and @code{d}; in 64-bit mode, any integer register.")
35190688Sweongyo
36190688Sweongyo(define_register_constraint "Q" "Q_REGS"
37190688Sweongyo "Any register accessible as @code{@var{r}h}: @code{a}, @code{b},
38190688Sweongyo  @code{c}, and @code{d}.")
39190688Sweongyo
40190688Sweongyo(define_register_constraint "l" "INDEX_REGS"
41190688Sweongyo "@internal Any register that can be used as the index in a base+index
42190688Sweongyo  memory access: that is, any general register except the stack pointer.")
43190688Sweongyo
44190688Sweongyo(define_register_constraint "a" "AREG"
45190688Sweongyo "The @code{a} register.")
46190688Sweongyo
47190688Sweongyo(define_register_constraint "b" "BREG"
48190688Sweongyo "The @code{b} register.")
49190688Sweongyo
50190688Sweongyo(define_register_constraint "c" "CREG"
51190688Sweongyo "The @code{c} register.")
52190688Sweongyo
53190688Sweongyo(define_register_constraint "d" "DREG"
54190688Sweongyo "The @code{d} register.")
55190688Sweongyo
56190688Sweongyo(define_register_constraint "S" "SIREG"
57190688Sweongyo "The @code{si} register.")
58190688Sweongyo
59190688Sweongyo(define_register_constraint "D" "DIREG"
60190688Sweongyo "The @code{di} register.")
61190688Sweongyo
62190688Sweongyo(define_register_constraint "A" "AD_REGS"
63190688Sweongyo "The @code{a} and @code{d} registers, as a pair (for instructions
64190688Sweongyo  that return half the result in one and half in the other).")
65190688Sweongyo
66190688Sweongyo;; Floating-point register constraints.
67190688Sweongyo(define_register_constraint "f"
68190688Sweongyo "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FLOAT_REGS : NO_REGS"
69190688Sweongyo "Any 80387 floating-point (stack) register.")
70190688Sweongyo
71190688Sweongyo(define_register_constraint "t"
72190688Sweongyo "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_TOP_REG : NO_REGS"
73190688Sweongyo "Top of 80387 floating-point stack (@code{%st(0)}).")
74190688Sweongyo
75190688Sweongyo(define_register_constraint "u"
76190688Sweongyo "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_SECOND_REG : NO_REGS"
77190688Sweongyo "Second from top of 80387 floating-point stack (@code{%st(1)}).")
78190688Sweongyo
79190688Sweongyo;; Vector registers (also used for plain floating point nowadays).
80190688Sweongyo(define_register_constraint "y" "TARGET_MMX ? MMX_REGS : NO_REGS"
81190688Sweongyo "Any MMX register.")
82190688Sweongyo
83190688Sweongyo(define_register_constraint "x" "TARGET_SSE ? SSE_REGS : NO_REGS"
84190688Sweongyo "Any SSE register.")
85190688Sweongyo
86190688Sweongyo(define_register_constraint "Y" "TARGET_SSE2? SSE_REGS : NO_REGS"
87190688Sweongyo "@internal Any SSE2 register.")
88190688Sweongyo
89190688Sweongyo;; Integer constant constraints.
90190688Sweongyo(define_constraint "I"
91190688Sweongyo  "Integer constant in the range 0 @dots{} 31, for 32-bit shifts."
92190688Sweongyo  (and (match_code "const_int")
93190688Sweongyo       (match_test "ival >= 0 && ival <= 31")))
94190688Sweongyo
95190688Sweongyo(define_constraint "J"
96190688Sweongyo  "Integer constant in the range 0 @dots{} 63, for 64-bit shifts."
97190688Sweongyo  (and (match_code "const_int")
98190688Sweongyo       (match_test "ival >= 0 && ival <= 63")))
99190688Sweongyo
100190688Sweongyo(define_constraint "K"
101190688Sweongyo  "Signed 8-bit integer constant."
102190688Sweongyo  (and (match_code "const_int")
103190688Sweongyo       (match_test "ival >= -128 && ival <= 127")))
104190688Sweongyo
105190688Sweongyo(define_constraint "L"
106190688Sweongyo  "@code{0xFF} or @code{0xFFFF}, for andsi as a zero-extending move."
107190688Sweongyo  (and (match_code "const_int")
108190688Sweongyo       (match_test "ival == 0xFF || ival == 0xFFFF")))
109190688Sweongyo
110190688Sweongyo(define_constraint "M"
111190688Sweongyo  "0, 1, 2, or 3 (shifts for the @code{lea} instruction)."
112190688Sweongyo  (and (match_code "const_int")
113190688Sweongyo       (match_test "ival >= 0 && ival <= 3")))
114190688Sweongyo
115190688Sweongyo(define_constraint "N"
116190688Sweongyo  "Unsigned 8-bit integer constant (for @code{in} and @code{out} 
117190688Sweongyo   instructions)."
118190688Sweongyo  (and (match_code "const_int")
119190688Sweongyo       (match_test "ival >= 0 && ival <= 255")))
120190688Sweongyo
121190688Sweongyo(define_constraint "O"
122190688Sweongyo  "@internal Integer constant in the range 0 @dots{} 127, for 128-bit shifts."
123190688Sweongyo  (and (match_code "const_int")
124190688Sweongyo       (match_test "ival >= 0 && ival <= 127")))
125190688Sweongyo
126190688Sweongyo;; Floating-point constant constraints.
127190688Sweongyo;; We allow constants even if TARGET_80387 isn't set, because the
128190688Sweongyo;; stack register converter may need to load 0.0 into the function
129190688Sweongyo;; value register (top of stack).
130190688Sweongyo(define_constraint "G"
131190688Sweongyo  "Standard 80387 floating point constant."
132190688Sweongyo  (and (match_code "const_double")
133190688Sweongyo       (match_test "standard_80387_constant_p (op)")))
134190688Sweongyo
135190688Sweongyo;; This can theoretically be any mode's CONST0_RTX.
136190688Sweongyo(define_constraint "C"
137190688Sweongyo  "Standard SSE floating point constant."
138190688Sweongyo  (match_test "standard_sse_constant_p (op)"))
139190688Sweongyo
140190688Sweongyo;; Constant-or-symbol-reference constraints.
141190688Sweongyo
142190688Sweongyo(define_constraint "e"
143190688Sweongyo  "32-bit signed integer constant, or a symbolic reference known
144190688Sweongyo   to fit that range (for immediate operands in sign-extending x86-64
145190688Sweongyo   instructions)."
146190688Sweongyo  (match_operand 0 "x86_64_immediate_operand"))
147190688Sweongyo
148190688Sweongyo(define_constraint "Z"
149190688Sweongyo  "32-bit unsigned integer constant, or a symbolic reference known
150190688Sweongyo   to fit that range (for immediate operands in zero-extending x86-64
151190688Sweongyo   instructions)."
152190688Sweongyo  (match_operand 0 "x86_64_zext_immediate_operand"))
153190688Sweongyo