athlon.md revision 169689
1117395Skan;; AMD Athlon Scheduling 2117395Skan;; 3117395Skan;; The Athlon does contain three pipelined FP units, three integer units and 4117395Skan;; three address generation units. 5117395Skan;; 6117395Skan;; The predecode logic is determining boundaries of instructions in the 64 7117395Skan;; byte cache line. So the cache line straddling problem of K6 might be issue 8117395Skan;; here as well, but it is not noted in the documentation. 9117395Skan;; 10117395Skan;; Three DirectPath instructions decoders and only one VectorPath decoder 11117395Skan;; is available. They can decode three DirectPath instructions or one VectorPath 12117395Skan;; instruction per cycle. 13117395Skan;; Decoded macro instructions are then passed to 72 entry instruction control 14117395Skan;; unit, that passes 15117395Skan;; it to the specialized integer (18 entry) and fp (36 entry) schedulers. 16117395Skan;; 17117395Skan;; The load/store queue unit is not attached to the schedulers but 18117395Skan;; communicates with all the execution units separately instead. 19117395Skan 20132718Skan(define_attr "athlon_decode" "direct,vector,double" 21132718Skan (cond [(eq_attr "type" "call,imul,idiv,other,multi,fcmov,fpspc,str,pop,cld,leave") 22132718Skan (const_string "vector") 23132718Skan (and (eq_attr "type" "push") 24132718Skan (match_operand 1 "memory_operand" "")) 25132718Skan (const_string "vector") 26132718Skan (and (eq_attr "type" "fmov") 27132718Skan (and (eq_attr "memory" "load,store") 28132718Skan (eq_attr "mode" "XF"))) 29132718Skan (const_string "vector")] 30132718Skan (const_string "direct"))) 31117395Skan 32132718Skan;; 33132718Skan;; decode0 decode1 decode2 34132718Skan;; \ | / 35132718Skan;; instruction control unit (72 entry scheduler) 36132718Skan;; | | 37132718Skan;; integer scheduler (18) stack map 38132718Skan;; / | | | | \ stack rename 39132718Skan;; ieu0 agu0 ieu1 agu1 ieu2 agu2 scheduler 40132718Skan;; | agu0 | agu1 agu2 register file 41132718Skan;; | \ | | / | | | 42132718Skan;; \ /\ | / fadd fmul fstore 43132718Skan;; \ / \ | / fadd fmul fstore 44132718Skan;; imul load/store (2x) fadd fmul fstore 45117395Skan 46132718Skan(define_automaton "athlon,athlon_load,athlon_mult,athlon_fp") 47132718Skan(define_cpu_unit "athlon-decode0" "athlon") 48132718Skan(define_cpu_unit "athlon-decode1" "athlon") 49132718Skan(define_cpu_unit "athlon-decode2" "athlon") 50132718Skan(define_cpu_unit "athlon-decodev" "athlon") 51132718Skan;; Model the fact that double decoded instruction may take 2 cycles 52132718Skan;; to decode when decoder2 and decoder0 in next cycle 53132718Skan;; is used (this is needed to allow troughput of 1.5 double decoded 54132718Skan;; instructions per cycle). 55132718Skan;; 56132718Skan;; In order to avoid dependence between reservation of decoder 57132718Skan;; and other units, we model decoder as two stage fully pipelined unit 58132718Skan;; and only double decoded instruction may occupy unit in the first cycle. 59132718Skan;; With this scheme however two double instructions can be issued cycle0. 60132718Skan;; 61132718Skan;; Avoid this by using presence set requiring decoder0 to be allocated 62132718Skan;; too. Vector decoded instructions then can't be issued when 63132718Skan;; modeled as consuming decoder0+decoder1+decoder2. 64132718Skan;; We solve that by specialized vector decoder unit and exclusion set. 65132718Skan(presence_set "athlon-decode2" "athlon-decode0") 66132718Skan(exclusion_set "athlon-decodev" "athlon-decode0,athlon-decode1,athlon-decode2") 67132718Skan(define_reservation "athlon-vector" "nothing,athlon-decodev") 68132718Skan(define_reservation "athlon-direct0" "nothing,athlon-decode0") 69132718Skan(define_reservation "athlon-direct" "nothing, 70132718Skan (athlon-decode0 | athlon-decode1 71132718Skan | athlon-decode2)") 72132718Skan;; Double instructions behaves like two direct instructions. 73132718Skan(define_reservation "athlon-double" "((athlon-decode2, athlon-decode0) 74132718Skan | (nothing,(athlon-decode0 + athlon-decode1)) 75132718Skan | (nothing,(athlon-decode1 + athlon-decode2)))") 76117395Skan 77132718Skan;; Agu and ieu unit results in extremely large automatons and 78132718Skan;; in our approximation they are hardly filled in. Only ieu 79132718Skan;; unit can, as issue rate is 3 and agu unit is always used 80132718Skan;; first in the insn reservations. Skip the models. 81117395Skan 82132718Skan;(define_cpu_unit "athlon-ieu0" "athlon_ieu") 83132718Skan;(define_cpu_unit "athlon-ieu1" "athlon_ieu") 84132718Skan;(define_cpu_unit "athlon-ieu2" "athlon_ieu") 85132718Skan;(define_reservation "athlon-ieu" "(athlon-ieu0 | athlon-ieu1 | athlon-ieu2)") 86132718Skan(define_reservation "athlon-ieu" "nothing") 87132718Skan(define_cpu_unit "athlon-ieu0" "athlon") 88132718Skan;(define_cpu_unit "athlon-agu0" "athlon_agu") 89132718Skan;(define_cpu_unit "athlon-agu1" "athlon_agu") 90132718Skan;(define_cpu_unit "athlon-agu2" "athlon_agu") 91132718Skan;(define_reservation "athlon-agu" "(athlon-agu0 | athlon-agu1 | athlon-agu2)") 92132718Skan(define_reservation "athlon-agu" "nothing") 93117395Skan 94132718Skan(define_cpu_unit "athlon-mult" "athlon_mult") 95117395Skan 96132718Skan(define_cpu_unit "athlon-load0" "athlon_load") 97132718Skan(define_cpu_unit "athlon-load1" "athlon_load") 98132718Skan(define_reservation "athlon-load" "athlon-agu, 99132718Skan (athlon-load0 | athlon-load1),nothing") 100132718Skan;; 128bit SSE instructions issue two loads at once 101132718Skan(define_reservation "athlon-load2" "athlon-agu, 102132718Skan (athlon-load0 + athlon-load1),nothing") 103117395Skan 104132718Skan(define_reservation "athlon-store" "(athlon-load0 | athlon-load1)") 105132718Skan;; 128bit SSE instructions issue two stores at once 106132718Skan(define_reservation "athlon-store2" "(athlon-load0 + athlon-load1)") 107117395Skan 108117395Skan 109132718Skan;; The FP operations start to execute at stage 12 in the pipeline, while 110132718Skan;; integer operations start to execute at stage 9 for Athlon and 11 for K8 111132718Skan;; Compensate the difference for Athlon because it results in significantly 112132718Skan;; smaller automata. 113132718Skan(define_reservation "athlon-fpsched" "nothing,nothing,nothing") 114132718Skan;; The floating point loads. 115132718Skan(define_reservation "athlon-fpload" "(athlon-fpsched + athlon-load)") 116132718Skan(define_reservation "athlon-fpload2" "(athlon-fpsched + athlon-load2)") 117132718Skan(define_reservation "athlon-fploadk8" "(athlon-fpsched + athlon-load)") 118132718Skan(define_reservation "athlon-fpload2k8" "(athlon-fpsched + athlon-load2)") 119117395Skan 120117395Skan 121132718Skan;; The three fp units are fully pipelined with latency of 3 122132718Skan(define_cpu_unit "athlon-fadd" "athlon_fp") 123132718Skan(define_cpu_unit "athlon-fmul" "athlon_fp") 124132718Skan(define_cpu_unit "athlon-fstore" "athlon_fp") 125132718Skan(define_reservation "athlon-fany" "(athlon-fstore | athlon-fmul | athlon-fadd)") 126169689Skan(define_reservation "athlon-faddmul" "(athlon-fadd | athlon-fmul)") 127117395Skan 128132718Skan;; Vector operations usually consume many of pipes. 129132718Skan(define_reservation "athlon-fvector" "(athlon-fadd + athlon-fmul + athlon-fstore)") 130117395Skan 131117395Skan 132132718Skan;; Jump instructions are executed in the branch unit completely transparent to us 133132718Skan(define_insn_reservation "athlon_branch" 0 134169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 135132718Skan (eq_attr "type" "ibr")) 136132718Skan "athlon-direct,athlon-ieu") 137132718Skan(define_insn_reservation "athlon_call" 0 138169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 139132718Skan (eq_attr "type" "call,callv")) 140132718Skan "athlon-vector,athlon-ieu") 141117395Skan 142132718Skan;; Latency of push operation is 3 cycles, but ESP value is available 143132718Skan;; earlier 144132718Skan(define_insn_reservation "athlon_push" 2 145169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 146132718Skan (eq_attr "type" "push")) 147132718Skan "athlon-direct,athlon-agu,athlon-store") 148132718Skan(define_insn_reservation "athlon_pop" 4 149169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 150132718Skan (eq_attr "type" "pop")) 151132718Skan "athlon-vector,athlon-load,athlon-ieu") 152132718Skan(define_insn_reservation "athlon_pop_k8" 3 153169689Skan (and (eq_attr "cpu" "k8,generic64") 154132718Skan (eq_attr "type" "pop")) 155132718Skan "athlon-double,(athlon-ieu+athlon-load)") 156132718Skan(define_insn_reservation "athlon_leave" 3 157132718Skan (and (eq_attr "cpu" "athlon") 158132718Skan (eq_attr "type" "leave")) 159132718Skan "athlon-vector,(athlon-ieu+athlon-load)") 160132718Skan(define_insn_reservation "athlon_leave_k8" 3 161169689Skan (and (eq_attr "cpu" "k8,generic64") 162132718Skan (eq_attr "type" "leave")) 163132718Skan "athlon-double,(athlon-ieu+athlon-load)") 164117395Skan 165132718Skan;; Lea executes in AGU unit with 2 cycles latency. 166132718Skan(define_insn_reservation "athlon_lea" 2 167169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 168132718Skan (eq_attr "type" "lea")) 169132718Skan "athlon-direct,athlon-agu,nothing") 170117395Skan 171132718Skan;; Mul executes in special multiplier unit attached to IEU0 172132718Skan(define_insn_reservation "athlon_imul" 5 173132718Skan (and (eq_attr "cpu" "athlon") 174132718Skan (and (eq_attr "type" "imul") 175132718Skan (eq_attr "memory" "none,unknown"))) 176132718Skan "athlon-vector,athlon-ieu0,athlon-mult,nothing,nothing,athlon-ieu0") 177132718Skan;; ??? Widening multiply is vector or double. 178132718Skan(define_insn_reservation "athlon_imul_k8_DI" 4 179169689Skan (and (eq_attr "cpu" "k8,generic64") 180132718Skan (and (eq_attr "type" "imul") 181132718Skan (and (eq_attr "mode" "DI") 182132718Skan (eq_attr "memory" "none,unknown")))) 183132718Skan "athlon-direct0,athlon-ieu0,athlon-mult,nothing,athlon-ieu0") 184132718Skan(define_insn_reservation "athlon_imul_k8" 3 185169689Skan (and (eq_attr "cpu" "k8,generic64") 186132718Skan (and (eq_attr "type" "imul") 187132718Skan (eq_attr "memory" "none,unknown"))) 188132718Skan "athlon-direct0,athlon-ieu0,athlon-mult,athlon-ieu0") 189132718Skan(define_insn_reservation "athlon_imul_mem" 8 190132718Skan (and (eq_attr "cpu" "athlon") 191132718Skan (and (eq_attr "type" "imul") 192132718Skan (eq_attr "memory" "load,both"))) 193132718Skan "athlon-vector,athlon-load,athlon-ieu,athlon-mult,nothing,nothing,athlon-ieu") 194132718Skan(define_insn_reservation "athlon_imul_mem_k8_DI" 7 195169689Skan (and (eq_attr "cpu" "k8,generic64") 196132718Skan (and (eq_attr "type" "imul") 197132718Skan (and (eq_attr "mode" "DI") 198132718Skan (eq_attr "memory" "load,both")))) 199132718Skan "athlon-vector,athlon-load,athlon-ieu,athlon-mult,nothing,athlon-ieu") 200132718Skan(define_insn_reservation "athlon_imul_mem_k8" 6 201169689Skan (and (eq_attr "cpu" "k8,generic64") 202132718Skan (and (eq_attr "type" "imul") 203132718Skan (eq_attr "memory" "load,both"))) 204132718Skan "athlon-vector,athlon-load,athlon-ieu,athlon-mult,athlon-ieu") 205117395Skan 206169689Skan;; Idiv cannot execute in parallel with other instructions. Dealing with it 207132718Skan;; as with short latency vector instruction is good approximation avoiding 208132718Skan;; scheduler from trying too hard to can hide it's latency by overlap with 209132718Skan;; other instructions. 210132718Skan;; ??? Experiments show that the idiv can overlap with roughly 6 cycles 211132718Skan;; of the other code 212117395Skan 213132718Skan(define_insn_reservation "athlon_idiv" 6 214169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 215132718Skan (and (eq_attr "type" "idiv") 216132718Skan (eq_attr "memory" "none,unknown"))) 217132718Skan "athlon-vector,(athlon-ieu0*6+(athlon-fpsched,athlon-fvector))") 218132718Skan(define_insn_reservation "athlon_idiv_mem" 9 219169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 220132718Skan (and (eq_attr "type" "idiv") 221132718Skan (eq_attr "memory" "load,both"))) 222132718Skan "athlon-vector,((athlon-load,athlon-ieu0*6)+(athlon-fpsched,athlon-fvector))") 223132718Skan;; The parallelism of string instructions is not documented. Model it same way 224132718Skan;; as idiv to create smaller automata. This probably does not matter much. 225132718Skan(define_insn_reservation "athlon_str" 6 226169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 227132718Skan (and (eq_attr "type" "str") 228132718Skan (eq_attr "memory" "load,both,store"))) 229132718Skan "athlon-vector,athlon-load,athlon-ieu0*6") 230117395Skan 231132718Skan(define_insn_reservation "athlon_idirect" 1 232169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 233132718Skan (and (eq_attr "athlon_decode" "direct") 234132718Skan (and (eq_attr "unit" "integer,unknown") 235132718Skan (eq_attr "memory" "none,unknown")))) 236132718Skan "athlon-direct,athlon-ieu") 237132718Skan(define_insn_reservation "athlon_ivector" 2 238169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 239132718Skan (and (eq_attr "athlon_decode" "vector") 240132718Skan (and (eq_attr "unit" "integer,unknown") 241132718Skan (eq_attr "memory" "none,unknown")))) 242132718Skan "athlon-vector,athlon-ieu,athlon-ieu") 243132718Skan(define_insn_reservation "athlon_idirect_loadmov" 3 244169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 245132718Skan (and (eq_attr "type" "imov") 246132718Skan (eq_attr "memory" "load"))) 247132718Skan "athlon-direct,athlon-load") 248132718Skan(define_insn_reservation "athlon_idirect_load" 4 249169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 250132718Skan (and (eq_attr "athlon_decode" "direct") 251132718Skan (and (eq_attr "unit" "integer,unknown") 252132718Skan (eq_attr "memory" "load")))) 253132718Skan "athlon-direct,athlon-load,athlon-ieu") 254132718Skan(define_insn_reservation "athlon_ivector_load" 6 255169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 256132718Skan (and (eq_attr "athlon_decode" "vector") 257132718Skan (and (eq_attr "unit" "integer,unknown") 258132718Skan (eq_attr "memory" "load")))) 259132718Skan "athlon-vector,athlon-load,athlon-ieu,athlon-ieu") 260132718Skan(define_insn_reservation "athlon_idirect_movstore" 1 261169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 262132718Skan (and (eq_attr "type" "imov") 263132718Skan (eq_attr "memory" "store"))) 264132718Skan "athlon-direct,athlon-agu,athlon-store") 265132718Skan(define_insn_reservation "athlon_idirect_both" 4 266169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 267132718Skan (and (eq_attr "athlon_decode" "direct") 268132718Skan (and (eq_attr "unit" "integer,unknown") 269132718Skan (eq_attr "memory" "both")))) 270132718Skan "athlon-direct,athlon-load, 271132718Skan athlon-ieu,athlon-store, 272132718Skan athlon-store") 273132718Skan(define_insn_reservation "athlon_ivector_both" 6 274169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 275132718Skan (and (eq_attr "athlon_decode" "vector") 276132718Skan (and (eq_attr "unit" "integer,unknown") 277132718Skan (eq_attr "memory" "both")))) 278132718Skan "athlon-vector,athlon-load, 279132718Skan athlon-ieu, 280132718Skan athlon-ieu, 281132718Skan athlon-store") 282132718Skan(define_insn_reservation "athlon_idirect_store" 1 283169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 284132718Skan (and (eq_attr "athlon_decode" "direct") 285132718Skan (and (eq_attr "unit" "integer,unknown") 286132718Skan (eq_attr "memory" "store")))) 287132718Skan "athlon-direct,(athlon-ieu+athlon-agu), 288132718Skan athlon-store") 289132718Skan(define_insn_reservation "athlon_ivector_store" 2 290169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 291132718Skan (and (eq_attr "athlon_decode" "vector") 292132718Skan (and (eq_attr "unit" "integer,unknown") 293132718Skan (eq_attr "memory" "store")))) 294132718Skan "athlon-vector,(athlon-ieu+athlon-agu),athlon-ieu, 295132718Skan athlon-store") 296117395Skan 297132718Skan;; Athlon floatin point unit 298132718Skan(define_insn_reservation "athlon_fldxf" 12 299132718Skan (and (eq_attr "cpu" "athlon") 300132718Skan (and (eq_attr "type" "fmov") 301132718Skan (and (eq_attr "memory" "load") 302132718Skan (eq_attr "mode" "XF")))) 303132718Skan "athlon-vector,athlon-fpload2,athlon-fvector*9") 304132718Skan(define_insn_reservation "athlon_fldxf_k8" 13 305169689Skan (and (eq_attr "cpu" "k8,generic64") 306132718Skan (and (eq_attr "type" "fmov") 307132718Skan (and (eq_attr "memory" "load") 308132718Skan (eq_attr "mode" "XF")))) 309132718Skan "athlon-vector,athlon-fpload2k8,athlon-fvector*9") 310132718Skan;; Assume superforwarding to take place so effective latency of fany op is 0. 311132718Skan(define_insn_reservation "athlon_fld" 0 312132718Skan (and (eq_attr "cpu" "athlon") 313132718Skan (and (eq_attr "type" "fmov") 314132718Skan (eq_attr "memory" "load"))) 315132718Skan "athlon-direct,athlon-fpload,athlon-fany") 316132718Skan(define_insn_reservation "athlon_fld_k8" 2 317169689Skan (and (eq_attr "cpu" "k8,generic64") 318132718Skan (and (eq_attr "type" "fmov") 319132718Skan (eq_attr "memory" "load"))) 320132718Skan "athlon-direct,athlon-fploadk8,athlon-fstore") 321117395Skan 322132718Skan(define_insn_reservation "athlon_fstxf" 10 323132718Skan (and (eq_attr "cpu" "athlon") 324132718Skan (and (eq_attr "type" "fmov") 325132718Skan (and (eq_attr "memory" "store,both") 326132718Skan (eq_attr "mode" "XF")))) 327132718Skan "athlon-vector,(athlon-fpsched+athlon-agu),(athlon-store2+(athlon-fvector*7))") 328132718Skan(define_insn_reservation "athlon_fstxf_k8" 8 329169689Skan (and (eq_attr "cpu" "k8,generic64") 330132718Skan (and (eq_attr "type" "fmov") 331132718Skan (and (eq_attr "memory" "store,both") 332132718Skan (eq_attr "mode" "XF")))) 333132718Skan "athlon-vector,(athlon-fpsched+athlon-agu),(athlon-store2+(athlon-fvector*6))") 334132718Skan(define_insn_reservation "athlon_fst" 4 335132718Skan (and (eq_attr "cpu" "athlon") 336132718Skan (and (eq_attr "type" "fmov") 337132718Skan (eq_attr "memory" "store,both"))) 338132718Skan "athlon-direct,(athlon-fpsched+athlon-agu),(athlon-fstore+athlon-store)") 339132718Skan(define_insn_reservation "athlon_fst_k8" 2 340169689Skan (and (eq_attr "cpu" "k8,generic64") 341132718Skan (and (eq_attr "type" "fmov") 342132718Skan (eq_attr "memory" "store,both"))) 343132718Skan "athlon-direct,(athlon-fpsched+athlon-agu),(athlon-fstore+athlon-store)") 344132718Skan(define_insn_reservation "athlon_fist" 4 345169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 346169689Skan (eq_attr "type" "fistp,fisttp")) 347132718Skan "athlon-direct,(athlon-fpsched+athlon-agu),(athlon-fstore+athlon-store)") 348132718Skan(define_insn_reservation "athlon_fmov" 2 349169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 350132718Skan (eq_attr "type" "fmov")) 351132718Skan "athlon-direct,athlon-fpsched,athlon-faddmul") 352132718Skan(define_insn_reservation "athlon_fadd_load" 4 353132718Skan (and (eq_attr "cpu" "athlon") 354132718Skan (and (eq_attr "type" "fop") 355132718Skan (eq_attr "memory" "load"))) 356132718Skan "athlon-direct,athlon-fpload,athlon-fadd") 357132718Skan(define_insn_reservation "athlon_fadd_load_k8" 6 358169689Skan (and (eq_attr "cpu" "k8,generic64") 359132718Skan (and (eq_attr "type" "fop") 360132718Skan (eq_attr "memory" "load"))) 361132718Skan "athlon-direct,athlon-fploadk8,athlon-fadd") 362132718Skan(define_insn_reservation "athlon_fadd" 4 363169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 364132718Skan (eq_attr "type" "fop")) 365132718Skan "athlon-direct,athlon-fpsched,athlon-fadd") 366132718Skan(define_insn_reservation "athlon_fmul_load" 4 367132718Skan (and (eq_attr "cpu" "athlon") 368132718Skan (and (eq_attr "type" "fmul") 369132718Skan (eq_attr "memory" "load"))) 370132718Skan "athlon-direct,athlon-fpload,athlon-fmul") 371132718Skan(define_insn_reservation "athlon_fmul_load_k8" 6 372169689Skan (and (eq_attr "cpu" "k8,generic64") 373132718Skan (and (eq_attr "type" "fmul") 374132718Skan (eq_attr "memory" "load"))) 375132718Skan "athlon-direct,athlon-fploadk8,athlon-fmul") 376132718Skan(define_insn_reservation "athlon_fmul" 4 377169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 378132718Skan (eq_attr "type" "fmul")) 379132718Skan "athlon-direct,athlon-fpsched,athlon-fmul") 380132718Skan(define_insn_reservation "athlon_fsgn" 2 381169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 382132718Skan (eq_attr "type" "fsgn")) 383132718Skan "athlon-direct,athlon-fpsched,athlon-fmul") 384132718Skan(define_insn_reservation "athlon_fdiv_load" 24 385132718Skan (and (eq_attr "cpu" "athlon") 386132718Skan (and (eq_attr "type" "fdiv") 387132718Skan (eq_attr "memory" "load"))) 388132718Skan "athlon-direct,athlon-fpload,athlon-fmul") 389132718Skan(define_insn_reservation "athlon_fdiv_load_k8" 13 390169689Skan (and (eq_attr "cpu" "k8,generic64") 391132718Skan (and (eq_attr "type" "fdiv") 392132718Skan (eq_attr "memory" "load"))) 393132718Skan "athlon-direct,athlon-fploadk8,athlon-fmul") 394132718Skan(define_insn_reservation "athlon_fdiv" 24 395132718Skan (and (eq_attr "cpu" "athlon") 396132718Skan (eq_attr "type" "fdiv")) 397132718Skan "athlon-direct,athlon-fpsched,athlon-fmul") 398132718Skan(define_insn_reservation "athlon_fdiv_k8" 11 399169689Skan (and (eq_attr "cpu" "k8,generic64") 400132718Skan (eq_attr "type" "fdiv")) 401132718Skan "athlon-direct,athlon-fpsched,athlon-fmul") 402132718Skan(define_insn_reservation "athlon_fpspc_load" 103 403169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 404132718Skan (and (eq_attr "type" "fpspc") 405132718Skan (eq_attr "memory" "load"))) 406132718Skan "athlon-vector,athlon-fpload,athlon-fvector") 407132718Skan(define_insn_reservation "athlon_fpspc" 100 408169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 409132718Skan (eq_attr "type" "fpspc")) 410132718Skan "athlon-vector,athlon-fpsched,athlon-fvector") 411132718Skan(define_insn_reservation "athlon_fcmov_load" 7 412132718Skan (and (eq_attr "cpu" "athlon") 413132718Skan (and (eq_attr "type" "fcmov") 414132718Skan (eq_attr "memory" "load"))) 415132718Skan "athlon-vector,athlon-fpload,athlon-fvector") 416132718Skan(define_insn_reservation "athlon_fcmov" 7 417132718Skan (and (eq_attr "cpu" "athlon") 418132718Skan (eq_attr "type" "fcmov")) 419132718Skan "athlon-vector,athlon-fpsched,athlon-fvector") 420132718Skan(define_insn_reservation "athlon_fcmov_load_k8" 17 421169689Skan (and (eq_attr "cpu" "k8,generic64") 422132718Skan (and (eq_attr "type" "fcmov") 423132718Skan (eq_attr "memory" "load"))) 424132718Skan "athlon-vector,athlon-fploadk8,athlon-fvector") 425132718Skan(define_insn_reservation "athlon_fcmov_k8" 15 426169689Skan (and (eq_attr "cpu" "k8,generic64") 427132718Skan (eq_attr "type" "fcmov")) 428132718Skan "athlon-vector,athlon-fpsched,athlon-fvector") 429132718Skan;; fcomi is vector decoded by uses only one pipe. 430132718Skan(define_insn_reservation "athlon_fcomi_load" 3 431132718Skan (and (eq_attr "cpu" "athlon") 432132718Skan (and (eq_attr "type" "fcmp") 433132718Skan (and (eq_attr "athlon_decode" "vector") 434132718Skan (eq_attr "memory" "load")))) 435132718Skan "athlon-vector,athlon-fpload,athlon-fadd") 436132718Skan(define_insn_reservation "athlon_fcomi_load_k8" 5 437169689Skan (and (eq_attr "cpu" "k8,generic64") 438132718Skan (and (eq_attr "type" "fcmp") 439132718Skan (and (eq_attr "athlon_decode" "vector") 440132718Skan (eq_attr "memory" "load")))) 441132718Skan "athlon-vector,athlon-fploadk8,athlon-fadd") 442132718Skan(define_insn_reservation "athlon_fcomi" 3 443169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 444132718Skan (and (eq_attr "athlon_decode" "vector") 445132718Skan (eq_attr "type" "fcmp"))) 446132718Skan "athlon-vector,athlon-fpsched,athlon-fadd") 447132718Skan(define_insn_reservation "athlon_fcom_load" 2 448132718Skan (and (eq_attr "cpu" "athlon") 449132718Skan (and (eq_attr "type" "fcmp") 450132718Skan (eq_attr "memory" "load"))) 451132718Skan "athlon-direct,athlon-fpload,athlon-fadd") 452132718Skan(define_insn_reservation "athlon_fcom_load_k8" 4 453169689Skan (and (eq_attr "cpu" "k8,generic64") 454132718Skan (and (eq_attr "type" "fcmp") 455132718Skan (eq_attr "memory" "load"))) 456132718Skan "athlon-direct,athlon-fploadk8,athlon-fadd") 457132718Skan(define_insn_reservation "athlon_fcom" 2 458169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 459132718Skan (eq_attr "type" "fcmp")) 460132718Skan "athlon-direct,athlon-fpsched,athlon-fadd") 461132718Skan;; Never seen by the scheduler because we still don't do post reg-stack 462132718Skan;; scheduling. 463132718Skan;(define_insn_reservation "athlon_fxch" 2 464169689Skan; (and (eq_attr "cpu" "athlon,k8,generic64") 465132718Skan; (eq_attr "type" "fxch")) 466132718Skan; "athlon-direct,athlon-fpsched,athlon-fany") 467117395Skan 468132718Skan;; Athlon handle MMX operations in the FPU unit with shorter latencies 469117395Skan 470132718Skan(define_insn_reservation "athlon_movlpd_load" 0 471132718Skan (and (eq_attr "cpu" "athlon") 472132718Skan (and (eq_attr "type" "ssemov") 473132718Skan (match_operand:DF 1 "memory_operand" ""))) 474132718Skan "athlon-direct,athlon-fpload,athlon-fany") 475132718Skan(define_insn_reservation "athlon_movlpd_load_k8" 2 476132718Skan (and (eq_attr "cpu" "k8") 477132718Skan (and (eq_attr "type" "ssemov") 478132718Skan (match_operand:DF 1 "memory_operand" ""))) 479132718Skan "athlon-direct,athlon-fploadk8,athlon-fstore") 480169689Skan(define_insn_reservation "athlon_movsd_load_generic64" 2 481169689Skan (and (eq_attr "cpu" "generic64") 482169689Skan (and (eq_attr "type" "ssemov") 483169689Skan (match_operand:DF 1 "memory_operand" ""))) 484169689Skan "athlon-double,athlon-fploadk8,(athlon-fstore+athlon-fmul)") 485132718Skan(define_insn_reservation "athlon_movaps_load_k8" 2 486169689Skan (and (eq_attr "cpu" "k8,generic64") 487132718Skan (and (eq_attr "type" "ssemov") 488132718Skan (and (eq_attr "mode" "V4SF,V2DF,TI") 489132718Skan (eq_attr "memory" "load")))) 490132718Skan "athlon-double,athlon-fpload2k8,athlon-fstore,athlon-fstore") 491132718Skan(define_insn_reservation "athlon_movaps_load" 0 492132718Skan (and (eq_attr "cpu" "athlon") 493132718Skan (and (eq_attr "type" "ssemov") 494132718Skan (and (eq_attr "mode" "V4SF,V2DF,TI") 495132718Skan (eq_attr "memory" "load")))) 496132718Skan "athlon-vector,athlon-fpload2,(athlon-fany+athlon-fany)") 497132718Skan(define_insn_reservation "athlon_movss_load" 1 498132718Skan (and (eq_attr "cpu" "athlon") 499132718Skan (and (eq_attr "type" "ssemov") 500132718Skan (and (eq_attr "mode" "SF,DI") 501132718Skan (eq_attr "memory" "load")))) 502132718Skan "athlon-vector,athlon-fpload,(athlon-fany*2)") 503132718Skan(define_insn_reservation "athlon_movss_load_k8" 1 504169689Skan (and (eq_attr "cpu" "k8,generic64") 505132718Skan (and (eq_attr "type" "ssemov") 506132718Skan (and (eq_attr "mode" "SF,DI") 507132718Skan (eq_attr "memory" "load")))) 508132718Skan "athlon-double,athlon-fploadk8,(athlon-fstore+athlon-fany)") 509132718Skan(define_insn_reservation "athlon_mmxsseld" 0 510132718Skan (and (eq_attr "cpu" "athlon") 511132718Skan (and (eq_attr "type" "mmxmov,ssemov") 512132718Skan (eq_attr "memory" "load"))) 513132718Skan "athlon-direct,athlon-fpload,athlon-fany") 514132718Skan(define_insn_reservation "athlon_mmxsseld_k8" 2 515169689Skan (and (eq_attr "cpu" "k8,generic64") 516132718Skan (and (eq_attr "type" "mmxmov,ssemov") 517132718Skan (eq_attr "memory" "load"))) 518132718Skan "athlon-direct,athlon-fploadk8,athlon-fstore") 519132718Skan(define_insn_reservation "athlon_mmxssest" 3 520169689Skan (and (eq_attr "cpu" "k8,generic64") 521132718Skan (and (eq_attr "type" "mmxmov,ssemov") 522132718Skan (and (eq_attr "mode" "V4SF,V2DF,TI") 523132718Skan (eq_attr "memory" "store,both")))) 524132718Skan "athlon-vector,(athlon-fpsched+athlon-agu),((athlon-fstore+athlon-store2)*2)") 525132718Skan(define_insn_reservation "athlon_mmxssest_k8" 3 526169689Skan (and (eq_attr "cpu" "k8,generic64") 527132718Skan (and (eq_attr "type" "mmxmov,ssemov") 528132718Skan (and (eq_attr "mode" "V4SF,V2DF,TI") 529132718Skan (eq_attr "memory" "store,both")))) 530132718Skan "athlon-double,(athlon-fpsched+athlon-agu),((athlon-fstore+athlon-store2)*2)") 531132718Skan(define_insn_reservation "athlon_mmxssest_short" 2 532169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 533132718Skan (and (eq_attr "type" "mmxmov,ssemov") 534132718Skan (eq_attr "memory" "store,both"))) 535132718Skan "athlon-direct,(athlon-fpsched+athlon-agu),(athlon-fstore+athlon-store)") 536169689Skan(define_insn_reservation "athlon_movaps_k8" 2 537169689Skan (and (eq_attr "cpu" "k8,generic64") 538132718Skan (and (eq_attr "type" "ssemov") 539132718Skan (eq_attr "mode" "V4SF,V2DF,TI"))) 540169689Skan "athlon-double,athlon-fpsched,((athlon-faddmul+athlon-faddmul) | (athlon-faddmul, athlon-faddmul))") 541169689Skan(define_insn_reservation "athlon_movaps" 2 542132718Skan (and (eq_attr "cpu" "athlon") 543132718Skan (and (eq_attr "type" "ssemov") 544132718Skan (eq_attr "mode" "V4SF,V2DF,TI"))) 545132718Skan "athlon-vector,athlon-fpsched,(athlon-faddmul+athlon-faddmul)") 546132718Skan(define_insn_reservation "athlon_mmxssemov" 2 547169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 548132718Skan (eq_attr "type" "mmxmov,ssemov")) 549132718Skan "athlon-direct,athlon-fpsched,athlon-faddmul") 550132718Skan(define_insn_reservation "athlon_mmxmul_load" 4 551169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 552132718Skan (and (eq_attr "type" "mmxmul") 553132718Skan (eq_attr "memory" "load"))) 554132718Skan "athlon-direct,athlon-fpload,athlon-fmul") 555132718Skan(define_insn_reservation "athlon_mmxmul" 3 556169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 557132718Skan (eq_attr "type" "mmxmul")) 558132718Skan "athlon-direct,athlon-fpsched,athlon-fmul") 559132718Skan(define_insn_reservation "athlon_mmx_load" 3 560169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 561132718Skan (and (eq_attr "unit" "mmx") 562132718Skan (eq_attr "memory" "load"))) 563132718Skan "athlon-direct,athlon-fpload,athlon-faddmul") 564132718Skan(define_insn_reservation "athlon_mmx" 2 565169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 566132718Skan (eq_attr "unit" "mmx")) 567132718Skan "athlon-direct,athlon-fpsched,athlon-faddmul") 568132718Skan;; SSE operations are handled by the i387 unit as well. The latency 569132718Skan;; is same as for i387 operations for scalar operations 570117395Skan 571132718Skan(define_insn_reservation "athlon_sselog_load" 3 572132718Skan (and (eq_attr "cpu" "athlon") 573169689Skan (and (eq_attr "type" "sselog,sselog1") 574132718Skan (eq_attr "memory" "load"))) 575132718Skan "athlon-vector,athlon-fpload2,(athlon-fmul*2)") 576132718Skan(define_insn_reservation "athlon_sselog_load_k8" 5 577169689Skan (and (eq_attr "cpu" "k8,generic64") 578169689Skan (and (eq_attr "type" "sselog,sselog1") 579132718Skan (eq_attr "memory" "load"))) 580132718Skan "athlon-double,athlon-fpload2k8,(athlon-fmul*2)") 581132718Skan(define_insn_reservation "athlon_sselog" 3 582132718Skan (and (eq_attr "cpu" "athlon") 583169689Skan (eq_attr "type" "sselog,sselog1")) 584132718Skan "athlon-vector,athlon-fpsched,athlon-fmul*2") 585132718Skan(define_insn_reservation "athlon_sselog_k8" 3 586169689Skan (and (eq_attr "cpu" "k8,generic64") 587169689Skan (eq_attr "type" "sselog,sselog1")) 588132718Skan "athlon-double,athlon-fpsched,athlon-fmul") 589169689Skan;; ??? pcmp executes in addmul, probably not worthwhile to bother about that. 590132718Skan(define_insn_reservation "athlon_ssecmp_load" 2 591132718Skan (and (eq_attr "cpu" "athlon") 592132718Skan (and (eq_attr "type" "ssecmp") 593132718Skan (and (eq_attr "mode" "SF,DF,DI") 594132718Skan (eq_attr "memory" "load")))) 595132718Skan "athlon-direct,athlon-fpload,athlon-fadd") 596132718Skan(define_insn_reservation "athlon_ssecmp_load_k8" 4 597169689Skan (and (eq_attr "cpu" "k8,generic64") 598132718Skan (and (eq_attr "type" "ssecmp") 599132718Skan (and (eq_attr "mode" "SF,DF,DI,TI") 600132718Skan (eq_attr "memory" "load")))) 601132718Skan "athlon-direct,athlon-fploadk8,athlon-fadd") 602132718Skan(define_insn_reservation "athlon_ssecmp" 2 603169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 604132718Skan (and (eq_attr "type" "ssecmp") 605132718Skan (eq_attr "mode" "SF,DF,DI,TI"))) 606132718Skan "athlon-direct,athlon-fpsched,athlon-fadd") 607132718Skan(define_insn_reservation "athlon_ssecmpvector_load" 3 608132718Skan (and (eq_attr "cpu" "athlon") 609132718Skan (and (eq_attr "type" "ssecmp") 610132718Skan (eq_attr "memory" "load"))) 611132718Skan "athlon-vector,athlon-fpload2,(athlon-fadd*2)") 612132718Skan(define_insn_reservation "athlon_ssecmpvector_load_k8" 5 613169689Skan (and (eq_attr "cpu" "k8,generic64") 614132718Skan (and (eq_attr "type" "ssecmp") 615132718Skan (eq_attr "memory" "load"))) 616132718Skan "athlon-double,athlon-fpload2k8,(athlon-fadd*2)") 617132718Skan(define_insn_reservation "athlon_ssecmpvector" 3 618132718Skan (and (eq_attr "cpu" "athlon") 619132718Skan (eq_attr "type" "ssecmp")) 620132718Skan "athlon-vector,athlon-fpsched,(athlon-fadd*2)") 621132718Skan(define_insn_reservation "athlon_ssecmpvector_k8" 3 622169689Skan (and (eq_attr "cpu" "k8,generic64") 623132718Skan (eq_attr "type" "ssecmp")) 624132718Skan "athlon-double,athlon-fpsched,(athlon-fadd*2)") 625132718Skan(define_insn_reservation "athlon_ssecomi_load" 4 626132718Skan (and (eq_attr "cpu" "athlon") 627132718Skan (and (eq_attr "type" "ssecomi") 628132718Skan (eq_attr "memory" "load"))) 629132718Skan "athlon-vector,athlon-fpload,athlon-fadd") 630132718Skan(define_insn_reservation "athlon_ssecomi_load_k8" 6 631169689Skan (and (eq_attr "cpu" "k8,generic64") 632132718Skan (and (eq_attr "type" "ssecomi") 633132718Skan (eq_attr "memory" "load"))) 634132718Skan "athlon-vector,athlon-fploadk8,athlon-fadd") 635132718Skan(define_insn_reservation "athlon_ssecomi" 4 636169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 637132718Skan (eq_attr "type" "ssecmp")) 638132718Skan "athlon-vector,athlon-fpsched,athlon-fadd") 639132718Skan(define_insn_reservation "athlon_sseadd_load" 4 640132718Skan (and (eq_attr "cpu" "athlon") 641132718Skan (and (eq_attr "type" "sseadd") 642132718Skan (and (eq_attr "mode" "SF,DF,DI") 643132718Skan (eq_attr "memory" "load")))) 644132718Skan "athlon-direct,athlon-fpload,athlon-fadd") 645132718Skan(define_insn_reservation "athlon_sseadd_load_k8" 6 646169689Skan (and (eq_attr "cpu" "k8,generic64") 647132718Skan (and (eq_attr "type" "sseadd") 648132718Skan (and (eq_attr "mode" "SF,DF,DI") 649132718Skan (eq_attr "memory" "load")))) 650132718Skan "athlon-direct,athlon-fploadk8,athlon-fadd") 651132718Skan(define_insn_reservation "athlon_sseadd" 4 652169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 653132718Skan (and (eq_attr "type" "sseadd") 654132718Skan (eq_attr "mode" "SF,DF,DI"))) 655132718Skan "athlon-direct,athlon-fpsched,athlon-fadd") 656132718Skan(define_insn_reservation "athlon_sseaddvector_load" 5 657132718Skan (and (eq_attr "cpu" "athlon") 658132718Skan (and (eq_attr "type" "sseadd") 659132718Skan (eq_attr "memory" "load"))) 660132718Skan "athlon-vector,athlon-fpload2,(athlon-fadd*2)") 661132718Skan(define_insn_reservation "athlon_sseaddvector_load_k8" 7 662169689Skan (and (eq_attr "cpu" "k8,generic64") 663132718Skan (and (eq_attr "type" "sseadd") 664132718Skan (eq_attr "memory" "load"))) 665132718Skan "athlon-double,athlon-fpload2k8,(athlon-fadd*2)") 666132718Skan(define_insn_reservation "athlon_sseaddvector" 5 667132718Skan (and (eq_attr "cpu" "athlon") 668132718Skan (eq_attr "type" "sseadd")) 669132718Skan "athlon-vector,athlon-fpsched,(athlon-fadd*2)") 670132718Skan(define_insn_reservation "athlon_sseaddvector_k8" 5 671169689Skan (and (eq_attr "cpu" "k8,generic64") 672132718Skan (eq_attr "type" "sseadd")) 673132718Skan "athlon-double,athlon-fpsched,(athlon-fadd*2)") 674117395Skan 675132718Skan;; Conversions behaves very irregularly and the scheduling is critical here. 676132718Skan;; Take each instruction separately. Assume that the mode is always set to the 677132718Skan;; destination one and athlon_decode is set to the K8 versions. 678117395Skan 679132718Skan;; cvtss2sd 680132718Skan(define_insn_reservation "athlon_ssecvt_cvtss2sd_load_k8" 4 681169689Skan (and (eq_attr "cpu" "k8,athlon,generic64") 682132718Skan (and (eq_attr "type" "ssecvt") 683132718Skan (and (eq_attr "athlon_decode" "direct") 684132718Skan (and (eq_attr "mode" "DF") 685132718Skan (eq_attr "memory" "load"))))) 686132718Skan "athlon-direct,athlon-fploadk8,athlon-fstore") 687132718Skan(define_insn_reservation "athlon_ssecvt_cvtss2sd" 2 688169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 689132718Skan (and (eq_attr "type" "ssecvt") 690132718Skan (and (eq_attr "athlon_decode" "direct") 691132718Skan (eq_attr "mode" "DF")))) 692132718Skan "athlon-direct,athlon-fpsched,athlon-fstore") 693132718Skan;; cvtps2pd. Model same way the other double decoded FP conversions. 694132718Skan(define_insn_reservation "athlon_ssecvt_cvtps2pd_load_k8" 5 695169689Skan (and (eq_attr "cpu" "k8,athlon,generic64") 696132718Skan (and (eq_attr "type" "ssecvt") 697132718Skan (and (eq_attr "athlon_decode" "double") 698132718Skan (and (eq_attr "mode" "V2DF,V4SF,TI") 699132718Skan (eq_attr "memory" "load"))))) 700132718Skan "athlon-double,athlon-fpload2k8,(athlon-fstore*2)") 701132718Skan(define_insn_reservation "athlon_ssecvt_cvtps2pd_k8" 3 702169689Skan (and (eq_attr "cpu" "k8,athlon,generic64") 703132718Skan (and (eq_attr "type" "ssecvt") 704132718Skan (and (eq_attr "athlon_decode" "double") 705132718Skan (eq_attr "mode" "V2DF,V4SF,TI")))) 706132718Skan "athlon-double,athlon-fpsched,athlon-fstore,athlon-fstore") 707132718Skan;; cvtsi2sd mem,reg is directpath path (cvtsi2sd reg,reg is doublepath) 708132718Skan;; cvtsi2sd has troughput 1 and is executed in store unit with latency of 6 709132718Skan(define_insn_reservation "athlon_sseicvt_cvtsi2sd_load" 6 710132718Skan (and (eq_attr "cpu" "athlon,k8") 711132718Skan (and (eq_attr "type" "sseicvt") 712132718Skan (and (eq_attr "athlon_decode" "direct") 713132718Skan (and (eq_attr "mode" "SF,DF") 714132718Skan (eq_attr "memory" "load"))))) 715132718Skan "athlon-direct,athlon-fploadk8,athlon-fstore") 716132718Skan;; cvtsi2ss mem, reg is doublepath 717132718Skan(define_insn_reservation "athlon_sseicvt_cvtsi2ss_load" 9 718132718Skan (and (eq_attr "cpu" "athlon") 719132718Skan (and (eq_attr "type" "sseicvt") 720132718Skan (and (eq_attr "athlon_decode" "double") 721132718Skan (and (eq_attr "mode" "SF,DF") 722132718Skan (eq_attr "memory" "load"))))) 723132718Skan "athlon-vector,athlon-fpload,(athlon-fstore*2)") 724132718Skan(define_insn_reservation "athlon_sseicvt_cvtsi2ss_load_k8" 9 725169689Skan (and (eq_attr "cpu" "k8,generic64") 726132718Skan (and (eq_attr "type" "sseicvt") 727132718Skan (and (eq_attr "athlon_decode" "double") 728132718Skan (and (eq_attr "mode" "SF,DF") 729132718Skan (eq_attr "memory" "load"))))) 730132718Skan "athlon-double,athlon-fploadk8,(athlon-fstore*2)") 731132718Skan;; cvtsi2sd reg,reg is double decoded (vector on Athlon) 732132718Skan(define_insn_reservation "athlon_sseicvt_cvtsi2sd_k8" 11 733169689Skan (and (eq_attr "cpu" "k8,athlon,generic64") 734132718Skan (and (eq_attr "type" "sseicvt") 735132718Skan (and (eq_attr "athlon_decode" "double") 736132718Skan (and (eq_attr "mode" "SF,DF") 737132718Skan (eq_attr "memory" "none"))))) 738132718Skan "athlon-double,athlon-fploadk8,athlon-fstore") 739132718Skan;; cvtsi2ss reg, reg is doublepath 740132718Skan(define_insn_reservation "athlon_sseicvt_cvtsi2ss" 14 741169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 742132718Skan (and (eq_attr "type" "sseicvt") 743132718Skan (and (eq_attr "athlon_decode" "vector") 744132718Skan (and (eq_attr "mode" "SF,DF") 745132718Skan (eq_attr "memory" "none"))))) 746132718Skan "athlon-vector,athlon-fploadk8,(athlon-fvector*2)") 747132718Skan;; cvtsd2ss mem,reg is doublepath, troughput unknown, latency 9 748132718Skan(define_insn_reservation "athlon_ssecvt_cvtsd2ss_load_k8" 9 749169689Skan (and (eq_attr "cpu" "k8,athlon,generic64") 750132718Skan (and (eq_attr "type" "ssecvt") 751132718Skan (and (eq_attr "athlon_decode" "double") 752132718Skan (and (eq_attr "mode" "SF") 753132718Skan (eq_attr "memory" "load"))))) 754132718Skan "athlon-double,athlon-fploadk8,(athlon-fstore*3)") 755132718Skan;; cvtsd2ss reg,reg is vectorpath, troughput unknown, latency 12 756132718Skan(define_insn_reservation "athlon_ssecvt_cvtsd2ss" 12 757169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 758132718Skan (and (eq_attr "type" "ssecvt") 759132718Skan (and (eq_attr "athlon_decode" "vector") 760132718Skan (and (eq_attr "mode" "SF") 761132718Skan (eq_attr "memory" "none"))))) 762132718Skan "athlon-vector,athlon-fpsched,(athlon-fvector*3)") 763132718Skan(define_insn_reservation "athlon_ssecvt_cvtpd2ps_load_k8" 8 764169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 765132718Skan (and (eq_attr "type" "ssecvt") 766132718Skan (and (eq_attr "athlon_decode" "vector") 767132718Skan (and (eq_attr "mode" "V4SF,V2DF,TI") 768132718Skan (eq_attr "memory" "load"))))) 769132718Skan "athlon-double,athlon-fpload2k8,(athlon-fstore*3)") 770132718Skan;; cvtpd2ps mem,reg is vectorpath, troughput unknown, latency 10 771132718Skan;; ??? Why it is fater than cvtsd2ss? 772132718Skan(define_insn_reservation "athlon_ssecvt_cvtpd2ps" 8 773169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 774132718Skan (and (eq_attr "type" "ssecvt") 775132718Skan (and (eq_attr "athlon_decode" "vector") 776132718Skan (and (eq_attr "mode" "V4SF,V2DF,TI") 777132718Skan (eq_attr "memory" "none"))))) 778132718Skan "athlon-vector,athlon-fpsched,athlon-fvector*2") 779132718Skan;; cvtsd2si mem,reg is doublepath, troughput 1, latency 9 780132718Skan(define_insn_reservation "athlon_secvt_cvtsX2si_load" 9 781169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 782132718Skan (and (eq_attr "type" "sseicvt") 783132718Skan (and (eq_attr "athlon_decode" "vector") 784132718Skan (and (eq_attr "mode" "SI,DI") 785132718Skan (eq_attr "memory" "load"))))) 786132718Skan "athlon-vector,athlon-fploadk8,athlon-fvector") 787132718Skan;; cvtsd2si reg,reg is doublepath, troughput 1, latency 9 788132718Skan(define_insn_reservation "athlon_ssecvt_cvtsX2si" 9 789132718Skan (and (eq_attr "cpu" "athlon") 790132718Skan (and (eq_attr "type" "sseicvt") 791132718Skan (and (eq_attr "athlon_decode" "double") 792132718Skan (and (eq_attr "mode" "SI,DI") 793132718Skan (eq_attr "memory" "none"))))) 794132718Skan "athlon-vector,athlon-fpsched,athlon-fvector") 795132718Skan(define_insn_reservation "athlon_ssecvt_cvtsX2si_k8" 9 796169689Skan (and (eq_attr "cpu" "k8,generic64") 797132718Skan (and (eq_attr "type" "sseicvt") 798132718Skan (and (eq_attr "athlon_decode" "double") 799132718Skan (and (eq_attr "mode" "SI,DI") 800132718Skan (eq_attr "memory" "none"))))) 801132718Skan "athlon-double,athlon-fpsched,athlon-fstore") 802117395Skan 803132718Skan 804132718Skan(define_insn_reservation "athlon_ssemul_load" 4 805132718Skan (and (eq_attr "cpu" "athlon") 806132718Skan (and (eq_attr "type" "ssemul") 807132718Skan (and (eq_attr "mode" "SF,DF") 808132718Skan (eq_attr "memory" "load")))) 809132718Skan "athlon-direct,athlon-fpload,athlon-fmul") 810132718Skan(define_insn_reservation "athlon_ssemul_load_k8" 6 811169689Skan (and (eq_attr "cpu" "k8,generic64") 812132718Skan (and (eq_attr "type" "ssemul") 813132718Skan (and (eq_attr "mode" "SF,DF") 814132718Skan (eq_attr "memory" "load")))) 815132718Skan "athlon-direct,athlon-fploadk8,athlon-fmul") 816132718Skan(define_insn_reservation "athlon_ssemul" 4 817169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 818132718Skan (and (eq_attr "type" "ssemul") 819132718Skan (eq_attr "mode" "SF,DF"))) 820132718Skan "athlon-direct,athlon-fpsched,athlon-fmul") 821132718Skan(define_insn_reservation "athlon_ssemulvector_load" 5 822132718Skan (and (eq_attr "cpu" "athlon") 823132718Skan (and (eq_attr "type" "ssemul") 824132718Skan (eq_attr "memory" "load"))) 825132718Skan "athlon-vector,athlon-fpload2,(athlon-fmul*2)") 826132718Skan(define_insn_reservation "athlon_ssemulvector_load_k8" 7 827169689Skan (and (eq_attr "cpu" "k8,generic64") 828132718Skan (and (eq_attr "type" "ssemul") 829132718Skan (eq_attr "memory" "load"))) 830132718Skan "athlon-double,athlon-fpload2k8,(athlon-fmul*2)") 831132718Skan(define_insn_reservation "athlon_ssemulvector" 5 832132718Skan (and (eq_attr "cpu" "athlon") 833132718Skan (eq_attr "type" "ssemul")) 834132718Skan "athlon-vector,athlon-fpsched,(athlon-fmul*2)") 835132718Skan(define_insn_reservation "athlon_ssemulvector_k8" 5 836169689Skan (and (eq_attr "cpu" "k8,generic64") 837132718Skan (eq_attr "type" "ssemul")) 838132718Skan "athlon-double,athlon-fpsched,(athlon-fmul*2)") 839132718Skan;; divsd timings. divss is faster 840132718Skan(define_insn_reservation "athlon_ssediv_load" 20 841132718Skan (and (eq_attr "cpu" "athlon") 842132718Skan (and (eq_attr "type" "ssediv") 843132718Skan (and (eq_attr "mode" "SF,DF") 844132718Skan (eq_attr "memory" "load")))) 845132718Skan "athlon-direct,athlon-fpload,athlon-fmul*17") 846132718Skan(define_insn_reservation "athlon_ssediv_load_k8" 22 847169689Skan (and (eq_attr "cpu" "k8,generic64") 848132718Skan (and (eq_attr "type" "ssediv") 849132718Skan (and (eq_attr "mode" "SF,DF") 850132718Skan (eq_attr "memory" "load")))) 851132718Skan "athlon-direct,athlon-fploadk8,athlon-fmul*17") 852132718Skan(define_insn_reservation "athlon_ssediv" 20 853169689Skan (and (eq_attr "cpu" "athlon,k8,generic64") 854132718Skan (and (eq_attr "type" "ssediv") 855132718Skan (eq_attr "mode" "SF,DF"))) 856132718Skan "athlon-direct,athlon-fpsched,athlon-fmul*17") 857132718Skan(define_insn_reservation "athlon_ssedivvector_load" 39 858132718Skan (and (eq_attr "cpu" "athlon") 859132718Skan (and (eq_attr "type" "ssediv") 860132718Skan (eq_attr "memory" "load"))) 861132718Skan "athlon-vector,athlon-fpload2,athlon-fmul*34") 862132718Skan(define_insn_reservation "athlon_ssedivvector_load_k8" 35 863169689Skan (and (eq_attr "cpu" "k8,generic64") 864132718Skan (and (eq_attr "type" "ssediv") 865132718Skan (eq_attr "memory" "load"))) 866132718Skan "athlon-double,athlon-fpload2k8,athlon-fmul*34") 867132718Skan(define_insn_reservation "athlon_ssedivvector" 39 868132718Skan (and (eq_attr "cpu" "athlon") 869132718Skan (eq_attr "type" "ssediv")) 870132718Skan "athlon-vector,athlon-fmul*34") 871132718Skan(define_insn_reservation "athlon_ssedivvector_k8" 39 872169689Skan (and (eq_attr "cpu" "k8,generic64") 873132718Skan (eq_attr "type" "ssediv")) 874132718Skan "athlon-double,athlon-fmul*34") 875