ChangeLog.gcc43 revision 259694
12007-08-08 Andrew Haley <aph@redhat.com> (r128087) 2 3 * config/arm/libunwind.S (UNWIND_WRAPPER _Unwind_Backtrace): New. 4 * config/arm/unwind-arm.h (__gnu_Unwind_Backtrace): New. 5 * config/arm/unwind-arm.c (__gnu_Unwind_Backtrace): New. 6 72007-07-12 Geoffrey Keating <geoffk@apple.com> (r126588) 8 9 * builtins.c (get_pointer_alignment): Honor DECL_ALIGN on a 10 FUNCTION_DECL. 11 * tree.c (build_decl_stat): Move code from here... 12 (make_node_stat): ... to here. Don't uselessly clear DECL_USER_ALIGN. 13 (expr_align): Honor DECL_ALIGN on a FUNCTION_DECL. Add comment 14 about using DECL_ALIGN of LABEL_DECL and CONST_DECL. 15 * tree.h (DECL_USER_ALIGN): Fix misplaced comment. 16 * varasm.c (assemble_start_function): Use DECL_ALIGN instead of 17 FUNCTION_BOUNDARY. 18 192007-07-09 Geoffrey Keating <geoffk@apple.com> (r126529) 20 21 PR 32617 22 * c-common.c (c_alignof_expr): Look at DECL_ALIGN of 23 FUNCTION_DECLs. 24 (handle_aligned_attribute): Allow use on FUNCTION_DECLs. 25 * varasm.c (assemble_start_function): Honor DECL_ALIGN 26 for FUNCTION_DECLs. Don't use align_functions_log if 27 DECL_USER_ALIGN. 28 * print-tree.c (print_node): Print DECL_ALIGN and DECL_USER_ALIGN 29 even for FUNCTION_DECLs. 30 * c-decl.c (merge_decls): Propagate DECL_ALIGN even for 31 FUNCTION_DECLs. 32 * tree.h (DECL_ALIGN): Update for new location of 'align'. 33 (DECL_FUNCTION_CODE): Update for new location and name of 34 'function_code'. 35 (DECL_OFFSET_ALIGN): Update for new location of 'off_align'. 36 (struct tree_decl_common): Move 'align' and 'off_align' out 37 of union, ensure they're still on a 32-bit boundary. Remove 38 other fields in union 'u1'. 39 (struct tree_function_decl): Add field 'function_code' replacing 40 'u1.f' in tree_decl_common. 41 * tree.c (build_decl_stat): Set initial value of DECL_ALIGN. 42 * doc/extend.texi (Function Attributes): Add 'aligned' attribute. 43 (Variable Attributes): Cross-reference 'aligned' attribute 44 to Function Attributes. 45 * flags.h (force_align_functions_log): Delete. 46 * toplev.c (force_align_functions_log): Delete. 47 482007-06-05 Joerg Wunsch <j.gnu@uriah.heep.sax.de> (r125346) 49 50 PR preprocessor/23479 51 * doc/extend.texi: Document the 0b-prefixed binary integer 52 constant extension. 53 542007-05-31 Eric Christopher <echristo@apple.com> (r125246) 55 56 * expr.c (convert_move): Assert that we don't have a BLKmode 57 operand. 58 (store_expr): Handle BLKmode moves by calling emit_block_move. 59 602007-05-27 Eric Christopher <echristo@apple.com> (r125116) 61 62 * config/rs6000/rs6000.c (rs6000_emit_prologue): Update 63 sp_offset depending on stack size. Save r12 depending 64 on registers we're saving later. 65 (rs6000_emit_epilogue): Update sp_offset depending only 66 on stack size. 67 682007-05-24 Richard Sandiford <rsandifo@nildram.co.uk> (r125037) 69 70 * postreload-gcse.c (reg_changed_after_insn_p): New function. 71 (oprs_unchanged_p): Use it to check all registers in a REG. 72 (record_opr_changes): Look for clobbers in CALL_INSN_FUNCTION_USAGE. 73 (reg_set_between_after_reload_p): Delete. 74 (reg_used_between_after_reload_p): Likewise. 75 (reg_set_or_used_since_bb_start): Likewise. 76 (eliminate_partially_redundant_load): Use reg_changed_after_insn_p 77 and reg_used_between_p instead of reg_set_or_used_since_bb_start. 78 Use reg_set_between_p instead of reg_set_between_after_reload_p. 79 * rtlanal.c (reg_set_p): Check whether REG overlaps 80 regs_invalidated_by_call, rather than just checking the 81 membership of REGNO (REG). 82 832007-05-16 Eric Christopher <echristo@apple.com> (r124763) 84 85 * config/rs6000/rs6000.c (rs6000_emit_prologue): Move altivec register 86 saving after stack push. Set sp_offset whenever we push. 87 (rs6000_emit_epilogue): Move altivec register restore before stack push. 88 892007-05-03 Ian Lance Taylor <iant@google.com> (r124381) 90 91 * config/rs6000/rs6000.c (rs6000_override_options): Don't set 92 MASK_PPC_GFXOPT for 8540 or 8548. 93 942007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124341) 95 96 * doc/invoke.texi: Fix typo, 'AMD Family 10h core' instead of 97 'AMD Family 10 core'. 98 992007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339) 100 101 * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 102 and athlon64-sse3 as improved versions of k8, opteron and athlon64 103 with SSE3 instruction set support. 104 * doc/invoke.texi: Likewise. 105 1062007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124330) 107 108 * config/i386/i386.c (override_options): Tuning 32-byte loop 109 alignment for amdfam10 architecture. Increasing the max loop 110 alignment to 24 bytes. 111 1122007-04-16 Lawrence Crowl <crowl@google.com> (r123909) 113 114 * doc/invoke.texi (Debugging Options): Add documentation for the 115 -femit-struct-debug options -femit-struct-debug-baseonly, 116 -femit-struct-debug-reduced, and 117 -femit-struct-debug-detailed[=...]. 118 119 * c-opts.c (c_common_handle_option): Add 120 OPT_femit_struct_debug_baseonly, OPT_femit_struct_debug_reduced, 121 and OPT_femit_struct_debug_detailed_. 122 * c.opt: Add specifications for 123 -femit-struct-debug-baseonly, -femit-struct-debug-reduced, 124 and -femit-struct-debug-detailed[=...]. 125 * opts.c (set_struct_debug_option): Parse the 126 -femit-struct-debug-... options. 127 * opts.c (matches_main_base, main_input_basename, 128 main_input_baselength, base_of_path, matches_main_base): Add 129 variables and functions to compare header base name to compilation 130 unit base name. 131 * opts.c (should_emit_struct_debug): Add to determine to emit a 132 structure based on the option. 133 (dump_struct_debug) Also disabled function to debug this 134 function. 135 * opts.c (handle_options): Save the base name of the 136 compilation unit. 137 138 * langhooks-def.h (LANG_HOOKS_GENERIC_TYPE_P): Define. 139 (LANG_HOOKS_FOR_TYPES_INITIALIZER): Add. 140 This hook indicates if a type is generic. Set it by default 141 to "never generic". 142 * langhooks.h (struct lang_hooks_for_types): Add a new hook 143 to determine if a struct type is generic or not. 144 * cp/cp-tree.h (class_tmpl_impl_spec_p): Declare a C++ hook. 145 * cp/tree.c (class_tmpl_impl_spec_p): Implement the C++ hook. 146 * cp/cp-lang.c (LANG_HOOKS_GENERIC_TYPE_P): Override null C hook 147 with live C++ hook. 148 149 * flags.h (enum debug_info_usage): Add an enumeration to describe 150 a program's use of a structure type. 151 * dwarf2out.c (gen_struct_or_union_type_die): Add a new parameter 152 to indicate the program's usage of the type. Filter structs based 153 on the -femit-struct-debug-... specification. 154 (gen_type_die): Split into two routines, gen_type_die and 155 gen_type_die_with_usage. gen_type_die is now a wrapper 156 that assumes direct usage. 157 (gen_type_die_with_usage): Replace calls to gen_type_die 158 with gen_type_die_with_usage adding the program usage of 159 the referenced type. 160 (dwarf2out_imported_module_or_decl): Suppress struct debug 161 information using should_emit_struct_debug when appropriate. 162 1632007-04-16 Ian Lance Taylor <iant@google.com> (r123906) 164 165 * tree-ssa-propagate.c (cfg_blocks_add): Insert blocks with fewer 166 predecessors at head rather than tail. 167 168 1692007-04-12 Richard Guenther <rguenther@suse.de> (r123736) 170 171 PR tree-optimization/24689 172 PR tree-optimization/31307 173 * fold-const.c (operand_equal_p): Compare INTEGER_CST array 174 indices by value. 175 * gimplify.c (canonicalize_addr_expr): To be consistent with 176 gimplify_compound_lval only set operands two and three of 177 ARRAY_REFs if they are not gimple_min_invariant. This makes 178 it never at this place. 179 * tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise. 180 1812007-04-07 H.J. Lu <hongjiu.lu@intel.com> (r123639) 182 183 * config/i386/i386.c (ix86_handle_option): Handle SSSE3. 184 1852007-03-28 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r123313) 186 187 * config.gcc: Accept barcelona as a variant of amdfam10. 188 * config/i386/i386.c (override_options): Likewise. 189 * doc/invoke.texi: Likewise. 190 1912007-03-12 Seongbae Park <seongbae.park@gmail.com> (r122851) 192 193 * c-decl.c (warn_variable_length_array): New function. 194 Refactored from grokdeclarator to handle warn_vla 195 and handle unnamed array case. 196 (grokdeclarator): Refactored VLA warning case. 197 * c.opt (Wvla): New flag. 198 1992007-03-11 Ian Lance Taylor <iant@google.com> (r122831 - partial) 200 201 * tree-vrp.c (vrp_int_const_binop): Handle PLUS_EXPR and 202 the *_DIV_EXPR codes correctly with overflow infinities. 203 2042007-02-09 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r121763) 205 206 * config/i386/driver-i386.c: Turn on -mtune=native for AMDFAM10. 207 (bit_SSE4a): New. 208 2092007-02-08 Harsha Jagasia <harsha.jagasia@amd.com> (r121726) 210 211 * config/i386/xmmintrin.h: Make inclusion of emmintrin.h 212 conditional to __SSE2__. 213 (Entries below should have been added to first ChangeLog 214 entry for amdfam10 dated 2007-02-05) 215 * config/i386/emmintrin.h: Generate #error if __SSE2__ is not 216 defined. 217 * config/i386/pmmintrin.h: Generate #error if __SSE3__ is not 218 defined. 219 * config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not 220 defined. 221 2222007-02-07 Jakub Jelinek <jakub@redhat.com> (r121687) 223 224 * config/i386/i386.c (override_options): Set PTA_SSSE3 for core2. 225 2262007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 227 228 * config/i386/athlon.md (athlon_fldxf_k8, athlon_fld_k8, 229 athlon_fstxf_k8, athlon_fst_k8, athlon_fist, athlon_fmov, 230 athlon_fadd_load, athlon_fadd_load_k8, athlon_fadd, athlon_fmul, 231 athlon_fmul_load, athlon_fmul_load_k8, athlon_fsgn, 232 athlon_fdiv_load, athlon_fdiv_load_k8, athlon_fdiv_k8, 233 athlon_fpspc_load, athlon_fpspc, athlon_fcmov_load, 234 athlon_fcmov_load_k8, athlon_fcmov_k8, athlon_fcomi_load_k8, 235 athlon_fcomi, athlon_fcom_load_k8, athlon_fcom): Added amdfam10. 236 2372007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 238 239 * config/i386/i386.md (x86_sahf_1, cmpfp_i_mixed, cmpfp_i_sse, 240 cmpfp_i_i387, cmpfp_iu_mixed, cmpfp_iu_sse, cmpfp_iu_387, 241 swapsi, swaphi_1, swapqi_1, swapdi_rex64, fix_truncsfdi_sse, 242 fix_truncdfdi_sse, fix_truncsfsi_sse, fix_truncdfsi_sse, 243 x86_fldcw_1, floatsisf2_mixed, floatsisf2_sse, floatdisf2_mixed, 244 floatdisf2_sse, floatsidf2_mixed, floatsidf2_sse, 245 floatdidf2_mixed, floatdidf2_sse, muldi3_1_rex64, mulsi3_1, 246 mulsi3_1_zext, mulhi3_1, mulqi3_1, umulqihi3_1, mulqihi3_insn, 247 umulditi3_insn, umulsidi3_insn, mulditi3_insn, mulsidi3_insn, 248 umuldi3_highpart_rex64, umulsi3_highpart_insn, 249 umulsi3_highpart_zext, smuldi3_highpart_rex64, 250 smulsi3_highpart_insn, smulsi3_highpart_zext, x86_64_shld, 251 x86_shld_1, x86_64_shrd, sqrtsf2_mixed, sqrtsf2_sse, 252 sqrtsf2_i387, sqrtdf2_mixed, sqrtdf2_sse, sqrtdf2_i387, 253 sqrtextendsfdf2_i387, sqrtxf2, sqrtextendsfxf2_i387, 254 sqrtextenddfxf2_i387): Added amdfam10_decode. 255 256 * config/i386/athlon.md (athlon_idirect_amdfam10, 257 athlon_ivector_amdfam10, athlon_idirect_load_amdfam10, 258 athlon_ivector_load_amdfam10, athlon_idirect_both_amdfam10, 259 athlon_ivector_both_amdfam10, athlon_idirect_store_amdfam10, 260 athlon_ivector_store_amdfam10): New define_insn_reservation. 261 (athlon_idirect_loadmov, athlon_idirect_movstore): Added 262 amdfam10. 263 2642007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 265 266 * config/i386/athlon.md (athlon_call_amdfam10, 267 athlon_pop_amdfam10, athlon_lea_amdfam10): New 268 define_insn_reservation. 269 (athlon_branch, athlon_push, athlon_leave_k8, athlon_imul_k8, 270 athlon_imul_k8_DI, athlon_imul_mem_k8, athlon_imul_mem_k8_DI, 271 athlon_idiv, athlon_idiv_mem, athlon_str): Added amdfam10. 272 2732007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 274 275 * config/i386/athlon.md (athlon_sseld_amdfam10, 276 athlon_mmxld_amdfam10, athlon_ssest_amdfam10, 277 athlon_mmxssest_short_amdfam10): New define_insn_reservation. 278 2792007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 280 281 * config/i386/athlon.md (athlon_sseins_amdfam10): New 282 define_insn_reservation. 283 * config/i386/i386.md (sseins): Added sseins to define_attr type 284 and define_attr unit. 285 * config/i386/sse.md: Set type attribute to sseins for insertq 286 and insertqi. 287 2882007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 289 290 * config/i386/athlon.md (sselog_load_amdfam10, sselog_amdfam10, 291 ssecmpvector_load_amdfam10, ssecmpvector_amdfam10, 292 ssecomi_load_amdfam10, ssecomi_amdfam10, 293 sseaddvector_load_amdfam10, sseaddvector_amdfam10): New 294 define_insn_reservation. 295 (ssecmp_load_k8, ssecmp, sseadd_load_k8, seadd): Added amdfam10. 296 2972007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 298 299 * config/i386/athlon.md (cvtss2sd_load_amdfam10, 300 cvtss2sd_amdfam10, cvtps2pd_load_amdfam10, cvtps2pd_amdfam10, 301 cvtsi2sd_load_amdfam10, cvtsi2ss_load_amdfam10, 302 cvtsi2sd_amdfam10, cvtsi2ss_amdfam10, cvtsd2ss_load_amdfam10, 303 cvtsd2ss_amdfam10, cvtpd2ps_load_amdfam10, cvtpd2ps_amdfam10, 304 cvtsX2si_load_amdfam10, cvtsX2si_amdfam10): New 305 define_insn_reservation. 306 307 * config/i386/sse.md (cvtsi2ss, cvtsi2ssq, cvtss2si, 308 cvtss2siq, cvttss2si, cvttss2siq, cvtsi2sd, cvtsi2sdq, 309 cvtsd2si, cvtsd2siq, cvttsd2si, cvttsd2siq, 310 cvtpd2dq, cvttpd2dq, cvtsd2ss, cvtss2sd, 311 cvtpd2ps, cvtps2pd): Added amdfam10_decode attribute. 312 3132007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 314 315 * config/i386/athlon.md (athlon_ssedivvector_amdfam10, 316 athlon_ssedivvector_load_amdfam10, athlon_ssemulvector_amdfam10, 317 athlon_ssemulvector_load_amdfam10): New define_insn_reservation. 318 (athlon_ssediv, athlon_ssediv_load_k8, athlon_ssemul, 319 athlon_ssemul_load_k8): Added amdfam10. 320 3212007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 322 323 * config/i386/i386.h (TARGET_SSE_UNALIGNED_MOVE_OPTIMAL): New macro. 324 (x86_sse_unaligned_move_optimal): New variable. 325 326 * config/i386/i386.c (x86_sse_unaligned_move_optimal): Enable for 327 m_AMDFAM10. 328 (ix86_expand_vector_move_misalign): Add code to generate movupd/movups 329 for unaligned vector SSE double/single precision loads for AMDFAM10. 330 3312007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 332 333 * config/i386/i386.h (TARGET_AMDFAM10): New macro. 334 (TARGET_CPU_CPP_BUILTINS): Add code for amdfam10. 335 Define TARGET_CPU_DEFAULT_amdfam10. 336 (TARGET_CPU_DEFAULT_NAMES): Add amdfam10. 337 (processor_type): Add PROCESSOR_AMDFAM10. 338 339 * config/i386/i386.md: Add amdfam10 as a new cpu attribute to match 340 processor_type in config/i386/i386.h. 341 Enable imul peepholes for TARGET_AMDFAM10. 342 343 * config.gcc: Add support for --with-cpu option for amdfam10. 344 345 * config/i386/i386.c (amdfam10_cost): New variable. 346 (m_AMDFAM10): New macro. 347 (m_ATHLON_K8_AMDFAM10): New macro. 348 (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 349 x86_cmove, x86_3dnow_a, x86_deep_branch, x86_use_simode_fiop, 350 x86_promote_QImode, x86_integer_DFmode_moves, 351 x86_partial_reg_dependency, x86_memory_mismatch_stall, 352 x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387, 353 x86_sse_partial_reg_dependency, x86_sse_typeless_stores, 354 x86_use_ffreep, x86_use_incdec, x86_four_jump_limit, 355 x86_schedule, x86_use_bt, x86_cmpxchg16b, x86_pad_returns): 356 Enable/disable for amdfam10. 357 (override_options): Add amdfam10_cost to processor_target_table. 358 Set up PROCESSOR_AMDFAM10 for amdfam10 entry in 359 processor_alias_table. 360 (ix86_issue_rate): Add PROCESSOR_AMDFAM10. 361 (ix86_adjust_cost): Add code for amdfam10. 362 3632007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 364 365 * config/i386/i386.opt: Add new Advanced Bit Manipulation (-mabm) 366 instruction set feature flag. Add new (-mpopcnt) flag for popcnt 367 instruction. Add new SSE4A (-msse4a) instruction set feature flag. 368 * config/i386/i386.h: Add builtin definition for SSE4A. 369 * config/i386/i386.md: Add support for ABM instructions 370 (popcnt and lzcnt). 371 * config/i386/sse.md: Add support for SSE4A instructions 372 (movntss, movntsd, extrq, insertq). 373 * config/i386/i386.c: Add support for ABM and SSE4A builtins. 374 Add -march=amdfam10 flag. 375 * config/i386/ammintrin.h: Add support for SSE4A intrinsics. 376 * doc/invoke.texi: Add documentation on flags for sse4a, abm, popcnt 377 and amdfam10. 378 * doc/extend.texi: Add documentation for SSE4A builtins. 379 3802007-01-24 Jakub Jelinek <jakub@redhat.com> (r121140) 381 382 * config/i386/i386.h (x86_cmpxchg16b): Remove const. 383 (TARGET_CMPXCHG16B): Define to x86_cmpxchg16b. 384 * config/i386/i386.c (x86_cmpxchg16b): Remove const. 385 (override_options): Add PTA_CX16 flag. Set x86_cmpxchg16b 386 for CPUs that have PTA_CX16 set. 387 3882007-01-17 Eric Christopher <echristo@apple.com> (r120846) 389 390 * config.gcc: Support core2 processor. 391 3922007-01-05 Manuel Lopez-Ibanez <manu@gcc.gnu.org> (r120505) 393 394 PR c/19978 395 * tree.h (TREE_OVERFLOW_P): New. 396 * c-typeck.c (parser_build_unary_op): Warn only if result 397 overflowed and operands did not. 398 (parser_build_binary_op): Likewise. 399 (convert_for_assignment): Remove redundant overflow_warning. 400 * c-common.c (overflow_warning): Don't check or set TREE_OVERFLOW. 401 4022006-12-13 Ian Lance Taylor <iant@google.com> (r119855) 403 404 PR c++/19564 405 PR c++/19756 406 * c-typeck.c (parser_build_binary_op): Move parentheses warnings 407 to warn_about_parentheses in c-common.c. 408 * c-common.c (warn_about_parentheses): New function. 409 * c-common.h (warn_about_parentheses): Declare. 410 * doc/invoke.texi (Warning Options): Update -Wparentheses 411 description. 412 4132006-12-12 Geoffrey Keating <geoffk@apple.com> (r119820) 414 415 * mips-tdump.c: Replace CROSS_COMPILE with 416 CROSS_DIRECTORY_STRUCTURE. 417 * mips-tfile.c: Likewise. 418 * gcc.c: Likewise. 419 * configure.ac: Likewise. 420 * cppdefault.c: Likewise. 421 * Makefile.in: Likewise. 422 * config/alpha/osf.h: Likewise. 423 * config/i386/cygwin.h: Likewise. 424 * config/i386/beos-elf.h: Likewise. 425 * config/i386/nto.h: Likewise. 426 * config/svr4.h: Likewise. 427 * config/rs6000/aix.h: Likewise. 428 * config/rs6000/sysv4.h: Likewise. 429 * collect2.c: Likewise. 430 * configure: Regenerate. 431 432 * doc/tm.texi (Alignment Output): Document that ASM_OUTPUT_SKIP 433 actually takes an unsigned HOST_WIDE_INT for its second parameter. 434 4352006-12-02 H.J. Lu <hongjiu.lu@intel.com> (r119454 - partial) 436 437 PR target/30040 438 * config/i386/driver-i386.c (bit_SSSE3): New. 439 4402006-11-27 Uros Bizjak <ubizjak@gmail.com> (r119260) 441 442 * config/i386/i386.c (x86_ext_80387_constants): Add m_K8, m_CORE2 443 and m_GENERIC64. 444 4452006-11-18 Vladimir Makarov <vmakarov@redhat.com> (r118973) 446 447 * doc/invoke.texi (core2): Add item. 448 449 * config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New 450 macros. 451 (TARGET_CPU_CPP_BUILTINS): Add code for core2. 452 (TARGET_CPU_DEFAULT_generic): Change value. 453 (TARGET_CPU_DEFAULT_NAMES): Add core2. 454 (processor_type): Add new constant PROCESSOR_CORE2. 455 456 * config/i386/i386.md (cpu): Add core2. 457 458 * config/i386/i386.c (core2_cost): New initialized variable. 459 (m_CORE2): New macro. 460 (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 461 x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop, 462 x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8, 463 x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves, 464 x86_partial_reg_dependency, x86_memory_mismatch_stall, 465 x86_accumulate_outgoing_args, x86_prologue_using_move, 466 x86_epilogue_using_move, x86_arch_always_fancy_math_387, 467 x86_sse_partial_reg_dependency, x86_rep_movl_optimal, 468 x86_use_incdec, x86_four_jump_limit, x86_schedule, 469 x86_pad_returns): Add m_CORE2. 470 (override_options): Add entries for Core2. 471 (ix86_issue_rate): Add case for Core2. 472 4732006-11-07 Eric Christopher <echristo@apple.com> (r118576) 474 475 * libgcc2.c (__bswapdi2): Rename from bswapDI2. 476 (__bswapsi2): Ditto. 477 * libgcc2.h: Remove transformation of bswap routines. 478 * config/i386/i386.md (bswapsi2): New. 479 (bswapdi2): Ditto. 480 4812006-10-31 Geoffrey Keating <geoffk@apple.com> (r118360) 482 483 * coverage.c (coverage_checksum_string): Update comment. 484 * dwarf2out.c (switch_to_eh_frame_section): Update for removal 485 of get_file_function_name. 486 * cgraphunit.c (cgraph_build_static_cdtor): Update for rename 487 of get_file_function_name_long. 488 * tree.c (get_file_function_name): Rename from 489 get_file_function_name_long; improve comment; handle 'I' and 'D' 490 specially when the target has ctor/dtor support; remove special 491 handling for 'F'. 492 (get_file_function_name): Remove. 493 * tree.h (get_file_function_name): Rename from 494 get_file_function_name_long. 495 (get_file_function_name): Remove prototype. 496 4972006-10-31 Geoffrey Keating <geoffk@apple.com> (r118356) 498 499 * c-decl.c (grokdeclarator): Don't set DECL_EXTERNAL on 500 inline static functions in c99 mode. 501 502 PR 16622 503 * doc/extend.texi (Inline): Update. 504 * c-tree.h (struct language_function): Remove field 'extern_inline'. 505 * c-decl.c (current_extern_inline): Delete. 506 (pop_scope): Adjust test for an undefined nested function. 507 Add warning about undeclared inline function. 508 (diagnose_mismatched_decls): Update comments. Disallow overriding 509 of inline functions in a translation unit in C99. Allow inline 510 declarations in C99 at any time. 511 (merge_decls): Boolize variables. Handle C99 'extern inline' 512 semantics. 513 (grokdeclarator): Set DECL_EXTERNAL here for functions. Handle 514 C99 inline semantics. 515 (start_function): Don't clear current_extern_inline. Don't set 516 DECL_EXTERNAL. 517 (c_push_function_context): Don't push current_extern_inline. 518 (c_pop_function_context): Don't restore current_extern_inline. 519 520 PR 11377 521 * c-typeck.c (build_external_ref): Warn about static variables 522 used in extern inline functions. 523 * c-decl.c (start_decl): Warn about static variables declared 524 in extern inline functions. 525 5262006-10-27 Vladimir Makarov <vmakarov@redhat.com> (r118090) 527 528 * config/i386/i386.h (TARGET_GEODE): 529 (TARGET_CPU_CPP_BUILTINS): Add code for geode. 530 (TARGET_CPU_DEFAULT_geode): New macro. 531 (TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2, 532 TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon, 533 TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8, 534 TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott, 535 TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase 536 the macro values. 537 (TARGET_CPU_DEFAULT_NAMES): Add geode. 538 (processor_type): Add PROCESSOR_GEODE. 539 540 * config/i386/i386.md: Include geode.md. 541 (cpu): Add geode. 542 543 * config/i386/i386.c (geode_cost): New initialized global 544 variable. 545 (m_GEODE, m_K6_GEODE): New macros. 546 (x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf, 547 x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4, 548 x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants, 549 x86_schedule): Use m_K6_GEODE instead of m_K6. 550 (x86_movx, x86_cmove): Set up m_GEODE. 551 (x86_integer_DFmode_moves): Clear m_GEODE. 552 (processor_target_table): Add entry for geode. 553 (processor_alias_table): Ditto. 554 555 * config/i386/geode.md: New file. 556 557 * doc/invoke.texi: Add entry about geode processor. 558 5592006-10-24 Richard Guenther <rguenther@suse.de> (r118001) 560 561 PR middle-end/28796 562 * builtins.c (fold_builtin_classify): Use HONOR_INFINITIES 563 and HONOR_NANS instead of MODE_HAS_INFINITIES and MODE_HAS_NANS 564 for deciding optimizations in consistency with fold-const.c 565 (fold_builtin_unordered_cmp): Likewise. 566 5672006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117958) 568 569 * config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers. 570 (x86_64-*-*): Likewise. 571 572 * config/i386/i386.c (pta_flags): Add PTA_SSSE3. 573 (override_options): Check SSSE3. 574 (ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD, 575 IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD, 576 IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW, 577 IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB, 578 IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND, 579 IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW, 580 IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128, 581 IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128, 582 IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128, 583 IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128, 584 IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128, 585 IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128, 586 IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128, 587 IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and 588 IX86_BUILTIN_PABSD128. 589 (bdesc_2arg): Add SSSE3. 590 (bdesc_1arg): Likewise. 591 (ix86_init_mmx_sse_builtins): Support SSSE3. 592 (ix86_expand_builtin): Likewise. 593 * config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise. 594 595 * config/i386/i386.md (UNSPEC_PSHUFB): New. 596 (UNSPEC_PSIGN): Likewise. 597 (UNSPEC_PALIGNR): Likewise. 598 Include mmx.md before sse.md. 599 600 * config/i386/i386.opt: Add -mssse3. 601 602 * config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3. 603 (ssse3_phaddwv4hi3): Likewise. 604 (ssse3_phadddv4si3): Likewise. 605 (ssse3_phadddv2si3): Likewise. 606 (ssse3_phaddswv8hi3): Likewise. 607 (ssse3_phaddswv4hi3): Likewise. 608 (ssse3_phsubwv8hi3): Likewise. 609 (ssse3_phsubwv4hi3): Likewise. 610 (ssse3_phsubdv4si3): Likewise. 611 (ssse3_phsubdv2si3): Likewise. 612 (ssse3_phsubswv8hi3): Likewise. 613 (ssse3_phsubswv4hi3): Likewise. 614 (ssse3_pmaddubswv8hi3): Likewise. 615 (ssse3_pmaddubswv4hi3): Likewise. 616 (ssse3_pmulhrswv8hi3): Likewise. 617 (ssse3_pmulhrswv4hi3): Likewise. 618 (ssse3_pshufbv16qi3): Likewise. 619 (ssse3_pshufbv8qi3): Likewise. 620 (ssse3_psign<mode>3): Likewise. 621 (ssse3_psign<mode>3): Likewise. 622 (ssse3_palignrti): Likewise. 623 (ssse3_palignrdi): Likewise. 624 (abs<mode>2): Likewise. 625 (abs<mode>2): Likewise. 626 627 * config/i386/tmmintrin.h: New file. 628 629 * doc/extend.texi: Document SSSE3 built-in functions. 630 631 * doc/invoke.texi: Document -mssse3/-mno-ssse3 switches. 632 6332006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117959) 634 635 * config/i386/tmmintrin.h: Remove the duplicated content. 636 6372006-10-21 Richard Guenther <rguenther@suse.de> (r117932) 638 639 PR tree-optimization/3511 640 * tree-ssa-pre.c (phi_translate): Fold CALL_EXPRs that 641 got new invariant arguments during PHI translation. 642 6432006-10-21 Richard Guenther <rguenther@suse.de> (r117929) 644 645 * builtins.c (fold_builtin_classify): Fix typo. 646 6472006-09-07 Eric Christopher <echristo@apple.com> (r118361) 648 Falk Hueffner <falk@debian.org> 649 650 * doc/extend.texi (__builtin_bswap32): Document. 651 (__builtin_bswap64): Ditto. 652 * doc/libgcc.texi (bswapsi2): Document. 653 (bswapdi2): Ditto. 654 * doc/rtl.texi (bswap): Document. 655 * optabs.c (expand_unop): Don't widen a bswap. 656 (init_optabs): Init bswap. Set libfuncs explicitly 657 for bswapsi2 and bswapdi2. 658 * optabs.h (OTI_bswap): New. 659 (bswap_optab): Ditto. 660 * genopinit.c (optabs): Handle bswap_optab. 661 * tree.h (tree_index): Add TI_UINT32_TYPE and 662 TI_UINT64_TYPE. 663 (uint32_type_node): New. 664 (uint64_type_node): Ditto. 665 * tree.c (build_common_tree_nodes_2): Initialize 666 uint32_type_node and uint64_type_node. 667 * builtins.c (expand_builtin_bswap): New. 668 (expand_builtin): Call. 669 (fold_builtin_bswap): New. 670 (fold_builtin_1): Call. 671 * fold-const.c (tree_expr_nonnegative_p): Return true 672 for bswap. 673 * builtin-types.def (BT_UINT32): New. 674 (BT_UINT64): Ditto. 675 (BT_FN_UINT32_UINT32): Ditto. 676 (BT_FN_UINT64_UINT64): Ditto. 677 * builtins.def (BUILT_IN_BSWAP32): New. 678 (BUILT_IN_BSWAP64): Ditto. 679 * rtl.def (BSWAP): New. 680 * genattrtab.c (check_attr_value): New. 681 * libgcc2.c (__bswapSI2): New. 682 (__bswapDI2): Ditto. 683 * libgcc2.h (__bswapSI2): Declare. 684 (__bswapDI2): Ditto. 685 * mklibgcc.in (lib2funcs): Add _bswapsi2 and _bswapdi2. 686 * simplify-rtx.c (simplify_const_unary_operation): Return 687 0 for BSWAP. 688 * libgcc-std.ver (__bwapsi2): Add. 689 (__bswapdi2): Ditto. 690 * reload1.c (eliminate_regs_1): Add bswap. 691 (elimination_effects): Ditto. 692 * config/i386/i386.h (x86_bswap): New. 693 (TARGET_BSWAP): Use. 694 * config/i386/i386.c (x86_bswap): Set. 695