i386-reg.tbl revision 256281 
11553Srgrimes// i386 register table.
21553Srgrimes
31553Srgrimes// Make %st first as we test for it.
41553Srgrimesst, FloatReg|FloatAcc, 0, 0
51553Srgrimes// 8 bit regs
61553Srgrimesal, Reg8|Acc, 0, 0
71553Srgrimescl, Reg8|ShiftCount, 0, 1
81553Srgrimesdl, Reg8, 0, 2
91553Srgrimesbl, Reg8, 0, 3
101553Srgrimesah, Reg8, 0, 4
111553Srgrimesch, Reg8, 0, 5
121553Srgrimesdh, Reg8, 0, 6
131553Srgrimesbh, Reg8, 0, 7
141553Srgrimesaxl, Reg8|Acc, RegRex64, 0
151553Srgrimescxl, Reg8, RegRex64, 1
161553Srgrimesdxl, Reg8, RegRex64, 2
171553Srgrimesbxl, Reg8, RegRex64, 3
181553Srgrimesspl, Reg8, RegRex64, 4
191553Srgrimesbpl, Reg8, RegRex64, 5
201553Srgrimessil, Reg8, RegRex64, 6
211553Srgrimesdil, Reg8, RegRex64, 7
221553Srgrimesr8b, Reg8, RegRex|RegRex64, 0
231553Srgrimesr9b, Reg8, RegRex|RegRex64, 1
241553Srgrimesr10b, Reg8, RegRex|RegRex64, 2
251553Srgrimesr11b, Reg8, RegRex|RegRex64, 3
261553Srgrimesr12b, Reg8, RegRex|RegRex64, 4
271553Srgrimesr13b, Reg8, RegRex|RegRex64, 5
281553Srgrimesr14b, Reg8, RegRex|RegRex64, 6
2950479Speterr15b, Reg8, RegRex|RegRex64, 7
301553Srgrimes// 16 bit regs
311553Srgrimesax, Reg16|Acc, 0, 0
321553Srgrimescx, Reg16, 0, 1
3379537Srudx, Reg16|InOutPortReg, 0, 2
341553Srgrimesbx, Reg16|BaseIndex, 0, 3
351553Srgrimessp, Reg16, 0, 4
361553Srgrimesbp, Reg16|BaseIndex, 0, 5
371553Srgrimessi, Reg16|BaseIndex, 0, 6
3868965Srudi, Reg16|BaseIndex, 0, 7
391553Srgrimesr8w, Reg16, RegRex, 0
401553Srgrimesr9w, Reg16, RegRex, 1
411553Srgrimesr10w, Reg16, RegRex, 2
4295127Scharnierr11w, Reg16, RegRex, 3
4395127Scharnierr12w, Reg16, RegRex, 4
4495127Scharnierr13w, Reg16, RegRex, 5
451553Srgrimesr14w, Reg16, RegRex, 6
461553Srgrimesr15w, Reg16, RegRex, 7
471553Srgrimes// 32 bit regs
481553Srgrimeseax, Reg32|BaseIndex|Acc, 0, 0
491553Srgrimesecx, Reg32|BaseIndex, 0, 1
501553Srgrimesedx, Reg32|BaseIndex, 0, 2
511553Srgrimesebx, Reg32|BaseIndex, 0, 3
521553Srgrimesesp, Reg32, 0, 4
531553Srgrimesebp, Reg32|BaseIndex, 0, 5
541553Srgrimesesi, Reg32|BaseIndex, 0, 6
551553Srgrimesedi, Reg32|BaseIndex, 0, 7
561553Srgrimesr8d, Reg32|BaseIndex, RegRex, 0
571553Srgrimesr9d, Reg32|BaseIndex, RegRex, 1
581553Srgrimesr10d, Reg32|BaseIndex, RegRex, 2
591553Srgrimesr11d, Reg32|BaseIndex, RegRex, 3
601553Srgrimesr12d, Reg32|BaseIndex, RegRex, 4
611553Srgrimesr13d, Reg32|BaseIndex, RegRex, 5
621553Srgrimesr14d, Reg32|BaseIndex, RegRex, 6
631553Srgrimesr15d, Reg32|BaseIndex, RegRex, 7
641553Srgrimesrax, Reg64|BaseIndex|Acc, 0, 0
651553Srgrimesrcx, Reg64|BaseIndex, 0, 1
661553Srgrimesrdx, Reg64|BaseIndex, 0, 2
671553Srgrimesrbx, Reg64|BaseIndex, 0, 3
681553Srgrimesrsp, Reg64, 0, 4
691553Srgrimesrbp, Reg64|BaseIndex, 0, 5
7095127Scharnierrsi, Reg64|BaseIndex, 0, 6
7195127Scharnierrdi, Reg64|BaseIndex, 0, 7
7295127Scharnierr8, Reg64|BaseIndex, RegRex, 0
731553Srgrimesr9, Reg64|BaseIndex, RegRex, 1
74r10, Reg64|BaseIndex, RegRex, 2
75r11, Reg64|BaseIndex, RegRex, 3
76r12, Reg64|BaseIndex, RegRex, 4
77r13, Reg64|BaseIndex, RegRex, 5
78r14, Reg64|BaseIndex, RegRex, 6
79r15, Reg64|BaseIndex, RegRex, 7
80// Segment registers.
81es, SReg2, 0, 0
82cs, SReg2, 0, 1
83ss, SReg2, 0, 2
84ds, SReg2, 0, 3
85fs, SReg3, 0, 4
86gs, SReg3, 0, 5
87// Control registers.
88cr0, Control, 0, 0
89cr1, Control, 0, 1
90cr2, Control, 0, 2
91cr3, Control, 0, 3
92cr4, Control, 0, 4
93cr5, Control, 0, 5
94cr6, Control, 0, 6
95cr7, Control, 0, 7
96cr8, Control, RegRex, 0
97cr9, Control, RegRex, 1
98cr10, Control, RegRex, 2
99cr11, Control, RegRex, 3
100cr12, Control, RegRex, 4
101cr13, Control, RegRex, 5
102cr14, Control, RegRex, 6
103cr15, Control, RegRex, 7
104// Debug registers.
105db0, Debug, 0, 0
106db1, Debug, 0, 1
107db2, Debug, 0, 2
108db3, Debug, 0, 3
109db4, Debug, 0, 4
110db5, Debug, 0, 5
111db6, Debug, 0, 6
112db7, Debug, 0, 7
113db8, Debug, RegRex, 0
114db9, Debug, RegRex, 1
115db10, Debug, RegRex, 2
116db11, Debug, RegRex, 3
117db12, Debug, RegRex, 4
118db13, Debug, RegRex, 5
119db14, Debug, RegRex, 6
120db15, Debug, RegRex, 7
121dr0, Debug, 0, 0
122dr1, Debug, 0, 1
123dr2, Debug, 0, 2
124dr3, Debug, 0, 3
125dr4, Debug, 0, 4
126dr5, Debug, 0, 5
127dr6, Debug, 0, 6
128dr7, Debug, 0, 7
129dr8, Debug, RegRex, 0
130dr9, Debug, RegRex, 1
131dr10, Debug, RegRex, 2
132dr11, Debug, RegRex, 3
133dr12, Debug, RegRex, 4
134dr13, Debug, RegRex, 5
135dr14, Debug, RegRex, 6
136dr15, Debug, RegRex, 7
137// Test registers.
138tr0, Test, 0, 0
139tr1, Test, 0, 1
140tr2, Test, 0, 2
141tr3, Test, 0, 3
142tr4, Test, 0, 4
143tr5, Test, 0, 5
144tr6, Test, 0, 6
145tr7, Test, 0, 7
146// MMX and simd registers.
147mm0, RegMMX, 0, 0
148mm1, RegMMX, 0, 1
149mm2, RegMMX, 0, 2
150mm3, RegMMX, 0, 3
151mm4, RegMMX, 0, 4
152mm5, RegMMX, 0, 5
153mm6, RegMMX, 0, 6
154mm7, RegMMX, 0, 7
155xmm0, RegXMM, 0, 0
156xmm1, RegXMM, 0, 1
157xmm2, RegXMM, 0, 2
158xmm3, RegXMM, 0, 3
159xmm4, RegXMM, 0, 4
160xmm5, RegXMM, 0, 5
161xmm6, RegXMM, 0, 6
162xmm7, RegXMM, 0, 7
163xmm8, RegXMM, RegRex, 0
164xmm9, RegXMM, RegRex, 1
165xmm10, RegXMM, RegRex, 2
166xmm11, RegXMM, RegRex, 3
167xmm12, RegXMM, RegRex, 4
168xmm13, RegXMM, RegRex, 5
169xmm14, RegXMM, RegRex, 6
170xmm15, RegXMM, RegRex, 7
171// No type will make this register rejected for all purposes except
172// for addressing.  This saves creating one extra type for RIP.
173rip, BaseIndex, 0, 0
174// fp regs.
175st(0), FloatReg|FloatAcc, 0, 0
176st(1), FloatReg, 0, 1
177st(2), FloatReg, 0, 2
178st(3), FloatReg, 0, 3
179st(4), FloatReg, 0, 4
180st(5), FloatReg, 0, 5
181st(6), FloatReg, 0, 6
182st(7), FloatReg, 0, 7
183