i386-reg.tbl revision 214571
1// i386 register table. 2 3// Make %st first as we test for it. 4st, FloatReg|FloatAcc, 0, 0 5// 8 bit regs 6al, Reg8|Acc, 0, 0 7cl, Reg8|ShiftCount, 0, 1 8dl, Reg8, 0, 2 9bl, Reg8, 0, 3 10ah, Reg8, 0, 4 11ch, Reg8, 0, 5 12dh, Reg8, 0, 6 13bh, Reg8, 0, 7 14axl, Reg8|Acc, RegRex64, 0 15cxl, Reg8, RegRex64, 1 16dxl, Reg8, RegRex64, 2 17bxl, Reg8, RegRex64, 3 18spl, Reg8, RegRex64, 4 19bpl, Reg8, RegRex64, 5 20sil, Reg8, RegRex64, 6 21dil, Reg8, RegRex64, 7 22r8b, Reg8, RegRex|RegRex64, 0 23r9b, Reg8, RegRex|RegRex64, 1 24r10b, Reg8, RegRex|RegRex64, 2 25r11b, Reg8, RegRex|RegRex64, 3 26r12b, Reg8, RegRex|RegRex64, 4 27r13b, Reg8, RegRex|RegRex64, 5 28r14b, Reg8, RegRex|RegRex64, 6 29r15b, Reg8, RegRex|RegRex64, 7 30// 16 bit regs 31ax, Reg16|Acc, 0, 0 32cx, Reg16, 0, 1 33dx, Reg16|InOutPortReg, 0, 2 34bx, Reg16|BaseIndex, 0, 3 35sp, Reg16, 0, 4 36bp, Reg16|BaseIndex, 0, 5 37si, Reg16|BaseIndex, 0, 6 38di, Reg16|BaseIndex, 0, 7 39r8w, Reg16, RegRex, 0 40r9w, Reg16, RegRex, 1 41r10w, Reg16, RegRex, 2 42r11w, Reg16, RegRex, 3 43r12w, Reg16, RegRex, 4 44r13w, Reg16, RegRex, 5 45r14w, Reg16, RegRex, 6 46r15w, Reg16, RegRex, 7 47// 32 bit regs 48eax, Reg32|BaseIndex|Acc, 0, 0 49ecx, Reg32|BaseIndex, 0, 1 50edx, Reg32|BaseIndex, 0, 2 51ebx, Reg32|BaseIndex, 0, 3 52esp, Reg32, 0, 4 53ebp, Reg32|BaseIndex, 0, 5 54esi, Reg32|BaseIndex, 0, 6 55edi, Reg32|BaseIndex, 0, 7 56r8d, Reg32|BaseIndex, RegRex, 0 57r9d, Reg32|BaseIndex, RegRex, 1 58r10d, Reg32|BaseIndex, RegRex, 2 59r11d, Reg32|BaseIndex, RegRex, 3 60r12d, Reg32|BaseIndex, RegRex, 4 61r13d, Reg32|BaseIndex, RegRex, 5 62r14d, Reg32|BaseIndex, RegRex, 6 63r15d, Reg32|BaseIndex, RegRex, 7 64rax, Reg64|BaseIndex|Acc, 0, 0 65rcx, Reg64|BaseIndex, 0, 1 66rdx, Reg64|BaseIndex, 0, 2 67rbx, Reg64|BaseIndex, 0, 3 68rsp, Reg64, 0, 4 69rbp, Reg64|BaseIndex, 0, 5 70rsi, Reg64|BaseIndex, 0, 6 71rdi, Reg64|BaseIndex, 0, 7 72r8, Reg64|BaseIndex, RegRex, 0 73r9, Reg64|BaseIndex, RegRex, 1 74r10, Reg64|BaseIndex, RegRex, 2 75r11, Reg64|BaseIndex, RegRex, 3 76r12, Reg64|BaseIndex, RegRex, 4 77r13, Reg64|BaseIndex, RegRex, 5 78r14, Reg64|BaseIndex, RegRex, 6 79r15, Reg64|BaseIndex, RegRex, 7 80// Segment registers. 81es, SReg2, 0, 0 82cs, SReg2, 0, 1 83ss, SReg2, 0, 2 84ds, SReg2, 0, 3 85fs, SReg3, 0, 4 86gs, SReg3, 0, 5 87// Control registers. 88cr0, Control, 0, 0 89cr1, Control, 0, 1 90cr2, Control, 0, 2 91cr3, Control, 0, 3 92cr4, Control, 0, 4 93cr5, Control, 0, 5 94cr6, Control, 0, 6 95cr7, Control, 0, 7 96cr8, Control, RegRex, 0 97cr9, Control, RegRex, 1 98cr10, Control, RegRex, 2 99cr11, Control, RegRex, 3 100cr12, Control, RegRex, 4 101cr13, Control, RegRex, 5 102cr14, Control, RegRex, 6 103cr15, Control, RegRex, 7 104// Debug registers. 105db0, Debug, 0, 0 106db1, Debug, 0, 1 107db2, Debug, 0, 2 108db3, Debug, 0, 3 109db4, Debug, 0, 4 110db5, Debug, 0, 5 111db6, Debug, 0, 6 112db7, Debug, 0, 7 113db8, Debug, RegRex, 0 114db9, Debug, RegRex, 1 115db10, Debug, RegRex, 2 116db11, Debug, RegRex, 3 117db12, Debug, RegRex, 4 118db13, Debug, RegRex, 5 119db14, Debug, RegRex, 6 120db15, Debug, RegRex, 7 121dr0, Debug, 0, 0 122dr1, Debug, 0, 1 123dr2, Debug, 0, 2 124dr3, Debug, 0, 3 125dr4, Debug, 0, 4 126dr5, Debug, 0, 5 127dr6, Debug, 0, 6 128dr7, Debug, 0, 7 129dr8, Debug, RegRex, 0 130dr9, Debug, RegRex, 1 131dr10, Debug, RegRex, 2 132dr11, Debug, RegRex, 3 133dr12, Debug, RegRex, 4 134dr13, Debug, RegRex, 5 135dr14, Debug, RegRex, 6 136dr15, Debug, RegRex, 7 137// Test registers. 138tr0, Test, 0, 0 139tr1, Test, 0, 1 140tr2, Test, 0, 2 141tr3, Test, 0, 3 142tr4, Test, 0, 4 143tr5, Test, 0, 5 144tr6, Test, 0, 6 145tr7, Test, 0, 7 146// MMX and simd registers. 147mm0, RegMMX, 0, 0 148mm1, RegMMX, 0, 1 149mm2, RegMMX, 0, 2 150mm3, RegMMX, 0, 3 151mm4, RegMMX, 0, 4 152mm5, RegMMX, 0, 5 153mm6, RegMMX, 0, 6 154mm7, RegMMX, 0, 7 155xmm0, RegXMM, 0, 0 156xmm1, RegXMM, 0, 1 157xmm2, RegXMM, 0, 2 158xmm3, RegXMM, 0, 3 159xmm4, RegXMM, 0, 4 160xmm5, RegXMM, 0, 5 161xmm6, RegXMM, 0, 6 162xmm7, RegXMM, 0, 7 163xmm8, RegXMM, RegRex, 0 164xmm9, RegXMM, RegRex, 1 165xmm10, RegXMM, RegRex, 2 166xmm11, RegXMM, RegRex, 3 167xmm12, RegXMM, RegRex, 4 168xmm13, RegXMM, RegRex, 5 169xmm14, RegXMM, RegRex, 6 170xmm15, RegXMM, RegRex, 7 171// No type will make this register rejected for all purposes except 172// for addressing. This saves creating one extra type for RIP. 173rip, BaseIndex, 0, 0 174// fp regs. 175st(0), FloatReg|FloatAcc, 0, 0 176st(1), FloatReg, 0, 1 177st(2), FloatReg, 0, 2 178st(3), FloatReg, 0, 3 179st(4), FloatReg, 0, 4 180st(5), FloatReg, 0, 5 181st(6), FloatReg, 0, 6 182st(7), FloatReg, 0, 7 183