i386.h revision 77298
160484Sobrien/* opcode/i386.h -- Intel 80386 opcode table 277298Sobrien Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 377298Sobrien 2000, 2001 477298Sobrien Free Software Foundation, Inc. 533965Sjdp 633965SjdpThis file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger. 733965Sjdp 833965SjdpThis program is free software; you can redistribute it and/or modify 933965Sjdpit under the terms of the GNU General Public License as published by 1033965Sjdpthe Free Software Foundation; either version 2 of the License, or 1133965Sjdp(at your option) any later version. 1233965Sjdp 1333965SjdpThis program is distributed in the hope that it will be useful, 1433965Sjdpbut WITHOUT ANY WARRANTY; without even the implied warranty of 1533965SjdpMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1633965SjdpGNU General Public License for more details. 1733965Sjdp 1833965SjdpYou should have received a copy of the GNU General Public License 1933965Sjdpalong with this program; if not, write to the Free Software 2033965SjdpFoundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 2133965Sjdp 2260484Sobrien/* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived 2360484Sobrien ix86 Unix assemblers, generate floating point instructions with 2460484Sobrien reversed source and destination registers in certain cases. 2560484Sobrien Unfortunately, gcc and possibly many other programs use this 2660484Sobrien reversed syntax, so we're stuck with it. 2733965Sjdp 2860484Sobrien eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but 2960484Sobrien `fsub %st,%st(3)' results in st(3) = st - st(3), rather than 3060484Sobrien the expected st(3) = st(3) - st 3160484Sobrien 3260484Sobrien This happens with all the non-commutative arithmetic floating point 3360484Sobrien operations with two register operands, where the source register is 3460484Sobrien %st, and destination register is %st(i). See FloatDR below. 3560484Sobrien 3660484Sobrien The affected opcode map is dceX, dcfX, deeX, defX. */ 3760484Sobrien 3860484Sobrien#ifndef SYSV386_COMPAT 3960484Sobrien/* Set non-zero for broken, compatible instructions. Set to zero for 4060484Sobrien non-broken opcodes at your peril. gcc generates SystemV/386 4160484Sobrien compatible instructions. */ 4260484Sobrien#define SYSV386_COMPAT 1 4360484Sobrien#endif 4460484Sobrien#ifndef OLDGCC_COMPAT 4560484Sobrien/* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could 4660484Sobrien generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands 4760484Sobrien reversed. */ 4860484Sobrien#define OLDGCC_COMPAT SYSV386_COMPAT 4960484Sobrien#endif 5060484Sobrien 5133965Sjdpstatic const template i386_optab[] = { 5233965Sjdp 5360484Sobrien#define X None 5477298Sobrien#define NoSuf (No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf|No_qSuf) 5577298Sobrien#define b_Suf (No_wSuf|No_lSuf|No_sSuf|No_xSuf|No_qSuf) 5677298Sobrien#define w_Suf (No_bSuf|No_lSuf|No_sSuf|No_xSuf|No_qSuf) 5777298Sobrien#define l_Suf (No_bSuf|No_wSuf|No_sSuf|No_xSuf|No_qSuf) 5877298Sobrien#define q_Suf (No_bSuf|No_wSuf|No_sSuf|No_lSuf|No_xSuf) 5977298Sobrien#define x_Suf (No_bSuf|No_wSuf|No_sSuf|No_lSuf|No_qSuf) 6077298Sobrien#define bw_Suf (No_lSuf|No_sSuf|No_xSuf|No_qSuf) 6177298Sobrien#define bl_Suf (No_wSuf|No_sSuf|No_xSuf|No_qSuf) 6277298Sobrien#define wl_Suf (No_bSuf|No_sSuf|No_xSuf|No_qSuf) 6377298Sobrien#define wlq_Suf (No_bSuf|No_sSuf|No_xSuf) 6477298Sobrien#define lq_Suf (No_bSuf|No_wSuf|No_sSuf|No_xSuf) 6577298Sobrien#define sl_Suf (No_bSuf|No_wSuf|No_xSuf|No_qSuf) 6677298Sobrien#define sldx_Suf (No_bSuf|No_wSuf|No_qSuf) 6777298Sobrien#define bwl_Suf (No_sSuf|No_xSuf|No_qSuf) 6877298Sobrien#define bwlq_Suf (No_sSuf|No_xSuf) 6960484Sobrien#define FP (NoSuf|IgnoreSize) 7060484Sobrien#define l_FP (l_Suf|IgnoreSize) 7160484Sobrien#define x_FP (x_Suf|IgnoreSize) 7260484Sobrien#define sl_FP (sl_Suf|IgnoreSize) 7360484Sobrien#if SYSV386_COMPAT 7460484Sobrien/* Someone forgot that the FloatR bit reverses the operation when not 7560484Sobrien equal to the FloatD bit. ie. Changing only FloatD results in the 7660484Sobrien destination being swapped *and* the direction being reversed. */ 7760484Sobrien#define FloatDR FloatD 7860484Sobrien#else 7960484Sobrien#define FloatDR (FloatD|FloatR) 8060484Sobrien#endif 8160484Sobrien 8260484Sobrien/* Move instructions. */ 8333965Sjdp#define MOV_AX_DISP32 0xa0 8477298Sobrien/* In the 64bit mode the short form mov immediate is redefined to have 8577298Sobrien 64bit displacement value. */ 8677298Sobrien{ "mov", 2, 0xa0, X, CpuNo64,bwlq_Suf|D|W, { Disp16|Disp32, Acc, 0 } }, 8777298Sobrien{ "mov", 2, 0x88, X, 0, bwlq_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 8877298Sobrien/* In the 64bit mode the short form mov immediate is redefined to have 8977298Sobrien 64bit displacement value. */ 9077298Sobrien{ "mov", 2, 0xb0, X, 0, bwl_Suf|W|ShortForm, { EncImm, Reg8|Reg16|Reg32, 0 } }, 9177298Sobrien{ "mov", 2, 0xc6, 0, 0, bwlq_Suf|W|Modrm, { EncImm, Reg|AnyMem, 0 } }, 9277298Sobrien{ "mov", 2, 0xb0, X, Cpu64, q_Suf|W|ShortForm, { Imm64, Reg64, 0 } }, 9377298Sobrien/* The segment register moves accept WordReg so that a segment register 9460484Sobrien can be copied to a 32 bit register, and vice versa, without using a 9560484Sobrien size prefix. When moving to a 32 bit register, the upper 16 bits 9660484Sobrien are set to an implementation defined value (on the Pentium Pro, 9738889Sjdp the implementation defined value is zero). */ 9877298Sobrien{ "mov", 2, 0x8c, X, 0, wl_Suf|Modrm, { SReg2, WordReg|WordMem, 0 } }, 9977298Sobrien{ "mov", 2, 0x8c, X, Cpu386, wl_Suf|Modrm, { SReg3, WordReg|WordMem, 0 } }, 10077298Sobrien{ "mov", 2, 0x8e, X, 0, wl_Suf|Modrm|IgnoreSize, { WordReg|WordMem, SReg2, 0 } }, 10177298Sobrien{ "mov", 2, 0x8e, X, Cpu386, wl_Suf|Modrm|IgnoreSize, { WordReg|WordMem, SReg3, 0 } }, 10277298Sobrien/* Move to/from control debug registers. In the 16 or 32bit modes they are 32bit. In the 64bit 10377298Sobrien mode they are 64bit.*/ 10477298Sobrien{ "mov", 2, 0x0f20, X, Cpu386|CpuNo64, l_Suf|D|Modrm|IgnoreSize,{ Control, Reg32|InvMem, 0} }, 10577298Sobrien{ "mov", 2, 0x0f20, X, Cpu64, q_Suf|D|Modrm|IgnoreSize|NoRex64,{ Control, Reg64|InvMem, 0} }, 10677298Sobrien{ "mov", 2, 0x0f21, X, Cpu386|CpuNo64, l_Suf|D|Modrm|IgnoreSize,{ Debug, Reg32|InvMem, 0} }, 10777298Sobrien{ "mov", 2, 0x0f21, X, Cpu64, q_Suf|D|Modrm|IgnoreSize|NoRex64,{ Debug, Reg64|InvMem, 0} }, 10877298Sobrien{ "mov", 2, 0x0f24, X, Cpu386, l_Suf|D|Modrm|IgnoreSize, { Test, Reg32|InvMem, 0} }, 10977298Sobrien{ "movabs",2, 0xa0, X, Cpu64, bwlq_Suf|D|W, { Disp64, Acc, 0 } }, 11077298Sobrien{ "movabs",2, 0xb0, X, Cpu64, q_Suf|W|ShortForm, { Imm64, Reg64, 0 } }, 11133965Sjdp 11260484Sobrien/* Move with sign extend. */ 11333965Sjdp/* "movsbl" & "movsbw" must not be unified into "movsb" to avoid 11460484Sobrien conflict with the "movs" string move instruction. */ 11577298Sobrien{"movsbl", 2, 0x0fbe, X, Cpu386, NoSuf|Modrm, { Reg8|ByteMem, Reg32, 0} }, 11677298Sobrien{"movsbw", 2, 0x0fbe, X, Cpu386, NoSuf|Modrm, { Reg8|ByteMem, Reg16, 0} }, 11777298Sobrien{"movswl", 2, 0x0fbf, X, Cpu386, NoSuf|Modrm, { Reg16|ShortMem,Reg32, 0} }, 11877298Sobrien{"movsbq", 2, 0x0fbe, X, Cpu64, NoSuf|Modrm|Rex64, { Reg8|ByteMem, Reg64, 0} }, 11977298Sobrien{"movswq", 2, 0x0fbf, X, Cpu64, NoSuf|Modrm|Rex64, { Reg16|ShortMem,Reg64, 0} }, 12077298Sobrien{"movslq", 2, 0x63, X, Cpu64, NoSuf|Modrm|Rex64, { Reg32|WordMem, Reg64, 0} }, 12177298Sobrien/* Intel Syntax next 5 insns */ 12277298Sobrien{"movsx", 2, 0x0fbe, X, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} }, 12377298Sobrien{"movsx", 2, 0x0fbf, X, Cpu386, w_Suf|Modrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} }, 12477298Sobrien{"movsx", 2, 0x0fbe, X, Cpu64, b_Suf|Modrm|Rex64, { Reg8|ByteMem, Reg64, 0} }, 12577298Sobrien{"movsx", 2, 0x0fbf, X, Cpu64, w_Suf|Modrm|IgnoreSize|Rex64, { Reg16|ShortMem, Reg64, 0} }, 12677298Sobrien{"movsx", 2, 0x63, X, Cpu64, l_Suf|Modrm|Rex64, { Reg32|WordMem, Reg64, 0} }, 12733965Sjdp 12860484Sobrien/* Move with zero extend. */ 12977298Sobrien{"movzb", 2, 0x0fb6, X, Cpu386, wl_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} }, 13077298Sobrien{"movzwl", 2, 0x0fb7, X, Cpu386, NoSuf|Modrm, { Reg16|ShortMem, Reg32, 0} }, 13177298Sobrien/* These instructions are not particulary usefull, since the zero extend 13277298Sobrien 32->64 is implicit, but we can encode them. */ 13377298Sobrien{"movzbq", 2, 0x0fb6, X, Cpu64, NoSuf|Modrm|Rex64, { Reg8|ByteMem, Reg64, 0} }, 13477298Sobrien{"movzwq", 2, 0x0fb7, X, Cpu64, NoSuf|Modrm|Rex64, { Reg16|ShortMem, Reg64, 0} }, 13577298Sobrien/* Intel Syntax next 4 insns */ 13677298Sobrien{"movzx", 2, 0x0fb6, X, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} }, 13777298Sobrien{"movzx", 2, 0x0fb7, X, Cpu386, w_Suf|Modrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} }, 13877298Sobrien/* These instructions are not particulary usefull, since the zero extend 13977298Sobrien 32->64 is implicit, but we can encode them. */ 14077298Sobrien{"movzx", 2, 0x0fb6, X, Cpu386, b_Suf|Modrm|Rex64, { Reg8|ByteMem, Reg64, 0} }, 14177298Sobrien{"movzx", 2, 0x0fb7, X, Cpu386, w_Suf|Modrm|IgnoreSize|Rex64, { Reg16|ShortMem, Reg64, 0} }, 14233965Sjdp 14360484Sobrien/* Push instructions. */ 14477298Sobrien{"push", 1, 0x50, X, CpuNo64, wl_Suf|ShortForm|DefaultSize, { WordReg, 0, 0 } }, 14577298Sobrien{"push", 1, 0xff, 6, CpuNo64, wl_Suf|Modrm|DefaultSize, { WordReg|WordMem, 0, 0 } }, 14677298Sobrien{"push", 1, 0x6a, X, Cpu186|CpuNo64, wl_Suf|DefaultSize, { Imm8S, 0, 0} }, 14777298Sobrien{"push", 1, 0x68, X, Cpu186|CpuNo64, wl_Suf|DefaultSize, { Imm16|Imm32, 0, 0} }, 14877298Sobrien{"push", 1, 0x06, X, 0|CpuNo64, wl_Suf|Seg2ShortForm|DefaultSize, { SReg2, 0, 0 } }, 14977298Sobrien{"push", 1, 0x0fa0, X, Cpu386|CpuNo64, wl_Suf|Seg3ShortForm|DefaultSize, { SReg3, 0, 0 } }, 15077298Sobrien/* In 64bit mode, the operand size is implicitly 64bit. */ 15177298Sobrien{"push", 1, 0x50, X, Cpu64, q_Suf|ShortForm|DefaultSize|NoRex64, { Reg64, 0, 0 } }, 15277298Sobrien{"push", 1, 0xff, 6, Cpu64, q_Suf|Modrm|DefaultSize|NoRex64, { Reg64|WordMem, 0, 0 } }, 15377298Sobrien{"push", 1, 0x6a, X, Cpu186|Cpu64, q_Suf|DefaultSize|NoRex64, { Imm8S, 0, 0} }, 15477298Sobrien{"push", 1, 0x68, X, Cpu186|Cpu64, q_Suf|DefaultSize|NoRex64, { Imm32S, 0, 0} }, 15577298Sobrien{"push", 1, 0x06, X, Cpu64, q_Suf|Seg2ShortForm|DefaultSize|NoRex64, { SReg2, 0, 0 } }, 15677298Sobrien{"push", 1, 0x0fa0, X, Cpu386|Cpu64, q_Suf|Seg3ShortForm|DefaultSize|NoRex64, { SReg3, 0, 0 } }, 15733965Sjdp 15877298Sobrien{"pusha", 0, 0x60, X, Cpu186|CpuNo64, wl_Suf|DefaultSize, { 0, 0, 0 } }, 15977298Sobrien 16060484Sobrien/* Pop instructions. */ 16177298Sobrien{"pop", 1, 0x58, X, CpuNo64, wl_Suf|ShortForm|DefaultSize, { WordReg, 0, 0 } }, 16277298Sobrien{"pop", 1, 0x8f, 0, CpuNo64, wl_Suf|Modrm|DefaultSize, { WordReg|WordMem, 0, 0 } }, 16360484Sobrien#define POP_SEG_SHORT 0x07 16477298Sobrien{"pop", 1, 0x07, X, CpuNo64, wl_Suf|Seg2ShortForm|DefaultSize, { SReg2, 0, 0 } }, 16577298Sobrien{"pop", 1, 0x0fa1, X, Cpu386|CpuNo64, wl_Suf|Seg3ShortForm|DefaultSize, { SReg3, 0, 0 } }, 16677298Sobrien/* In 64bit mode, the operand size is implicitly 64bit. */ 16777298Sobrien{"pop", 1, 0x58, X, Cpu64, q_Suf|ShortForm|DefaultSize|NoRex64, { Reg64, 0, 0 } }, 16877298Sobrien{"pop", 1, 0x8f, 0, Cpu64, q_Suf|Modrm|DefaultSize|NoRex64, { Reg64|WordMem, 0, 0 } }, 16977298Sobrien{"pop", 1, 0x07, X, Cpu64, q_Suf|Seg2ShortForm|DefaultSize|NoRex64, { SReg2, 0, 0 } }, 17077298Sobrien{"pop", 1, 0x0fa1, X, Cpu64, q_Suf|Seg3ShortForm|DefaultSize|NoRex64, { SReg3, 0, 0 } }, 17133965Sjdp 17277298Sobrien{"popa", 0, 0x61, X, Cpu186|CpuNo64, wl_Suf|DefaultSize, { 0, 0, 0 } }, 17377298Sobrien 17460484Sobrien/* Exchange instructions. 17577298Sobrien xchg commutes: we allow both operand orders. 17677298Sobrien 17777298Sobrien In the 64bit code, xchg eax, eax is reused for new nop instruction. 17877298Sobrien */ 17977298Sobrien{"xchg", 2, 0x90, X, CpuNo64, wl_Suf|ShortForm, { WordReg, Acc, 0 } }, 18077298Sobrien{"xchg", 2, 0x90, X, CpuNo64, wl_Suf|ShortForm, { Acc, WordReg, 0 } }, 18177298Sobrien{"xchg", 2, 0x86, X, 0, bwlq_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } }, 18277298Sobrien{"xchg", 2, 0x86, X, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, Reg, 0 } }, 18333965Sjdp 18460484Sobrien/* In/out from ports. */ 18577298Sobrien{"in", 2, 0xe4, X, 0, bwlq_Suf|W, { Imm8, Acc, 0 } }, 18677298Sobrien{"in", 2, 0xec, X, 0, bwlq_Suf|W, { InOutPortReg, Acc, 0 } }, 18777298Sobrien{"in", 1, 0xe4, X, 0, bwlq_Suf|W, { Imm8, 0, 0 } }, 18877298Sobrien{"in", 1, 0xec, X, 0, bwlq_Suf|W, { InOutPortReg, 0, 0 } }, 18977298Sobrien{"out", 2, 0xe6, X, 0, bwlq_Suf|W, { Acc, Imm8, 0 } }, 19077298Sobrien{"out", 2, 0xee, X, 0, bwlq_Suf|W, { Acc, InOutPortReg, 0 } }, 19177298Sobrien{"out", 1, 0xe6, X, 0, bwlq_Suf|W, { Imm8, 0, 0 } }, 19277298Sobrien{"out", 1, 0xee, X, 0, bwlq_Suf|W, { InOutPortReg, 0, 0 } }, 19333965Sjdp 19460484Sobrien/* Load effective address. */ 19577298Sobrien{"lea", 2, 0x8d, X, 0, wlq_Suf|Modrm, { WordMem, WordReg, 0 } }, 19633965Sjdp 19760484Sobrien/* Load segment registers from memory. */ 19877298Sobrien{"lds", 2, 0xc5, X, CpuNo64, wlq_Suf|Modrm, { WordMem, WordReg, 0} }, 19977298Sobrien{"les", 2, 0xc4, X, CpuNo64, wlq_Suf|Modrm, { WordMem, WordReg, 0} }, 20077298Sobrien{"lfs", 2, 0x0fb4, X, Cpu386, wlq_Suf|Modrm, { WordMem, WordReg, 0} }, 20177298Sobrien{"lgs", 2, 0x0fb5, X, Cpu386, wlq_Suf|Modrm, { WordMem, WordReg, 0} }, 20277298Sobrien{"lss", 2, 0x0fb2, X, Cpu386, wlq_Suf|Modrm, { WordMem, WordReg, 0} }, 20333965Sjdp 20460484Sobrien/* Flags register instructions. */ 20577298Sobrien{"clc", 0, 0xf8, X, 0, NoSuf, { 0, 0, 0} }, 20677298Sobrien{"cld", 0, 0xfc, X, 0, NoSuf, { 0, 0, 0} }, 20777298Sobrien{"cli", 0, 0xfa, X, 0, NoSuf, { 0, 0, 0} }, 20877298Sobrien{"clts", 0, 0x0f06, X, Cpu286, NoSuf, { 0, 0, 0} }, 20977298Sobrien{"cmc", 0, 0xf5, X, 0, NoSuf, { 0, 0, 0} }, 21077298Sobrien{"lahf", 0, 0x9f, X, CpuNo64,NoSuf, { 0, 0, 0} }, 21177298Sobrien{"sahf", 0, 0x9e, X, CpuNo64,NoSuf, { 0, 0, 0} }, 21277298Sobrien{"pushf", 0, 0x9c, X, CpuNo64,wlq_Suf|DefaultSize, { 0, 0, 0} }, 21377298Sobrien{"pushf", 0, 0x9c, X, Cpu64, q_Suf|DefaultSize|NoRex64,{ 0, 0, 0} }, 21477298Sobrien{"popf", 0, 0x9d, X, CpuNo64,wlq_Suf|DefaultSize, { 0, 0, 0} }, 21577298Sobrien{"popf", 0, 0x9d, X, Cpu64, q_Suf|DefaultSize|NoRex64,{ 0, 0, 0} }, 21677298Sobrien{"stc", 0, 0xf9, X, 0, NoSuf, { 0, 0, 0} }, 21777298Sobrien{"std", 0, 0xfd, X, 0, NoSuf, { 0, 0, 0} }, 21877298Sobrien{"sti", 0, 0xfb, X, 0, NoSuf, { 0, 0, 0} }, 21933965Sjdp 22060484Sobrien/* Arithmetic. */ 22177298Sobrien{"add", 2, 0x00, X, 0, bwlq_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 22277298Sobrien{"add", 2, 0x83, 0, 0, wlq_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 22377298Sobrien{"add", 2, 0x04, X, 0, bwlq_Suf|W, { EncImm, Acc, 0} }, 22477298Sobrien{"add", 2, 0x80, 0, 0, bwlq_Suf|W|Modrm, { EncImm, Reg|AnyMem, 0} }, 22533965Sjdp 22677298Sobrien{"inc", 1, 0x40, X, CpuNo64,wl_Suf|ShortForm, { WordReg, 0, 0} }, 22777298Sobrien{"inc", 1, 0xfe, 0, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 22833965Sjdp 22977298Sobrien{"sub", 2, 0x28, X, 0, bwlq_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 23077298Sobrien{"sub", 2, 0x83, 5, 0, wlq_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 23177298Sobrien{"sub", 2, 0x2c, X, 0, bwlq_Suf|W, { EncImm, Acc, 0} }, 23277298Sobrien{"sub", 2, 0x80, 5, 0, bwlq_Suf|W|Modrm, { EncImm, Reg|AnyMem, 0} }, 23333965Sjdp 23477298Sobrien{"dec", 1, 0x48, X, CpuNo64, wl_Suf|ShortForm, { WordReg, 0, 0} }, 23577298Sobrien{"dec", 1, 0xfe, 1, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 23633965Sjdp 23777298Sobrien{"sbb", 2, 0x18, X, 0, bwlq_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 23877298Sobrien{"sbb", 2, 0x83, 3, 0, wlq_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 23977298Sobrien{"sbb", 2, 0x1c, X, 0, bwlq_Suf|W, { EncImm, Acc, 0} }, 24077298Sobrien{"sbb", 2, 0x80, 3, 0, bwlq_Suf|W|Modrm, { EncImm, Reg|AnyMem, 0} }, 24133965Sjdp 24277298Sobrien{"cmp", 2, 0x38, X, 0, bwlq_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 24377298Sobrien{"cmp", 2, 0x83, 7, 0, wlq_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 24477298Sobrien{"cmp", 2, 0x3c, X, 0, bwlq_Suf|W, { EncImm, Acc, 0} }, 24577298Sobrien{"cmp", 2, 0x80, 7, 0, bwlq_Suf|W|Modrm, { EncImm, Reg|AnyMem, 0} }, 24633965Sjdp 24777298Sobrien{"test", 2, 0x84, X, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, Reg, 0} }, 24877298Sobrien{"test", 2, 0x84, X, 0, bwlq_Suf|W|Modrm, { Reg, Reg|AnyMem, 0} }, 24977298Sobrien{"test", 2, 0xa8, X, 0, bwlq_Suf|W, { EncImm, Acc, 0} }, 25077298Sobrien{"test", 2, 0xf6, 0, 0, bwlq_Suf|W|Modrm, { EncImm, Reg|AnyMem, 0} }, 25133965Sjdp 25277298Sobrien{"and", 2, 0x20, X, 0, bwlq_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 25377298Sobrien{"and", 2, 0x83, 4, 0, wlq_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 25477298Sobrien{"and", 2, 0x24, X, 0, bwlq_Suf|W, { EncImm, Acc, 0} }, 25577298Sobrien{"and", 2, 0x80, 4, 0, bwlq_Suf|W|Modrm, { EncImm, Reg|AnyMem, 0} }, 25633965Sjdp 25777298Sobrien{"or", 2, 0x08, X, 0, bwlq_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 25877298Sobrien{"or", 2, 0x83, 1, 0, wlq_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 25977298Sobrien{"or", 2, 0x0c, X, 0, bwlq_Suf|W, { EncImm, Acc, 0} }, 26077298Sobrien{"or", 2, 0x80, 1, 0, bwlq_Suf|W|Modrm, { EncImm, Reg|AnyMem, 0} }, 26133965Sjdp 26277298Sobrien{"xor", 2, 0x30, X, 0, bwlq_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 26377298Sobrien{"xor", 2, 0x83, 6, 0, wlq_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 26477298Sobrien{"xor", 2, 0x34, X, 0, bwlq_Suf|W, { EncImm, Acc, 0} }, 26577298Sobrien{"xor", 2, 0x80, 6, 0, bwlq_Suf|W|Modrm, { EncImm, Reg|AnyMem, 0} }, 26633965Sjdp 26761843Sobrien/* clr with 1 operand is really xor with 2 operands. */ 26877298Sobrien{"clr", 1, 0x30, X, 0, bwlq_Suf|W|Modrm|regKludge, { Reg, 0, 0 } }, 26933965Sjdp 27077298Sobrien{"adc", 2, 0x10, X, 0, bwlq_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 27177298Sobrien{"adc", 2, 0x83, 2, 0, wlq_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 27277298Sobrien{"adc", 2, 0x14, X, 0, bwlq_Suf|W, { EncImm, Acc, 0} }, 27377298Sobrien{"adc", 2, 0x80, 2, 0, bwlq_Suf|W|Modrm, { EncImm, Reg|AnyMem, 0} }, 27433965Sjdp 27577298Sobrien{"neg", 1, 0xf6, 3, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 27677298Sobrien{"not", 1, 0xf6, 2, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 27733965Sjdp 27877298Sobrien{"aaa", 0, 0x37, X, 0, NoSuf, { 0, 0, 0} }, 27977298Sobrien{"aas", 0, 0x3f, X, 0, NoSuf, { 0, 0, 0} }, 28077298Sobrien{"daa", 0, 0x27, X, 0, NoSuf, { 0, 0, 0} }, 28177298Sobrien{"das", 0, 0x2f, X, 0, NoSuf, { 0, 0, 0} }, 28277298Sobrien{"aad", 0, 0xd50a, X, 0, NoSuf, { 0, 0, 0} }, 28377298Sobrien{"aad", 1, 0xd5, X, 0, NoSuf, { Imm8S, 0, 0} }, 28477298Sobrien{"aam", 0, 0xd40a, X, 0, NoSuf, { 0, 0, 0} }, 28577298Sobrien{"aam", 1, 0xd4, X, 0, NoSuf, { Imm8S, 0, 0} }, 28633965Sjdp 28760484Sobrien/* Conversion insns. */ 28860484Sobrien/* Intel naming */ 28977298Sobrien{"cbw", 0, 0x98, X, 0, NoSuf|Size16, { 0, 0, 0} }, 29077298Sobrien{"cdqe", 0, 0x98, X, Cpu64, NoSuf|Size64, { 0, 0, 0} }, 29177298Sobrien{"cwde", 0, 0x98, X, 0, NoSuf|Size32, { 0, 0, 0} }, 29277298Sobrien{"cwd", 0, 0x99, X, 0, NoSuf|Size16, { 0, 0, 0} }, 29377298Sobrien{"cdq", 0, 0x99, X, 0, NoSuf|Size32, { 0, 0, 0} }, 29477298Sobrien{"cqo", 0, 0x99, X, Cpu64, NoSuf|Size64, { 0, 0, 0} }, 29560484Sobrien/* AT&T naming */ 29677298Sobrien{"cbtw", 0, 0x98, X, 0, NoSuf|Size16, { 0, 0, 0} }, 29777298Sobrien{"cltq", 0, 0x98, X, Cpu64, NoSuf|Size64, { 0, 0, 0} }, 29877298Sobrien{"cwtl", 0, 0x98, X, 0, NoSuf|Size32, { 0, 0, 0} }, 29977298Sobrien{"cwtd", 0, 0x99, X, 0, NoSuf|Size16, { 0, 0, 0} }, 30077298Sobrien{"cltd", 0, 0x99, X, 0, NoSuf|Size32, { 0, 0, 0} }, 30177298Sobrien{"cqto", 0, 0x99, X, Cpu64, NoSuf|Size64, { 0, 0, 0} }, 30233965Sjdp 30333965Sjdp/* Warning! the mul/imul (opcode 0xf6) must only have 1 operand! They are 30433965Sjdp expanding 64-bit multiplies, and *cannot* be selected to accomplish 30533965Sjdp 'imul %ebx, %eax' (opcode 0x0faf must be used in this case) 30660484Sobrien These multiplies can only be selected with single operand forms. */ 30777298Sobrien{"mul", 1, 0xf6, 4, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 30877298Sobrien{"imul", 1, 0xf6, 5, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 30977298Sobrien{"imul", 2, 0x0faf, X, Cpu386, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 31077298Sobrien{"imul", 3, 0x6b, X, Cpu186, wlq_Suf|Modrm, { Imm8S, WordReg|WordMem, WordReg} }, 31177298Sobrien{"imul", 3, 0x69, X, Cpu186, wlq_Suf|Modrm, { Imm16|Imm32S|Imm32, WordReg|WordMem, WordReg} }, 31260484Sobrien/* imul with 2 operands mimics imul with 3 by putting the register in 31360484Sobrien both i.rm.reg & i.rm.regmem fields. regKludge enables this 31460484Sobrien transformation. */ 31577298Sobrien{"imul", 2, 0x6b, X, Cpu186, wlq_Suf|Modrm|regKludge,{ Imm8S, WordReg, 0} }, 31677298Sobrien{"imul", 2, 0x69, X, Cpu186, wlq_Suf|Modrm|regKludge,{ Imm16|Imm32S|Imm32, WordReg, 0} }, 31733965Sjdp 31877298Sobrien{"div", 1, 0xf6, 6, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 31977298Sobrien{"div", 2, 0xf6, 6, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, Acc, 0} }, 32077298Sobrien{"idiv", 1, 0xf6, 7, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 32177298Sobrien{"idiv", 2, 0xf6, 7, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, Acc, 0} }, 32233965Sjdp 32377298Sobrien{"rol", 2, 0xd0, 0, 0, bwlq_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 32477298Sobrien{"rol", 2, 0xc0, 0, Cpu186, bwlq_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 32577298Sobrien{"rol", 2, 0xd2, 0, 0, bwlq_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 32677298Sobrien{"rol", 1, 0xd0, 0, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 32733965Sjdp 32877298Sobrien{"ror", 2, 0xd0, 1, 0, bwlq_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 32977298Sobrien{"ror", 2, 0xc0, 1, Cpu186, bwlq_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 33077298Sobrien{"ror", 2, 0xd2, 1, 0, bwlq_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 33177298Sobrien{"ror", 1, 0xd0, 1, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 33233965Sjdp 33377298Sobrien{"rcl", 2, 0xd0, 2, 0, bwlq_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 33477298Sobrien{"rcl", 2, 0xc0, 2, Cpu186, bwlq_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 33577298Sobrien{"rcl", 2, 0xd2, 2, 0, bwlq_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 33677298Sobrien{"rcl", 1, 0xd0, 2, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 33733965Sjdp 33877298Sobrien{"rcr", 2, 0xd0, 3, 0, bwlq_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 33977298Sobrien{"rcr", 2, 0xc0, 3, Cpu186, bwlq_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 34077298Sobrien{"rcr", 2, 0xd2, 3, 0, bwlq_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 34177298Sobrien{"rcr", 1, 0xd0, 3, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 34233965Sjdp 34377298Sobrien{"sal", 2, 0xd0, 4, 0, bwlq_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 34477298Sobrien{"sal", 2, 0xc0, 4, Cpu186, bwlq_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 34577298Sobrien{"sal", 2, 0xd2, 4, 0, bwlq_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 34677298Sobrien{"sal", 1, 0xd0, 4, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 34733965Sjdp 34877298Sobrien{"shl", 2, 0xd0, 4, 0, bwlq_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 34977298Sobrien{"shl", 2, 0xc0, 4, Cpu186, bwlq_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 35077298Sobrien{"shl", 2, 0xd2, 4, 0, bwlq_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 35177298Sobrien{"shl", 1, 0xd0, 4, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 35233965Sjdp 35377298Sobrien{"shr", 2, 0xd0, 5, 0, bwlq_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 35477298Sobrien{"shr", 2, 0xc0, 5, Cpu186, bwlq_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 35577298Sobrien{"shr", 2, 0xd2, 5, 0, bwlq_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 35677298Sobrien{"shr", 1, 0xd0, 5, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 35733965Sjdp 35877298Sobrien{"sar", 2, 0xd0, 7, 0, bwlq_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 35977298Sobrien{"sar", 2, 0xc0, 7, Cpu186, bwlq_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 36077298Sobrien{"sar", 2, 0xd2, 7, 0, bwlq_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 36177298Sobrien{"sar", 1, 0xd0, 7, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 36261843Sobrien 36377298Sobrien{"shld", 3, 0x0fa4, X, Cpu386, wlq_Suf|Modrm, { Imm8, WordReg, WordReg|WordMem} }, 36477298Sobrien{"shld", 3, 0x0fa5, X, Cpu386, wlq_Suf|Modrm, { ShiftCount, WordReg, WordReg|WordMem} }, 36577298Sobrien{"shld", 2, 0x0fa5, X, Cpu386, wlq_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, 36661843Sobrien 36777298Sobrien{"shrd", 3, 0x0fac, X, Cpu386, wlq_Suf|Modrm, { Imm8, WordReg, WordReg|WordMem} }, 36877298Sobrien{"shrd", 3, 0x0fad, X, Cpu386, wlq_Suf|Modrm, { ShiftCount, WordReg, WordReg|WordMem} }, 36977298Sobrien{"shrd", 2, 0x0fad, X, Cpu386, wlq_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, 37077298Sobrien 37160484Sobrien/* Control transfer instructions. */ 37277298Sobrien{"call", 1, 0xe8, X, 0, wlq_Suf|JumpDword|DefaultSize, { Disp16|Disp32, 0, 0} }, 37377298Sobrien{"call", 1, 0xff, 2, 0, wlq_Suf|Modrm|DefaultSize, { WordReg|WordMem|JumpAbsolute, 0, 0} }, 37460484Sobrien/* Intel Syntax */ 37577298Sobrien{"call", 2, 0x9a, X, CpuNo64,wlq_Suf|JumpInterSegment|DefaultSize, { Imm16, Imm16|Imm32, 0} }, 37660484Sobrien/* Intel Syntax */ 37777298Sobrien{"call", 1, 0xff, 3, 0, x_Suf|Modrm|DefaultSize, { WordMem, 0, 0} }, 37877298Sobrien{"lcall", 2, 0x9a, X, CpuNo64, wl_Suf|JumpInterSegment|DefaultSize, { Imm16, Imm16|Imm32, 0} }, 37977298Sobrien{"lcall", 1, 0xff, 3, CpuNo64, wl_Suf|Modrm|DefaultSize, { WordMem|JumpAbsolute, 0, 0} }, 38077298Sobrien{"lcall", 1, 0xff, 3, Cpu64, q_Suf|Modrm|DefaultSize|NoRex64,{ WordMem|JumpAbsolute, 0, 0} }, 38133965Sjdp 38233965Sjdp#define JUMP_PC_RELATIVE 0xeb 38377298Sobrien{"jmp", 1, 0xeb, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 38477298Sobrien{"jmp", 1, 0xff, 4, 0, wlq_Suf|Modrm, { WordReg|WordMem|JumpAbsolute, 0, 0} }, 38560484Sobrien/* Intel Syntax */ 38677298Sobrien{"jmp", 2, 0xea, X, CpuNo64,wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} }, 38760484Sobrien/* Intel Syntax */ 38877298Sobrien{"jmp", 1, 0xff, 5, 0, x_Suf|Modrm, { WordMem, 0, 0} }, 38977298Sobrien{"ljmp", 2, 0xea, X, CpuNo64, wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} }, 39077298Sobrien{"ljmp", 1, 0xff, 5, CpuNo64, wl_Suf|Modrm, { WordMem|JumpAbsolute, 0, 0} }, 39177298Sobrien{"ljmp", 1, 0xff, 5, Cpu64, q_Suf|Modrm|NoRex64, { WordMem|JumpAbsolute, 0, 0} }, 39233965Sjdp 39377298Sobrien{"ret", 0, 0xc3, X, CpuNo64,wlq_Suf|DefaultSize, { 0, 0, 0} }, 39477298Sobrien{"ret", 1, 0xc2, X, CpuNo64,wlq_Suf|DefaultSize, { Imm16, 0, 0} }, 39577298Sobrien{"ret", 0, 0xc3, X, Cpu64, q_Suf|DefaultSize|NoRex64,{ 0, 0, 0} }, 39677298Sobrien{"ret", 1, 0xc2, X, Cpu64, q_Suf|DefaultSize|NoRex64,{ Imm16, 0, 0} }, 39777298Sobrien{"lret", 0, 0xcb, X, 0, wlq_Suf|DefaultSize, { 0, 0, 0} }, 39877298Sobrien{"lret", 1, 0xca, X, 0, wlq_Suf|DefaultSize, { Imm16, 0, 0} }, 39977298Sobrien{"enter", 2, 0xc8, X, Cpu186, wlq_Suf|DefaultSize, { Imm16, Imm8, 0} }, 40077298Sobrien{"leave", 0, 0xc9, X, Cpu186, wlq_Suf|DefaultSize, { 0, 0, 0} }, 40133965Sjdp 40260484Sobrien/* Conditional jumps. */ 40377298Sobrien{"jo", 1, 0x70, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 40477298Sobrien{"jno", 1, 0x71, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 40577298Sobrien{"jb", 1, 0x72, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 40677298Sobrien{"jc", 1, 0x72, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 40777298Sobrien{"jnae", 1, 0x72, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 40877298Sobrien{"jnb", 1, 0x73, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 40977298Sobrien{"jnc", 1, 0x73, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 41077298Sobrien{"jae", 1, 0x73, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 41177298Sobrien{"je", 1, 0x74, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 41277298Sobrien{"jz", 1, 0x74, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 41377298Sobrien{"jne", 1, 0x75, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 41477298Sobrien{"jnz", 1, 0x75, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 41577298Sobrien{"jbe", 1, 0x76, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 41677298Sobrien{"jna", 1, 0x76, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 41777298Sobrien{"jnbe", 1, 0x77, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 41877298Sobrien{"ja", 1, 0x77, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 41977298Sobrien{"js", 1, 0x78, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 42077298Sobrien{"jns", 1, 0x79, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 42177298Sobrien{"jp", 1, 0x7a, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 42277298Sobrien{"jpe", 1, 0x7a, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 42377298Sobrien{"jnp", 1, 0x7b, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 42477298Sobrien{"jpo", 1, 0x7b, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 42577298Sobrien{"jl", 1, 0x7c, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 42677298Sobrien{"jnge", 1, 0x7c, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 42777298Sobrien{"jnl", 1, 0x7d, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 42877298Sobrien{"jge", 1, 0x7d, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 42977298Sobrien{"jle", 1, 0x7e, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 43077298Sobrien{"jng", 1, 0x7e, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 43177298Sobrien{"jnle", 1, 0x7f, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 43277298Sobrien{"jg", 1, 0x7f, X, 0, NoSuf|Jump, { Disp, 0, 0} }, 43333965Sjdp 43438889Sjdp/* jcxz vs. jecxz is chosen on the basis of the address size prefix. */ 43577298Sobrien{"jcxz", 1, 0xe3, X, 0, NoSuf|JumpByte|Size16, { Disp, 0, 0} }, 43677298Sobrien{"jecxz", 1, 0xe3, X, 0, NoSuf|JumpByte|Size32, { Disp, 0, 0} }, 43733965Sjdp 43860484Sobrien/* The loop instructions also use the address size prefix to select 43960484Sobrien %cx rather than %ecx for the loop count, so the `w' form of these 44060484Sobrien instructions emit an address size prefix rather than a data size 44160484Sobrien prefix. */ 44277298Sobrien{"loop", 1, 0xe2, X, 0, wlq_Suf|JumpByte, { Disp, 0, 0} }, 44377298Sobrien{"loopz", 1, 0xe1, X, 0, wlq_Suf|JumpByte, { Disp, 0, 0} }, 44477298Sobrien{"loope", 1, 0xe1, X, 0, wlq_Suf|JumpByte, { Disp, 0, 0} }, 44577298Sobrien{"loopnz", 1, 0xe0, X, 0, wlq_Suf|JumpByte, { Disp, 0, 0} }, 44677298Sobrien{"loopne", 1, 0xe0, X, 0, wlq_Suf|JumpByte, { Disp, 0, 0} }, 44733965Sjdp 44860484Sobrien/* Set byte on flag instructions. */ 44977298Sobrien{"seto", 1, 0x0f90, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 45077298Sobrien{"setno", 1, 0x0f91, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 45177298Sobrien{"setb", 1, 0x0f92, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 45277298Sobrien{"setc", 1, 0x0f92, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 45377298Sobrien{"setnae", 1, 0x0f92, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 45477298Sobrien{"setnb", 1, 0x0f93, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 45577298Sobrien{"setnc", 1, 0x0f93, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 45677298Sobrien{"setae", 1, 0x0f93, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 45777298Sobrien{"sete", 1, 0x0f94, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 45877298Sobrien{"setz", 1, 0x0f94, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 45977298Sobrien{"setne", 1, 0x0f95, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 46077298Sobrien{"setnz", 1, 0x0f95, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 46177298Sobrien{"setbe", 1, 0x0f96, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 46277298Sobrien{"setna", 1, 0x0f96, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 46377298Sobrien{"setnbe", 1, 0x0f97, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 46477298Sobrien{"seta", 1, 0x0f97, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 46577298Sobrien{"sets", 1, 0x0f98, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 46677298Sobrien{"setns", 1, 0x0f99, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 46777298Sobrien{"setp", 1, 0x0f9a, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 46877298Sobrien{"setpe", 1, 0x0f9a, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 46977298Sobrien{"setnp", 1, 0x0f9b, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 47077298Sobrien{"setpo", 1, 0x0f9b, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 47177298Sobrien{"setl", 1, 0x0f9c, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 47277298Sobrien{"setnge", 1, 0x0f9c, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 47377298Sobrien{"setnl", 1, 0x0f9d, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 47477298Sobrien{"setge", 1, 0x0f9d, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 47577298Sobrien{"setle", 1, 0x0f9e, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 47677298Sobrien{"setng", 1, 0x0f9e, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 47777298Sobrien{"setnle", 1, 0x0f9f, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 47877298Sobrien{"setg", 1, 0x0f9f, 0, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 47933965Sjdp 48060484Sobrien/* String manipulation. */ 48177298Sobrien{"cmps", 0, 0xa6, X, 0, bwlq_Suf|W|IsString, { 0, 0, 0} }, 48277298Sobrien{"cmps", 2, 0xa6, X, 0, bwlq_Suf|W|IsString, { AnyMem|EsSeg, AnyMem, 0} }, 48377298Sobrien{"scmp", 0, 0xa6, X, 0, bwlq_Suf|W|IsString, { 0, 0, 0} }, 48477298Sobrien{"scmp", 2, 0xa6, X, 0, bwlq_Suf|W|IsString, { AnyMem|EsSeg, AnyMem, 0} }, 48577298Sobrien{"ins", 0, 0x6c, X, Cpu186, bwlq_Suf|W|IsString, { 0, 0, 0} }, 48677298Sobrien{"ins", 2, 0x6c, X, Cpu186, bwlq_Suf|W|IsString, { InOutPortReg, AnyMem|EsSeg, 0} }, 48777298Sobrien{"outs", 0, 0x6e, X, Cpu186, bwlq_Suf|W|IsString, { 0, 0, 0} }, 48877298Sobrien{"outs", 2, 0x6e, X, Cpu186, bwlq_Suf|W|IsString, { AnyMem, InOutPortReg, 0} }, 48977298Sobrien{"lods", 0, 0xac, X, 0, bwlq_Suf|W|IsString, { 0, 0, 0} }, 49077298Sobrien{"lods", 1, 0xac, X, 0, bwlq_Suf|W|IsString, { AnyMem, 0, 0} }, 49177298Sobrien{"lods", 2, 0xac, X, 0, bwlq_Suf|W|IsString, { AnyMem, Acc, 0} }, 49277298Sobrien{"slod", 0, 0xac, X, 0, bwlq_Suf|W|IsString, { 0, 0, 0} }, 49377298Sobrien{"slod", 1, 0xac, X, 0, bwlq_Suf|W|IsString, { AnyMem, 0, 0} }, 49477298Sobrien{"slod", 2, 0xac, X, 0, bwlq_Suf|W|IsString, { AnyMem, Acc, 0} }, 49577298Sobrien{"movs", 0, 0xa4, X, 0, bwlq_Suf|W|IsString, { 0, 0, 0} }, 49677298Sobrien{"movs", 2, 0xa4, X, 0, bwlq_Suf|W|IsString, { AnyMem, AnyMem|EsSeg, 0} }, 49777298Sobrien{"smov", 0, 0xa4, X, 0, bwlq_Suf|W|IsString, { 0, 0, 0} }, 49877298Sobrien{"smov", 2, 0xa4, X, 0, bwlq_Suf|W|IsString, { AnyMem, AnyMem|EsSeg, 0} }, 49977298Sobrien{"scas", 0, 0xae, X, 0, bwlq_Suf|W|IsString, { 0, 0, 0} }, 50077298Sobrien{"scas", 1, 0xae, X, 0, bwlq_Suf|W|IsString, { AnyMem|EsSeg, 0, 0} }, 50177298Sobrien{"scas", 2, 0xae, X, 0, bwlq_Suf|W|IsString, { AnyMem|EsSeg, Acc, 0} }, 50277298Sobrien{"ssca", 0, 0xae, X, 0, bwlq_Suf|W|IsString, { 0, 0, 0} }, 50377298Sobrien{"ssca", 1, 0xae, X, 0, bwlq_Suf|W|IsString, { AnyMem|EsSeg, 0, 0} }, 50477298Sobrien{"ssca", 2, 0xae, X, 0, bwlq_Suf|W|IsString, { AnyMem|EsSeg, Acc, 0} }, 50577298Sobrien{"stos", 0, 0xaa, X, 0, bwlq_Suf|W|IsString, { 0, 0, 0} }, 50677298Sobrien{"stos", 1, 0xaa, X, 0, bwlq_Suf|W|IsString, { AnyMem|EsSeg, 0, 0} }, 50777298Sobrien{"stos", 2, 0xaa, X, 0, bwlq_Suf|W|IsString, { Acc, AnyMem|EsSeg, 0} }, 50877298Sobrien{"ssto", 0, 0xaa, X, 0, bwlq_Suf|W|IsString, { 0, 0, 0} }, 50977298Sobrien{"ssto", 1, 0xaa, X, 0, bwlq_Suf|W|IsString, { AnyMem|EsSeg, 0, 0} }, 51077298Sobrien{"ssto", 2, 0xaa, X, 0, bwlq_Suf|W|IsString, { Acc, AnyMem|EsSeg, 0} }, 51177298Sobrien{"xlat", 0, 0xd7, X, 0, b_Suf|IsString, { 0, 0, 0} }, 51277298Sobrien{"xlat", 1, 0xd7, X, 0, b_Suf|IsString, { AnyMem, 0, 0} }, 51333965Sjdp 51460484Sobrien/* Bit manipulation. */ 51577298Sobrien{"bsf", 2, 0x0fbc, X, Cpu386, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 51677298Sobrien{"bsr", 2, 0x0fbd, X, Cpu386, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 51777298Sobrien{"bt", 2, 0x0fa3, X, Cpu386, wlq_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, 51877298Sobrien{"bt", 2, 0x0fba, 4, Cpu386, wlq_Suf|Modrm, { Imm8, WordReg|WordMem, 0} }, 51977298Sobrien{"btc", 2, 0x0fbb, X, Cpu386, wlq_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, 52077298Sobrien{"btc", 2, 0x0fba, 7, Cpu386, wlq_Suf|Modrm, { Imm8, WordReg|WordMem, 0} }, 52177298Sobrien{"btr", 2, 0x0fb3, X, Cpu386, wlq_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, 52277298Sobrien{"btr", 2, 0x0fba, 6, Cpu386, wlq_Suf|Modrm, { Imm8, WordReg|WordMem, 0} }, 52377298Sobrien{"bts", 2, 0x0fab, X, Cpu386, wlq_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, 52477298Sobrien{"bts", 2, 0x0fba, 5, Cpu386, wlq_Suf|Modrm, { Imm8, WordReg|WordMem, 0} }, 52533965Sjdp 52660484Sobrien/* Interrupts & op. sys insns. */ 52733965Sjdp/* See gas/config/tc-i386.c for conversion of 'int $3' into the special 52860484Sobrien int 3 insn. */ 52933965Sjdp#define INT_OPCODE 0xcd 53033965Sjdp#define INT3_OPCODE 0xcc 53177298Sobrien{"int", 1, 0xcd, X, 0, NoSuf, { Imm8, 0, 0} }, 53277298Sobrien{"int3", 0, 0xcc, X, 0, NoSuf, { 0, 0, 0} }, 53377298Sobrien{"into", 0, 0xce, X, 0, NoSuf, { 0, 0, 0} }, 53477298Sobrien{"iret", 0, 0xcf, X, 0, wlq_Suf|DefaultSize, { 0, 0, 0} }, 53560484Sobrien/* i386sl, i486sl, later 486, and Pentium. */ 53677298Sobrien{"rsm", 0, 0x0faa, X, Cpu386, NoSuf, { 0, 0, 0} }, 53733965Sjdp 53877298Sobrien{"bound", 2, 0x62, X, Cpu186, wlq_Suf|Modrm, { WordReg, WordMem, 0} }, 53933965Sjdp 54077298Sobrien{"hlt", 0, 0xf4, X, 0, NoSuf, { 0, 0, 0} }, 54160484Sobrien/* nop is actually 'xchgl %eax, %eax'. */ 54277298Sobrien{"nop", 0, 0x90, X, 0, NoSuf, { 0, 0, 0} }, 54333965Sjdp 54460484Sobrien/* Protection control. */ 54577298Sobrien{"arpl", 2, 0x63, X, Cpu286, w_Suf|Modrm|IgnoreSize,{ Reg16, Reg16|ShortMem, 0} }, 54677298Sobrien{"lar", 2, 0x0f02, X, Cpu286, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 54777298Sobrien{"lgdt", 1, 0x0f01, 2, Cpu286, wlq_Suf|Modrm, { WordMem, 0, 0} }, 54877298Sobrien{"lidt", 1, 0x0f01, 3, Cpu286, wlq_Suf|Modrm, { WordMem, 0, 0} }, 54977298Sobrien{"lldt", 1, 0x0f00, 2, Cpu286, w_Suf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, 55077298Sobrien{"lmsw", 1, 0x0f01, 6, Cpu286, w_Suf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, 55177298Sobrien{"lsl", 2, 0x0f03, X, Cpu286, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 55277298Sobrien{"ltr", 1, 0x0f00, 3, Cpu286, w_Suf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, 55333965Sjdp 55477298Sobrien{"sgdt", 1, 0x0f01, 0, Cpu286, wlq_Suf|Modrm, { WordMem, 0, 0} }, 55577298Sobrien{"sidt", 1, 0x0f01, 1, Cpu286, wlq_Suf|Modrm, { WordMem, 0, 0} }, 55677298Sobrien{"sldt", 1, 0x0f00, 0, Cpu286, wlq_Suf|Modrm, { WordReg|WordMem, 0, 0} }, 55777298Sobrien{"smsw", 1, 0x0f01, 4, Cpu286, wlq_Suf|Modrm, { WordReg|WordMem, 0, 0} }, 55877298Sobrien{"str", 1, 0x0f00, 1, Cpu286, w_Suf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, 55933965Sjdp 56077298Sobrien{"verr", 1, 0x0f00, 4, Cpu286, w_Suf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, 56177298Sobrien{"verw", 1, 0x0f00, 5, Cpu286, w_Suf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, 56233965Sjdp 56360484Sobrien/* Floating point instructions. */ 56433965Sjdp 56533965Sjdp/* load */ 56677298Sobrien{"fld", 1, 0xd9c0, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 56777298Sobrien{"fld", 1, 0xd9, 0, 0, sl_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 56877298Sobrien{"fld", 1, 0xd9c0, X, 0, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} }, 56960484Sobrien/* Intel Syntax */ 57077298Sobrien{"fld", 1, 0xdb, 5, 0, x_FP|Modrm, { LLongMem, 0, 0} }, 57177298Sobrien{"fild", 1, 0xdf, 0, 0, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 57260484Sobrien/* Intel Syntax */ 57377298Sobrien{"fildd", 1, 0xdf, 5, 0, FP|Modrm, { LLongMem, 0, 0} }, 57477298Sobrien{"fildq", 1, 0xdf, 5, 0, FP|Modrm, { LLongMem, 0, 0} }, 57577298Sobrien{"fildll", 1, 0xdf, 5, 0, FP|Modrm, { LLongMem, 0, 0} }, 57677298Sobrien{"fldt", 1, 0xdb, 5, 0, FP|Modrm, { LLongMem, 0, 0} }, 57777298Sobrien{"fbld", 1, 0xdf, 4, 0, FP|Modrm, { LLongMem, 0, 0} }, 57833965Sjdp 57933965Sjdp/* store (no pop) */ 58077298Sobrien{"fst", 1, 0xddd0, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 58177298Sobrien{"fst", 1, 0xd9, 2, 0, sl_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 58277298Sobrien{"fst", 1, 0xddd0, X, 0, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} }, 58377298Sobrien{"fist", 1, 0xdf, 2, 0, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 58433965Sjdp 58533965Sjdp/* store (with pop) */ 58677298Sobrien{"fstp", 1, 0xddd8, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 58777298Sobrien{"fstp", 1, 0xd9, 3, 0, sl_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 58877298Sobrien{"fstp", 1, 0xddd8, X, 0, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} }, 58960484Sobrien/* Intel Syntax */ 59077298Sobrien{"fstp", 1, 0xdb, 7, 0, x_FP|Modrm, { LLongMem, 0, 0} }, 59177298Sobrien{"fistp", 1, 0xdf, 3, 0, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 59260484Sobrien/* Intel Syntax */ 59377298Sobrien{"fistpd", 1, 0xdf, 7, 0, FP|Modrm, { LLongMem, 0, 0} }, 59477298Sobrien{"fistpq", 1, 0xdf, 7, 0, FP|Modrm, { LLongMem, 0, 0} }, 59577298Sobrien{"fistpll",1, 0xdf, 7, 0, FP|Modrm, { LLongMem, 0, 0} }, 59677298Sobrien{"fstpt", 1, 0xdb, 7, 0, FP|Modrm, { LLongMem, 0, 0} }, 59777298Sobrien{"fbstp", 1, 0xdf, 6, 0, FP|Modrm, { LLongMem, 0, 0} }, 59833965Sjdp 59933965Sjdp/* exchange %st<n> with %st0 */ 60077298Sobrien{"fxch", 1, 0xd9c8, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 60161843Sobrien/* alias for fxch %st(1) */ 60277298Sobrien{"fxch", 0, 0xd9c9, X, 0, FP, { 0, 0, 0} }, 60333965Sjdp 60433965Sjdp/* comparison (without pop) */ 60577298Sobrien{"fcom", 1, 0xd8d0, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 60661843Sobrien/* alias for fcom %st(1) */ 60777298Sobrien{"fcom", 0, 0xd8d1, X, 0, FP, { 0, 0, 0} }, 60877298Sobrien{"fcom", 1, 0xd8, 2, 0, sl_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 60977298Sobrien{"fcom", 1, 0xd8d0, X, 0, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} }, 61077298Sobrien{"ficom", 1, 0xde, 2, 0, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 61133965Sjdp 61233965Sjdp/* comparison (with pop) */ 61377298Sobrien{"fcomp", 1, 0xd8d8, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 61461843Sobrien/* alias for fcomp %st(1) */ 61577298Sobrien{"fcomp", 0, 0xd8d9, X, 0, FP, { 0, 0, 0} }, 61677298Sobrien{"fcomp", 1, 0xd8, 3, 0, sl_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 61777298Sobrien{"fcomp", 1, 0xd8d8, X, 0, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} }, 61877298Sobrien{"ficomp", 1, 0xde, 3, 0, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 61977298Sobrien{"fcompp", 0, 0xded9, X, 0, FP, { 0, 0, 0} }, 62033965Sjdp 62133965Sjdp/* unordered comparison (with pop) */ 62277298Sobrien{"fucom", 1, 0xdde0, X, Cpu286, FP|ShortForm, { FloatReg, 0, 0} }, 62361843Sobrien/* alias for fucom %st(1) */ 62477298Sobrien{"fucom", 0, 0xdde1, X, Cpu286, FP, { 0, 0, 0} }, 62577298Sobrien{"fucomp", 1, 0xdde8, X, Cpu286, FP|ShortForm, { FloatReg, 0, 0} }, 62661843Sobrien/* alias for fucomp %st(1) */ 62777298Sobrien{"fucomp", 0, 0xdde9, X, Cpu286, FP, { 0, 0, 0} }, 62877298Sobrien{"fucompp",0, 0xdae9, X, Cpu286, FP, { 0, 0, 0} }, 62933965Sjdp 63077298Sobrien{"ftst", 0, 0xd9e4, X, 0, FP, { 0, 0, 0} }, 63177298Sobrien{"fxam", 0, 0xd9e5, X, 0, FP, { 0, 0, 0} }, 63233965Sjdp 63333965Sjdp/* load constants into %st0 */ 63477298Sobrien{"fld1", 0, 0xd9e8, X, 0, FP, { 0, 0, 0} }, 63577298Sobrien{"fldl2t", 0, 0xd9e9, X, 0, FP, { 0, 0, 0} }, 63677298Sobrien{"fldl2e", 0, 0xd9ea, X, 0, FP, { 0, 0, 0} }, 63777298Sobrien{"fldpi", 0, 0xd9eb, X, 0, FP, { 0, 0, 0} }, 63877298Sobrien{"fldlg2", 0, 0xd9ec, X, 0, FP, { 0, 0, 0} }, 63977298Sobrien{"fldln2", 0, 0xd9ed, X, 0, FP, { 0, 0, 0} }, 64077298Sobrien{"fldz", 0, 0xd9ee, X, 0, FP, { 0, 0, 0} }, 64133965Sjdp 64233965Sjdp/* arithmetic */ 64333965Sjdp 64433965Sjdp/* add */ 64577298Sobrien{"fadd", 2, 0xd8c0, X, 0, FP|ShortForm|FloatD, { FloatReg, FloatAcc, 0} }, 64661843Sobrien/* alias for fadd %st(i), %st */ 64777298Sobrien{"fadd", 1, 0xd8c0, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 64860484Sobrien#if SYSV386_COMPAT 64961843Sobrien/* alias for faddp */ 65077298Sobrien{"fadd", 0, 0xdec1, X, 0, FP|Ugh, { 0, 0, 0} }, 65160484Sobrien#endif 65277298Sobrien{"fadd", 1, 0xd8, 0, 0, sl_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 65377298Sobrien{"fiadd", 1, 0xde, 0, 0, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 65433965Sjdp 65577298Sobrien{"faddp", 2, 0xdec0, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 65677298Sobrien{"faddp", 1, 0xdec0, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 65761843Sobrien/* alias for faddp %st, %st(1) */ 65877298Sobrien{"faddp", 0, 0xdec1, X, 0, FP, { 0, 0, 0} }, 65977298Sobrien{"faddp", 2, 0xdec0, X, 0, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} }, 66060484Sobrien 66160484Sobrien/* subtract */ 66277298Sobrien{"fsub", 2, 0xd8e0, X, 0, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} }, 66377298Sobrien{"fsub", 1, 0xd8e0, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 66460484Sobrien#if SYSV386_COMPAT 66561843Sobrien/* alias for fsubp */ 66677298Sobrien{"fsub", 0, 0xdee1, X, 0, FP|Ugh, { 0, 0, 0} }, 66733965Sjdp#endif 66877298Sobrien{"fsub", 1, 0xd8, 4, 0, sl_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 66977298Sobrien{"fisub", 1, 0xde, 4, 0, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 67060484Sobrien 67160484Sobrien#if SYSV386_COMPAT 67277298Sobrien{"fsubp", 2, 0xdee0, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 67377298Sobrien{"fsubp", 1, 0xdee0, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 67477298Sobrien{"fsubp", 0, 0xdee1, X, 0, FP, { 0, 0, 0} }, 67560484Sobrien#if OLDGCC_COMPAT 67677298Sobrien{"fsubp", 2, 0xdee0, X, 0, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} }, 67760484Sobrien#endif 67833965Sjdp#else 67977298Sobrien{"fsubp", 2, 0xdee8, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 68077298Sobrien{"fsubp", 1, 0xdee8, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 68177298Sobrien{"fsubp", 0, 0xdee9, X, 0, FP, { 0, 0, 0} }, 68233965Sjdp#endif 68333965Sjdp 68460484Sobrien/* subtract reverse */ 68577298Sobrien{"fsubr", 2, 0xd8e8, X, 0, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} }, 68677298Sobrien{"fsubr", 1, 0xd8e8, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 68760484Sobrien#if SYSV386_COMPAT 68861843Sobrien/* alias for fsubrp */ 68977298Sobrien{"fsubr", 0, 0xdee9, X, 0, FP|Ugh, { 0, 0, 0} }, 69033965Sjdp#endif 69177298Sobrien{"fsubr", 1, 0xd8, 5, 0, sl_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 69277298Sobrien{"fisubr", 1, 0xde, 5, 0, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 69360484Sobrien 69460484Sobrien#if SYSV386_COMPAT 69577298Sobrien{"fsubrp", 2, 0xdee8, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 69677298Sobrien{"fsubrp", 1, 0xdee8, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 69777298Sobrien{"fsubrp", 0, 0xdee9, X, 0, FP, { 0, 0, 0} }, 69860484Sobrien#if OLDGCC_COMPAT 69977298Sobrien{"fsubrp", 2, 0xdee8, X, 0, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} }, 70060484Sobrien#endif 70133965Sjdp#else 70277298Sobrien{"fsubrp", 2, 0xdee0, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 70377298Sobrien{"fsubrp", 1, 0xdee0, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 70477298Sobrien{"fsubrp", 0, 0xdee1, X, 0, FP, { 0, 0, 0} }, 70533965Sjdp#endif 70633965Sjdp 70760484Sobrien/* multiply */ 70877298Sobrien{"fmul", 2, 0xd8c8, X, 0, FP|ShortForm|FloatD, { FloatReg, FloatAcc, 0} }, 70977298Sobrien{"fmul", 1, 0xd8c8, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 71060484Sobrien#if SYSV386_COMPAT 71161843Sobrien/* alias for fmulp */ 71277298Sobrien{"fmul", 0, 0xdec9, X, 0, FP|Ugh, { 0, 0, 0} }, 71360484Sobrien#endif 71477298Sobrien{"fmul", 1, 0xd8, 1, 0, sl_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 71577298Sobrien{"fimul", 1, 0xde, 1, 0, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 71633965Sjdp 71777298Sobrien{"fmulp", 2, 0xdec8, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 71877298Sobrien{"fmulp", 1, 0xdec8, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 71977298Sobrien{"fmulp", 0, 0xdec9, X, 0, FP, { 0, 0, 0} }, 72077298Sobrien{"fmulp", 2, 0xdec8, X, 0, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} }, 72160484Sobrien 72260484Sobrien/* divide */ 72377298Sobrien{"fdiv", 2, 0xd8f0, X, 0, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} }, 72477298Sobrien{"fdiv", 1, 0xd8f0, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 72560484Sobrien#if SYSV386_COMPAT 72661843Sobrien/* alias for fdivp */ 72777298Sobrien{"fdiv", 0, 0xdef1, X, 0, FP|Ugh, { 0, 0, 0} }, 72833965Sjdp#endif 72977298Sobrien{"fdiv", 1, 0xd8, 6, 0, sl_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 73077298Sobrien{"fidiv", 1, 0xde, 6, 0, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 73160484Sobrien 73260484Sobrien#if SYSV386_COMPAT 73377298Sobrien{"fdivp", 2, 0xdef0, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 73477298Sobrien{"fdivp", 1, 0xdef0, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 73577298Sobrien{"fdivp", 0, 0xdef1, X, 0, FP, { 0, 0, 0} }, 73660484Sobrien#if OLDGCC_COMPAT 73777298Sobrien{"fdivp", 2, 0xdef0, X, 0, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} }, 73860484Sobrien#endif 73933965Sjdp#else 74077298Sobrien{"fdivp", 2, 0xdef8, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 74177298Sobrien{"fdivp", 1, 0xdef8, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 74277298Sobrien{"fdivp", 0, 0xdef9, X, 0, FP, { 0, 0, 0} }, 74333965Sjdp#endif 74433965Sjdp 74560484Sobrien/* divide reverse */ 74677298Sobrien{"fdivr", 2, 0xd8f8, X, 0, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} }, 74777298Sobrien{"fdivr", 1, 0xd8f8, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 74860484Sobrien#if SYSV386_COMPAT 74961843Sobrien/* alias for fdivrp */ 75077298Sobrien{"fdivr", 0, 0xdef9, X, 0, FP|Ugh, { 0, 0, 0} }, 75133965Sjdp#endif 75277298Sobrien{"fdivr", 1, 0xd8, 7, 0, sl_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 75377298Sobrien{"fidivr", 1, 0xde, 7, 0, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 75460484Sobrien 75560484Sobrien#if SYSV386_COMPAT 75677298Sobrien{"fdivrp", 2, 0xdef8, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 75777298Sobrien{"fdivrp", 1, 0xdef8, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 75877298Sobrien{"fdivrp", 0, 0xdef9, X, 0, FP, { 0, 0, 0} }, 75960484Sobrien#if OLDGCC_COMPAT 76077298Sobrien{"fdivrp", 2, 0xdef8, X, 0, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} }, 76160484Sobrien#endif 76233965Sjdp#else 76377298Sobrien{"fdivrp", 2, 0xdef0, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 76477298Sobrien{"fdivrp", 1, 0xdef0, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 76577298Sobrien{"fdivrp", 0, 0xdef1, X, 0, FP, { 0, 0, 0} }, 76633965Sjdp#endif 76733965Sjdp 76877298Sobrien{"f2xm1", 0, 0xd9f0, X, 0, FP, { 0, 0, 0} }, 76977298Sobrien{"fyl2x", 0, 0xd9f1, X, 0, FP, { 0, 0, 0} }, 77077298Sobrien{"fptan", 0, 0xd9f2, X, 0, FP, { 0, 0, 0} }, 77177298Sobrien{"fpatan", 0, 0xd9f3, X, 0, FP, { 0, 0, 0} }, 77277298Sobrien{"fxtract",0, 0xd9f4, X, 0, FP, { 0, 0, 0} }, 77377298Sobrien{"fprem1", 0, 0xd9f5, X, Cpu286, FP, { 0, 0, 0} }, 77477298Sobrien{"fdecstp",0, 0xd9f6, X, 0, FP, { 0, 0, 0} }, 77577298Sobrien{"fincstp",0, 0xd9f7, X, 0, FP, { 0, 0, 0} }, 77677298Sobrien{"fprem", 0, 0xd9f8, X, 0, FP, { 0, 0, 0} }, 77777298Sobrien{"fyl2xp1",0, 0xd9f9, X, 0, FP, { 0, 0, 0} }, 77877298Sobrien{"fsqrt", 0, 0xd9fa, X, 0, FP, { 0, 0, 0} }, 77977298Sobrien{"fsincos",0, 0xd9fb, X, Cpu286, FP, { 0, 0, 0} }, 78077298Sobrien{"frndint",0, 0xd9fc, X, 0, FP, { 0, 0, 0} }, 78177298Sobrien{"fscale", 0, 0xd9fd, X, 0, FP, { 0, 0, 0} }, 78277298Sobrien{"fsin", 0, 0xd9fe, X, Cpu286, FP, { 0, 0, 0} }, 78377298Sobrien{"fcos", 0, 0xd9ff, X, Cpu286, FP, { 0, 0, 0} }, 78477298Sobrien{"fchs", 0, 0xd9e0, X, 0, FP, { 0, 0, 0} }, 78577298Sobrien{"fabs", 0, 0xd9e1, X, 0, FP, { 0, 0, 0} }, 78633965Sjdp 78733965Sjdp/* processor control */ 78877298Sobrien{"fninit", 0, 0xdbe3, X, 0, FP, { 0, 0, 0} }, 78977298Sobrien{"finit", 0, 0xdbe3, X, 0, FP|FWait, { 0, 0, 0} }, 79077298Sobrien{"fldcw", 1, 0xd9, 5, 0, FP|Modrm, { ShortMem, 0, 0} }, 79177298Sobrien{"fnstcw", 1, 0xd9, 7, 0, FP|Modrm, { ShortMem, 0, 0} }, 79277298Sobrien{"fstcw", 1, 0xd9, 7, 0, FP|FWait|Modrm, { ShortMem, 0, 0} }, 79377298Sobrien{"fnstsw", 1, 0xdfe0, X, 0, FP, { Acc, 0, 0} }, 79477298Sobrien{"fnstsw", 1, 0xdd, 7, 0, FP|Modrm, { ShortMem, 0, 0} }, 79577298Sobrien{"fnstsw", 0, 0xdfe0, X, 0, FP, { 0, 0, 0} }, 79677298Sobrien{"fstsw", 1, 0xdfe0, X, 0, FP|FWait, { Acc, 0, 0} }, 79777298Sobrien{"fstsw", 1, 0xdd, 7, 0, FP|FWait|Modrm, { ShortMem, 0, 0} }, 79877298Sobrien{"fstsw", 0, 0xdfe0, X, 0, FP|FWait, { 0, 0, 0} }, 79977298Sobrien{"fnclex", 0, 0xdbe2, X, 0, FP, { 0, 0, 0} }, 80077298Sobrien{"fclex", 0, 0xdbe2, X, 0, FP|FWait, { 0, 0, 0} }, 80160484Sobrien/* Short forms of fldenv, fstenv use data size prefix. */ 80277298Sobrien{"fnstenv",1, 0xd9, 6, 0, sl_Suf|Modrm, { LLongMem, 0, 0} }, 80377298Sobrien{"fstenv", 1, 0xd9, 6, 0, sl_Suf|FWait|Modrm, { LLongMem, 0, 0} }, 80477298Sobrien{"fldenv", 1, 0xd9, 4, 0, sl_Suf|Modrm, { LLongMem, 0, 0} }, 80577298Sobrien{"fnsave", 1, 0xdd, 6, 0, sl_Suf|Modrm, { LLongMem, 0, 0} }, 80677298Sobrien{"fsave", 1, 0xdd, 6, 0, sl_Suf|FWait|Modrm, { LLongMem, 0, 0} }, 80777298Sobrien{"frstor", 1, 0xdd, 4, 0, sl_Suf|Modrm, { LLongMem, 0, 0} }, 80833965Sjdp 80977298Sobrien{"ffree", 1, 0xddc0, X, 0, FP|ShortForm, { FloatReg, 0, 0} }, 81033965Sjdp/* P6:free st(i), pop st */ 81177298Sobrien{"ffreep", 1, 0xdfc0, X, Cpu686, FP|ShortForm, { FloatReg, 0, 0} }, 81277298Sobrien{"fnop", 0, 0xd9d0, X, 0, FP, { 0, 0, 0} }, 81338889Sjdp#define FWAIT_OPCODE 0x9b 81477298Sobrien{"fwait", 0, 0x9b, X, 0, FP, { 0, 0, 0} }, 81533965Sjdp 81660484Sobrien/* Opcode prefixes; we allow them as separate insns too. */ 81733965Sjdp 81860484Sobrien#define ADDR_PREFIX_OPCODE 0x67 81977298Sobrien{"addr16", 0, 0x67, X, Cpu386, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} }, 82077298Sobrien{"addr32", 0, 0x67, X, Cpu386, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} }, 82177298Sobrien{"aword", 0, 0x67, X, Cpu386, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} }, 82277298Sobrien{"adword", 0, 0x67, X, Cpu386, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} }, 82360484Sobrien#define DATA_PREFIX_OPCODE 0x66 82477298Sobrien{"data16", 0, 0x66, X, Cpu386, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} }, 82577298Sobrien{"data32", 0, 0x66, X, Cpu386, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} }, 82677298Sobrien{"word", 0, 0x66, X, Cpu386, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} }, 82777298Sobrien{"dword", 0, 0x66, X, Cpu386, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} }, 82860484Sobrien#define LOCK_PREFIX_OPCODE 0xf0 82977298Sobrien{"lock", 0, 0xf0, X, 0, NoSuf|IsPrefix, { 0, 0, 0} }, 83077298Sobrien{"wait", 0, 0x9b, X, 0, NoSuf|IsPrefix, { 0, 0, 0} }, 83160484Sobrien#define CS_PREFIX_OPCODE 0x2e 83277298Sobrien{"cs", 0, 0x2e, X, 0, NoSuf|IsPrefix, { 0, 0, 0} }, 83360484Sobrien#define DS_PREFIX_OPCODE 0x3e 83477298Sobrien{"ds", 0, 0x3e, X, 0, NoSuf|IsPrefix, { 0, 0, 0} }, 83560484Sobrien#define ES_PREFIX_OPCODE 0x26 83677298Sobrien{"es", 0, 0x26, X, 0, NoSuf|IsPrefix, { 0, 0, 0} }, 83760484Sobrien#define FS_PREFIX_OPCODE 0x64 83877298Sobrien{"fs", 0, 0x64, X, Cpu386, NoSuf|IsPrefix, { 0, 0, 0} }, 83960484Sobrien#define GS_PREFIX_OPCODE 0x65 84077298Sobrien{"gs", 0, 0x65, X, Cpu386, NoSuf|IsPrefix, { 0, 0, 0} }, 84160484Sobrien#define SS_PREFIX_OPCODE 0x36 84277298Sobrien{"ss", 0, 0x36, X, 0, NoSuf|IsPrefix, { 0, 0, 0} }, 84360484Sobrien#define REPNE_PREFIX_OPCODE 0xf2 84460484Sobrien#define REPE_PREFIX_OPCODE 0xf3 84577298Sobrien{"rep", 0, 0xf3, X, 0, NoSuf|IsPrefix, { 0, 0, 0} }, 84677298Sobrien{"repe", 0, 0xf3, X, 0, NoSuf|IsPrefix, { 0, 0, 0} }, 84777298Sobrien{"repz", 0, 0xf3, X, 0, NoSuf|IsPrefix, { 0, 0, 0} }, 84877298Sobrien{"repne", 0, 0xf2, X, 0, NoSuf|IsPrefix, { 0, 0, 0} }, 84977298Sobrien{"repnz", 0, 0xf2, X, 0, NoSuf|IsPrefix, { 0, 0, 0} }, 85077298Sobrien{"rex", 0, 0x40, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 85177298Sobrien{"rexz", 0, 0x41, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 85277298Sobrien{"rexy", 0, 0x42, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 85377298Sobrien{"rexyz", 0, 0x43, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 85477298Sobrien{"rexx", 0, 0x44, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 85577298Sobrien{"rexxz", 0, 0x45, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 85677298Sobrien{"rexxy", 0, 0x46, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 85777298Sobrien{"rexxyz", 0, 0x47, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 85877298Sobrien{"rex64", 0, 0x48, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 85977298Sobrien{"rex64z", 0, 0x49, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 86077298Sobrien{"rex64y", 0, 0x4a, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 86177298Sobrien{"rex64yz",0, 0x4b, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 86277298Sobrien{"rex64x", 0, 0x4c, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 86377298Sobrien{"rex64xz",0, 0x4d, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 86477298Sobrien{"rex64xy",0, 0x4e, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 86577298Sobrien{"rex64xyz",0, 0x4f, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, 86633965Sjdp 86760484Sobrien/* 486 extensions. */ 86833965Sjdp 86977298Sobrien{"bswap", 1, 0x0fc8, X, Cpu486, lq_Suf|ShortForm, { Reg32|Reg64, 0, 0 } }, 87077298Sobrien{"xadd", 2, 0x0fc0, X, Cpu486, bwlq_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } }, 87177298Sobrien{"cmpxchg", 2, 0x0fb0, X, Cpu486, bwlq_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } }, 87277298Sobrien{"invd", 0, 0x0f08, X, Cpu486, NoSuf, { 0, 0, 0} }, 87377298Sobrien{"wbinvd", 0, 0x0f09, X, Cpu486, NoSuf, { 0, 0, 0} }, 87477298Sobrien{"invlpg", 1, 0x0f01, 7, Cpu486, NoSuf|Modrm, { AnyMem, 0, 0} }, 87533965Sjdp 87660484Sobrien/* 586 and late 486 extensions. */ 87777298Sobrien{"cpuid", 0, 0x0fa2, X, Cpu486, NoSuf, { 0, 0, 0} }, 87833965Sjdp 87960484Sobrien/* Pentium extensions. */ 88077298Sobrien{"wrmsr", 0, 0x0f30, X, Cpu586, NoSuf, { 0, 0, 0} }, 88177298Sobrien{"rdtsc", 0, 0x0f31, X, Cpu586, NoSuf, { 0, 0, 0} }, 88277298Sobrien{"rdmsr", 0, 0x0f32, X, Cpu586, NoSuf, { 0, 0, 0} }, 88377298Sobrien{"cmpxchg8b",1,0x0fc7, 1, Cpu586, NoSuf|Modrm, { LLongMem, 0, 0} }, 88461843Sobrien 88561843Sobrien/* Pentium II/Pentium Pro extensions. */ 88677298Sobrien{"sysenter",0, 0x0f34, X, Cpu686|CpuNo64, NoSuf, { 0, 0, 0} }, 88777298Sobrien{"sysexit", 0, 0x0f35, X, Cpu686|CpuNo64, NoSuf, { 0, 0, 0} }, 88877298Sobrien{"fxsave", 1, 0x0fae, 0, Cpu686, FP|Modrm, { LLongMem, 0, 0} }, 88977298Sobrien{"fxrstor", 1, 0x0fae, 1, Cpu686, FP|Modrm, { LLongMem, 0, 0} }, 89077298Sobrien{"rdpmc", 0, 0x0f33, X, Cpu686, NoSuf, { 0, 0, 0} }, 89161843Sobrien/* official undefined instr. */ 89277298Sobrien{"ud2", 0, 0x0f0b, X, Cpu686, NoSuf, { 0, 0, 0} }, 89361843Sobrien/* alias for ud2 */ 89477298Sobrien{"ud2a", 0, 0x0f0b, X, Cpu686, NoSuf, { 0, 0, 0} }, 89561843Sobrien/* 2nd. official undefined instr. */ 89677298Sobrien{"ud2b", 0, 0x0fb9, X, Cpu686, NoSuf, { 0, 0, 0} }, 89733965Sjdp 89877298Sobrien{"cmovo", 2, 0x0f40, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 89977298Sobrien{"cmovno", 2, 0x0f41, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 90077298Sobrien{"cmovb", 2, 0x0f42, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 90177298Sobrien{"cmovc", 2, 0x0f42, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 90277298Sobrien{"cmovnae", 2, 0x0f42, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 90377298Sobrien{"cmovae", 2, 0x0f43, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 90477298Sobrien{"cmovnc", 2, 0x0f43, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 90577298Sobrien{"cmovnb", 2, 0x0f43, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 90677298Sobrien{"cmove", 2, 0x0f44, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 90777298Sobrien{"cmovz", 2, 0x0f44, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 90877298Sobrien{"cmovne", 2, 0x0f45, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 90977298Sobrien{"cmovnz", 2, 0x0f45, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 91077298Sobrien{"cmovbe", 2, 0x0f46, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 91177298Sobrien{"cmovna", 2, 0x0f46, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 91277298Sobrien{"cmova", 2, 0x0f47, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 91377298Sobrien{"cmovnbe", 2, 0x0f47, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 91477298Sobrien{"cmovs", 2, 0x0f48, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 91577298Sobrien{"cmovns", 2, 0x0f49, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 91677298Sobrien{"cmovp", 2, 0x0f4a, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 91777298Sobrien{"cmovnp", 2, 0x0f4b, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 91877298Sobrien{"cmovl", 2, 0x0f4c, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 91977298Sobrien{"cmovnge", 2, 0x0f4c, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 92077298Sobrien{"cmovge", 2, 0x0f4d, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 92177298Sobrien{"cmovnl", 2, 0x0f4d, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 92277298Sobrien{"cmovle", 2, 0x0f4e, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 92377298Sobrien{"cmovng", 2, 0x0f4e, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 92477298Sobrien{"cmovg", 2, 0x0f4f, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 92577298Sobrien{"cmovnle", 2, 0x0f4f, X, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 92633965Sjdp 92777298Sobrien{"fcmovb", 2, 0xdac0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 92877298Sobrien{"fcmovnae",2, 0xdac0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 92977298Sobrien{"fcmove", 2, 0xdac8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 93077298Sobrien{"fcmovbe", 2, 0xdad0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 93177298Sobrien{"fcmovna", 2, 0xdad0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 93277298Sobrien{"fcmovu", 2, 0xdad8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 93377298Sobrien{"fcmovae", 2, 0xdbc0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 93477298Sobrien{"fcmovnb", 2, 0xdbc0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 93577298Sobrien{"fcmovne", 2, 0xdbc8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 93677298Sobrien{"fcmova", 2, 0xdbd0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 93777298Sobrien{"fcmovnbe",2, 0xdbd0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 93877298Sobrien{"fcmovnu", 2, 0xdbd8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 93933965Sjdp 94077298Sobrien{"fcomi", 2, 0xdbf0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 94177298Sobrien{"fcomi", 0, 0xdbf1, X, Cpu686, FP|ShortForm, { 0, 0, 0} }, 94277298Sobrien{"fcomi", 1, 0xdbf0, X, Cpu686, FP|ShortForm, { FloatReg, 0, 0} }, 94377298Sobrien{"fucomi", 2, 0xdbe8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 94477298Sobrien{"fucomi", 0, 0xdbe9, X, Cpu686, FP|ShortForm, { 0, 0, 0} }, 94577298Sobrien{"fucomi", 1, 0xdbe8, X, Cpu686, FP|ShortForm, { FloatReg, 0, 0} }, 94677298Sobrien{"fcomip", 2, 0xdff0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 94777298Sobrien{"fcompi", 2, 0xdff0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 94877298Sobrien{"fcompi", 0, 0xdff1, X, Cpu686, FP|ShortForm, { 0, 0, 0} }, 94977298Sobrien{"fcompi", 1, 0xdff0, X, Cpu686, FP|ShortForm, { FloatReg, 0, 0} }, 95077298Sobrien{"fucomip", 2, 0xdfe8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 95177298Sobrien{"fucompi", 2, 0xdfe8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 95277298Sobrien{"fucompi", 0, 0xdfe9, X, Cpu686, FP|ShortForm, { 0, 0, 0} }, 95377298Sobrien{"fucompi", 1, 0xdfe8, X, Cpu686, FP|ShortForm, { FloatReg, 0, 0} }, 95460484Sobrien 95577298Sobrien/* Pentium4 extensions. */ 95633965Sjdp 95777298Sobrien{"movnti", 2, 0x0fc3, X, CpuP4, FP|Modrm, { WordReg, WordMem, 0 } }, 95877298Sobrien{"clflush", 1, 0x0fae, 7, CpuP4, FP|Modrm, { ByteMem, 0, 0 } }, 95977298Sobrien{"lfence", 0, 0x0fae, 0xe8, CpuP4, FP|ImmExt, { 0, 0, 0 } }, 96077298Sobrien{"mfence", 0, 0x0fae, 0xf0, CpuP4, FP|ImmExt, { 0, 0, 0 } }, 96177298Sobrien{"pause", 0, 0xf390, X, CpuP4, FP, { 0, 0, 0 } }, 96233965Sjdp 96377298Sobrien/* MMX/SSE2 instructions. */ 96460484Sobrien 96577298Sobrien{"emms", 0, 0x0f77, X, CpuMMX, FP, { 0, 0, 0 } }, 96677298Sobrien{"movd", 2, 0x0f6e, X, CpuMMX, FP|Modrm, { Reg32|LongMem, RegMMX, 0 } }, 96777298Sobrien{"movd", 2, 0x0f7e, X, CpuMMX, FP|Modrm, { RegMMX, Reg32|LongMem, 0 } }, 96877298Sobrien{"movd", 2, 0x660f6e,X,CpuSSE2,FP|Modrm, { Reg32|LLongMem, RegXMM, 0 } }, 96977298Sobrien{"movd", 2, 0x660f7e,X,CpuSSE2,FP|Modrm, { RegXMM, Reg32|LLongMem, 0 } }, 97077298Sobrien/* Real MMX instructions. */ 97177298Sobrien{"movq", 2, 0x0f6f, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 97277298Sobrien{"movq", 2, 0x0f7f, X, CpuMMX, FP|Modrm, { RegMMX, RegMMX|LongMem, 0 } }, 97377298Sobrien{"movq", 2, 0xf30f7e,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 97477298Sobrien{"movq", 2, 0x660fd6,X,CpuSSE2,FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, 97577298Sobrien/* In the 64bit mode the short form mov immediate is redefined to have 97677298Sobrien 64bit displacement value. */ 97777298Sobrien{"movq", 2, 0x88, X, Cpu64, NoSuf|D|W|Modrm|Size64,{ Reg64, Reg64|AnyMem, 0 } }, 97877298Sobrien{"movq", 2, 0xc6, 0, Cpu64, NoSuf|W|Modrm|Size64, { Imm32S, Reg64|WordMem, 0 } }, 97977298Sobrien{"movq", 2, 0xb0, X, Cpu64, NoSuf|W|ShortForm|Size64,{ Imm64, Reg64, 0 } }, 98077298Sobrien/* Move to/from control debug registers. In the 16 or 32bit modes they are 32bit. In the 64bit 98177298Sobrien mode they are 64bit.*/ 98277298Sobrien{"movq", 2, 0x0f20, X, Cpu64, NoSuf|D|Modrm|IgnoreSize|NoRex64|Size64,{ Control, Reg64|InvMem, 0} }, 98377298Sobrien{"movq", 2, 0x0f21, X, Cpu64, NoSuf|D|Modrm|IgnoreSize|NoRex64|Size64,{ Debug, Reg64|InvMem, 0} }, 98477298Sobrien{"packssdw", 2, 0x0f6b, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 98577298Sobrien{"packssdw", 2, 0x660f6b,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 98677298Sobrien{"packsswb", 2, 0x0f63, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 98777298Sobrien{"packsswb", 2, 0x660f63,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 98877298Sobrien{"packuswb", 2, 0x0f67, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 98977298Sobrien{"packuswb", 2, 0x660f67,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 99077298Sobrien{"paddb", 2, 0x0ffc, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 99177298Sobrien{"paddb", 2, 0x660ffc,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 99277298Sobrien{"paddw", 2, 0x0ffd, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 99377298Sobrien{"paddw", 2, 0x660ffd,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 99477298Sobrien{"paddd", 2, 0x0ffe, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 99577298Sobrien{"paddd", 2, 0x660ffe,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 99677298Sobrien{"paddq", 2, 0x0fd4, X, CpuMMX, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 99777298Sobrien{"paddq", 2, 0x660fd4,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 99877298Sobrien{"paddsb", 2, 0x0fec, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 99977298Sobrien{"paddsb", 2, 0x660fec,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 100077298Sobrien{"paddsw", 2, 0x0fed, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 100177298Sobrien{"paddsw", 2, 0x660fed,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 100277298Sobrien{"paddusb", 2, 0x0fdc, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 100377298Sobrien{"paddusb", 2, 0x660fdc,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 100477298Sobrien{"paddusw", 2, 0x0fdd, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 100577298Sobrien{"paddusw", 2, 0x660fdd,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 100677298Sobrien{"pand", 2, 0x0fdb, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 100777298Sobrien{"pand", 2, 0x660fdb,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 100877298Sobrien{"pandn", 2, 0x0fdf, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 100977298Sobrien{"pandn", 2, 0x660fdf,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 101077298Sobrien{"pcmpeqb", 2, 0x0f74, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 101177298Sobrien{"pcmpeqb", 2, 0x660f74,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 101277298Sobrien{"pcmpeqw", 2, 0x0f75, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 101377298Sobrien{"pcmpeqw", 2, 0x660f75,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 101477298Sobrien{"pcmpeqd", 2, 0x0f76, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 101577298Sobrien{"pcmpeqd", 2, 0x660f76,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 101677298Sobrien{"pcmpgtb", 2, 0x0f64, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 101777298Sobrien{"pcmpgtb", 2, 0x660f64,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 101877298Sobrien{"pcmpgtw", 2, 0x0f65, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 101977298Sobrien{"pcmpgtw", 2, 0x660f65,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 102077298Sobrien{"pcmpgtd", 2, 0x0f66, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 102177298Sobrien{"pcmpgtd", 2, 0x660f66,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 102277298Sobrien{"pmaddwd", 2, 0x0ff5, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 102377298Sobrien{"pmaddwd", 2, 0x660ff5,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 102477298Sobrien{"pmulhw", 2, 0x0fe5, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 102577298Sobrien{"pmulhw", 2, 0x660fe5,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 102677298Sobrien{"pmullw", 2, 0x0fd5, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 102777298Sobrien{"pmullw", 2, 0x660fd5,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 102877298Sobrien{"por", 2, 0x0feb, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 102977298Sobrien{"por", 2, 0x660feb,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 103077298Sobrien{"psllw", 2, 0x0ff1, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 103177298Sobrien{"psllw", 2, 0x660ff1,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 103277298Sobrien{"psllw", 2, 0x0f71, 6, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } }, 103377298Sobrien{"psllw", 2, 0x660f71,6,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } }, 103477298Sobrien{"pslld", 2, 0x0ff2, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 103577298Sobrien{"pslld", 2, 0x660ff2,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 103677298Sobrien{"pslld", 2, 0x0f72, 6, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } }, 103777298Sobrien{"pslld", 2, 0x660f72,6,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } }, 103877298Sobrien{"psllq", 2, 0x0ff3, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 103977298Sobrien{"psllq", 2, 0x660ff3,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 104077298Sobrien{"psllq", 2, 0x0f73, 6, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } }, 104177298Sobrien{"psllq", 2, 0x660f73,6,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } }, 104277298Sobrien{"psraw", 2, 0x0fe1, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 104377298Sobrien{"psraw", 2, 0x660fe1,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 104477298Sobrien{"psraw", 2, 0x0f71, 4, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } }, 104577298Sobrien{"psraw", 2, 0x660f71,4,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } }, 104677298Sobrien{"psrad", 2, 0x0fe2, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 104777298Sobrien{"psrad", 2, 0x660fe2,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 104877298Sobrien{"psrad", 2, 0x0f72, 4, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } }, 104977298Sobrien{"psrad", 2, 0x660f72,4,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } }, 105077298Sobrien{"psrlw", 2, 0x0fd1, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 105177298Sobrien{"psrlw", 2, 0x660fd1,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 105277298Sobrien{"psrlw", 2, 0x0f71, 2, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } }, 105377298Sobrien{"psrlw", 2, 0x660f71,2,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } }, 105477298Sobrien{"psrld", 2, 0x0fd2, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 105577298Sobrien{"psrld", 2, 0x660fd2,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 105677298Sobrien{"psrld", 2, 0x0f72, 2, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } }, 105777298Sobrien{"psrld", 2, 0x660f72,2,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } }, 105877298Sobrien{"psrlq", 2, 0x0fd3, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 105977298Sobrien{"psrlq", 2, 0x660fd3,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 106077298Sobrien{"psrlq", 2, 0x0f73, 2, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } }, 106177298Sobrien{"psrlq", 2, 0x660f73,2,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } }, 106277298Sobrien{"psubb", 2, 0x0ff8, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 106377298Sobrien{"psubb", 2, 0x660ff8,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 106477298Sobrien{"psubw", 2, 0x0ff9, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 106577298Sobrien{"psubw", 2, 0x660ff9,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 106677298Sobrien{"psubd", 2, 0x0ffa, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 106777298Sobrien{"psubd", 2, 0x660ffa,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 106877298Sobrien{"psubq", 2, 0x0ffb, X, CpuMMX, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 106977298Sobrien{"psubq", 2, 0x660ffb,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 107077298Sobrien{"psubsb", 2, 0x0fe8, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 107177298Sobrien{"psubsb", 2, 0x660fe8,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 107277298Sobrien{"psubsw", 2, 0x0fe9, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 107377298Sobrien{"psubsw", 2, 0x660fe9,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 107477298Sobrien{"psubusb", 2, 0x0fd8, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 107577298Sobrien{"psubusb", 2, 0x660fd8,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 107677298Sobrien{"psubusw", 2, 0x0fd9, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 107777298Sobrien{"psubusw", 2, 0x660fd9,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 107877298Sobrien{"punpckhbw",2, 0x0f68, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 107977298Sobrien{"punpckhbw",2, 0x660f68,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 108077298Sobrien{"punpckhwd",2, 0x0f69, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 108177298Sobrien{"punpckhwd",2, 0x660f69,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 108277298Sobrien{"punpckhdq",2, 0x0f6a, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 108377298Sobrien{"punpckhdq",2, 0x660f6a,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 108477298Sobrien{"punpcklbw",2, 0x0f60, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 108577298Sobrien{"punpcklbw",2, 0x660f60,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 108677298Sobrien{"punpcklwd",2, 0x0f61, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 108777298Sobrien{"punpcklwd",2, 0x660f61,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 108877298Sobrien{"punpckldq",2, 0x0f62, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 108977298Sobrien{"punpckldq",2, 0x660f62,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 109077298Sobrien{"pxor", 2, 0x0fef, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 109177298Sobrien{"pxor", 2, 0x660fef,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 109277298Sobrien 109360484Sobrien/* PIII Katmai New Instructions / SIMD instructions. */ 109460484Sobrien 109577298Sobrien{"addps", 2, 0x0f58, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 109677298Sobrien{"addss", 2, 0xf30f58, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 109777298Sobrien{"andnps", 2, 0x0f55, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 109877298Sobrien{"andps", 2, 0x0f54, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 109977298Sobrien{"cmpeqps", 2, 0x0fc2, 0, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 110077298Sobrien{"cmpeqss", 2, 0xf30fc2, 0, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 110177298Sobrien{"cmpleps", 2, 0x0fc2, 2, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 110277298Sobrien{"cmpless", 2, 0xf30fc2, 2, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 110377298Sobrien{"cmpltps", 2, 0x0fc2, 1, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 110477298Sobrien{"cmpltss", 2, 0xf30fc2, 1, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 110577298Sobrien{"cmpneqps", 2, 0x0fc2, 4, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 110677298Sobrien{"cmpneqss", 2, 0xf30fc2, 4, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 110777298Sobrien{"cmpnleps", 2, 0x0fc2, 6, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 110877298Sobrien{"cmpnless", 2, 0xf30fc2, 6, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 110977298Sobrien{"cmpnltps", 2, 0x0fc2, 5, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 111077298Sobrien{"cmpnltss", 2, 0xf30fc2, 5, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 111177298Sobrien{"cmpordps", 2, 0x0fc2, 7, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 111277298Sobrien{"cmpordss", 2, 0xf30fc2, 7, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 111377298Sobrien{"cmpunordps",2, 0x0fc2, 3, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 111477298Sobrien{"cmpunordss",2, 0xf30fc2, 3, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 111577298Sobrien{"cmpps", 3, 0x0fc2, X, CpuSSE, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, 111677298Sobrien{"cmpss", 3, 0xf30fc2, X, CpuSSE, FP|Modrm, { Imm8, RegXMM|WordMem, RegXMM } }, 111777298Sobrien{"comiss", 2, 0x0f2f, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 111877298Sobrien{"cvtpi2ps", 2, 0x0f2a, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegXMM, 0 } }, 111977298Sobrien{"cvtps2pi", 2, 0x0f2d, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } }, 112077298Sobrien{"cvtsi2ss", 2, 0xf30f2a, X, CpuSSE, lq_Suf|IgnoreSize|Modrm,{ Reg32|Reg64|WordMem|LLongMem, RegXMM, 0 } }, 112177298Sobrien{"cvtss2si", 2, 0xf30f2d, X, CpuSSE, lq_Suf|IgnoreSize|Modrm,{ RegXMM|WordMem, Reg32|Reg64, 0 } }, 112277298Sobrien{"cvttps2pi", 2, 0x0f2c, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } }, 112377298Sobrien{"cvttss2si", 2, 0xf30f2c, X, CpuSSE, lq_Suf|IgnoreSize|Modrm, { RegXMM|WordMem, Reg32|Reg64, 0 } }, 112477298Sobrien{"divps", 2, 0x0f5e, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 112577298Sobrien{"divss", 2, 0xf30f5e, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 112677298Sobrien{"ldmxcsr", 1, 0x0fae, 2, CpuSSE, FP|Modrm, { WordMem, 0, 0 } }, 112777298Sobrien{"maskmovq", 2, 0x0ff7, X, CpuSSE, FP|Modrm, { RegMMX|InvMem, RegMMX, 0 } }, 112877298Sobrien{"maxps", 2, 0x0f5f, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 112977298Sobrien{"maxss", 2, 0xf30f5f, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 113077298Sobrien{"minps", 2, 0x0f5d, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 113177298Sobrien{"minss", 2, 0xf30f5d, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 113277298Sobrien{"movaps", 2, 0x0f28, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 113377298Sobrien{"movaps", 2, 0x0f29, X, CpuSSE, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, 113477298Sobrien{"movhlps", 2, 0x0f12, X, CpuSSE, FP|Modrm, { RegXMM|InvMem, RegXMM, 0 } }, 113577298Sobrien{"movhps", 2, 0x0f16, X, CpuSSE, FP|Modrm, { LLongMem, RegXMM, 0 } }, 113677298Sobrien{"movhps", 2, 0x0f17, X, CpuSSE, FP|Modrm, { RegXMM, LLongMem, 0 } }, 113777298Sobrien{"movlhps", 2, 0x0f16, X, CpuSSE, FP|Modrm, { RegXMM|InvMem, RegXMM, 0 } }, 113877298Sobrien{"movlps", 2, 0x0f12, X, CpuSSE, FP|Modrm, { LLongMem, RegXMM, 0 } }, 113977298Sobrien{"movlps", 2, 0x0f13, X, CpuSSE, FP|Modrm, { RegXMM, LLongMem, 0 } }, 114077298Sobrien{"movmskps", 2, 0x0f50, X, CpuSSE, FP|Modrm, { RegXMM|InvMem, Reg32, 0 } }, 114177298Sobrien{"movntps", 2, 0x0f2b, X, CpuSSE, FP|Modrm, { RegXMM, LLongMem, 0 } }, 114277298Sobrien{"movntq", 2, 0x0fe7, X, CpuSSE, FP|Modrm, { RegMMX, LLongMem, 0 } }, 114377298Sobrien{"movntdq", 2, 0x660fe7, X, CpuSSE2,FP|Modrm, { RegXMM, LLongMem, 0 } }, 114477298Sobrien{"movss", 2, 0xf30f10, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 114577298Sobrien{"movss", 2, 0xf30f11, X, CpuSSE, FP|Modrm, { RegXMM, RegXMM|WordMem, 0 } }, 114677298Sobrien{"movups", 2, 0x0f10, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 114777298Sobrien{"movups", 2, 0x0f11, X, CpuSSE, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, 114877298Sobrien{"mulps", 2, 0x0f59, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 114977298Sobrien{"mulss", 2, 0xf30f59, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 115077298Sobrien{"orps", 2, 0x0f56, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 115177298Sobrien{"pavgb", 2, 0x0fe0, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 115277298Sobrien{"pavgb", 2, 0x660fe0, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 115377298Sobrien{"pavgw", 2, 0x0fe3, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 115477298Sobrien{"pavgw", 2, 0x660fe3, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 115577298Sobrien{"pextrw", 3, 0x0fc5, X, CpuSSE, FP|Modrm, { Imm8, RegMMX, Reg32|InvMem } }, 115677298Sobrien{"pextrw", 3, 0x660fc5, X, CpuSSE2,FP|Modrm, { Imm8, RegXMM, Reg32|InvMem } }, 115777298Sobrien{"pinsrw", 3, 0x0fc4, X, CpuSSE, FP|Modrm, { Imm8, Reg32|ShortMem, RegMMX } }, 115877298Sobrien{"pinsrw", 3, 0x660fc4, X, CpuSSE2, FP|Modrm, { Imm8, Reg32|ShortMem, RegXMM } }, 115977298Sobrien{"pmaxsw", 2, 0x0fee, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 116077298Sobrien{"pmaxsw", 2, 0x660fee, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 116177298Sobrien{"pmaxub", 2, 0x0fde, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 116277298Sobrien{"pmaxub", 2, 0x660fde, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 116377298Sobrien{"pminsw", 2, 0x0fea, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 116477298Sobrien{"pminsw", 2, 0x660fea, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 116577298Sobrien{"pminub", 2, 0x0fda, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 116677298Sobrien{"pminub", 2, 0x660fda, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 116777298Sobrien{"pmovmskb", 2, 0x0fd7, X, CpuSSE, FP|Modrm, { RegMMX, Reg32|InvMem, 0 } }, 116877298Sobrien{"pmovmskb", 2, 0x660fd7, X, CpuSSE2,FP|Modrm, { RegXMM, Reg32|InvMem, 0 } }, 116977298Sobrien{"pmulhuw", 2, 0x0fe4, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 117077298Sobrien{"pmulhuw", 2, 0x660fe4, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 117177298Sobrien{"prefetchnta", 1, 0x0f18, 0, CpuSSE, FP|Modrm, { LLongMem, 0, 0 } }, 117277298Sobrien{"prefetcht0", 1, 0x0f18, 1, CpuSSE, FP|Modrm, { LLongMem, 0, 0 } }, 117377298Sobrien{"prefetcht1", 1, 0x0f18, 2, CpuSSE, FP|Modrm, { LLongMem, 0, 0 } }, 117477298Sobrien{"prefetcht2", 1, 0x0f18, 3, CpuSSE, FP|Modrm, { LLongMem, 0, 0 } }, 117577298Sobrien{"psadbw", 2, 0x0ff6, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 117677298Sobrien{"psadbw", 2, 0x660ff6, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 117777298Sobrien{"pshufw", 3, 0x0f70, X, CpuSSE, FP|Modrm, { Imm8, RegMMX|LLongMem, RegMMX } }, 117877298Sobrien{"rcpps", 2, 0x0f53, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 117977298Sobrien{"rcpss", 2, 0xf30f53, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 118077298Sobrien{"rsqrtps", 2, 0x0f52, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 118177298Sobrien{"rsqrtss", 2, 0xf30f52, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 118277298Sobrien{"sfence", 0, 0x0fae, 0xf8, CpuSSE, FP|ImmExt, { 0, 0, 0 } }, 118377298Sobrien{"shufps", 3, 0x0fc6, X, CpuSSE, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, 118477298Sobrien{"sqrtps", 2, 0x0f51, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 118577298Sobrien{"sqrtss", 2, 0xf30f51, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 118677298Sobrien{"stmxcsr", 1, 0x0fae, 3, CpuSSE, FP|Modrm, { WordMem, 0, 0 } }, 118777298Sobrien{"subps", 2, 0x0f5c, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 118877298Sobrien{"subss", 2, 0xf30f5c, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 118977298Sobrien{"ucomiss", 2, 0x0f2e, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 119077298Sobrien{"unpckhps", 2, 0x0f15, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 119177298Sobrien{"unpcklps", 2, 0x0f14, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 119277298Sobrien{"xorps", 2, 0x0f57, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 119360484Sobrien 119477298Sobrien/* SSE-2 instructions. */ 119577298Sobrien 119677298Sobrien{"addpd", 2, 0x660f58, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 119777298Sobrien{"addsd", 2, 0xf20f58, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, 119877298Sobrien{"andnpd", 2, 0x660f55, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 119977298Sobrien{"andpd", 2, 0x660f54, X, CpuSSE2, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 120077298Sobrien{"cmpeqpd", 2, 0x660fc2, 0, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } }, 120177298Sobrien{"cmpeqsd", 2, 0xf20fc2, 0, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } }, 120277298Sobrien{"cmplepd", 2, 0x660fc2, 2, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } }, 120377298Sobrien{"cmplesd", 2, 0xf20fc2, 2, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } }, 120477298Sobrien{"cmpltpd", 2, 0x660fc2, 1, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } }, 120577298Sobrien{"cmpltsd", 2, 0xf20fc2, 1, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } }, 120677298Sobrien{"cmpneqpd", 2, 0x660fc2, 4, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } }, 120777298Sobrien{"cmpneqsd", 2, 0xf20fc2, 4, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } }, 120877298Sobrien{"cmpnlepd", 2, 0x660fc2, 6, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } }, 120977298Sobrien{"cmpnlesd", 2, 0xf20fc2, 6, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } }, 121077298Sobrien{"cmpnltpd", 2, 0x660fc2, 5, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } }, 121177298Sobrien{"cmpnltsd", 2, 0xf20fc2, 5, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } }, 121277298Sobrien{"cmpordpd", 2, 0x660fc2, 7, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } }, 121377298Sobrien{"cmpordsd", 2, 0xf20fc2, 7, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } }, 121477298Sobrien{"cmpunordpd",2, 0x660fc2, 3, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } }, 121577298Sobrien{"cmpunordsd",2, 0xf20fc2, 3, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } }, 121677298Sobrien{"cmppd", 3, 0x660fc2, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, 121777298Sobrien{"cmpsd", 3, 0xf20fc2, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LongMem, RegXMM } }, 121877298Sobrien{"comisd", 2, 0x660f2f, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, 121977298Sobrien{"cvtpi2pd", 2, 0x660f2a, X, CpuSSE2, FP|Modrm, { RegMMX|LLongMem, RegXMM, 0 } }, 122077298Sobrien{"cvtsi2sd", 2, 0xf20f2a, X, CpuSSE2, lq_Suf|IgnoreSize|Modrm,{ Reg32|Reg64|WordMem|LLongMem, RegXMM, 0 } }, 122177298Sobrien{"divpd", 2, 0x660f5e, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 122277298Sobrien{"divsd", 2, 0xf20f5e, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, 122377298Sobrien{"maxpd", 2, 0x660f5f, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 122477298Sobrien{"maxsd", 2, 0xf20f5f, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, 122577298Sobrien{"minpd", 2, 0x660f5d, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 122677298Sobrien{"minsd", 2, 0xf20f5d, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, 122777298Sobrien{"movapd", 2, 0x660f28, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 122877298Sobrien{"movapd", 2, 0x660f29, X, CpuSSE2, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, 122977298Sobrien{"movhpd", 2, 0x660f16, X, CpuSSE2, FP|Modrm, { LLongMem, RegXMM, 0 } }, 123077298Sobrien{"movhpd", 2, 0x660f17, X, CpuSSE2, FP|Modrm, { RegXMM, LLongMem, 0 } }, 123177298Sobrien{"movlpd", 2, 0x660f12, X, CpuSSE2, FP|Modrm, { LLongMem, RegXMM, 0 } }, 123277298Sobrien{"movlpd", 2, 0x660f13, X, CpuSSE2, FP|Modrm, { RegXMM, LLongMem, 0 } }, 123377298Sobrien{"movmskpd", 2, 0x660f50, X, CpuSSE2, FP|Modrm, { RegXMM|InvMem, Reg32, 0 } }, 123477298Sobrien{"movntpd", 2, 0x660f2b, X, CpuSSE2, FP|Modrm, { RegXMM, LLongMem, 0 } }, 123577298Sobrien{"movsd", 2, 0xf20f10, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, 123677298Sobrien{"movsd", 2, 0xf20f11, X, CpuSSE2, FP|Modrm, { RegXMM, RegXMM|LongMem, 0 } }, 123777298Sobrien{"movupd", 2, 0x660f10, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 123877298Sobrien{"movupd", 2, 0x660f11, X, CpuSSE2, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, 123977298Sobrien{"mulpd", 2, 0x660f59, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 124077298Sobrien{"mulsd", 2, 0xf20f59, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, 124177298Sobrien{"orpd", 2, 0x660f56, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 124277298Sobrien{"shufpd", 3, 0x660fc6, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, 124377298Sobrien{"sqrtpd", 2, 0x660f51, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 124477298Sobrien{"sqrtsd", 2, 0xf20f51, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, 124577298Sobrien{"subpd", 2, 0x660f5c, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 124677298Sobrien{"subsd", 2, 0xf20f5c, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, 124777298Sobrien{"ucomisd", 2, 0x660f2e, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, 124877298Sobrien{"unpckhpd", 2, 0x660f15, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 124977298Sobrien{"unpcklpd", 2, 0x660f14, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 125077298Sobrien{"xorpd", 2, 0x660f57, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 125177298Sobrien{"cvtdq2pd", 2, 0xf30fe6, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 125277298Sobrien{"cvtpd2dq", 2, 0xf20fe6, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 125377298Sobrien{"cvtdq2ps", 2, 0x0f5b, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 125477298Sobrien{"cvtpd2pi", 2, 0x660f2d, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } }, 125577298Sobrien{"cvtpd2ps", 2, 0x660f5a, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 125677298Sobrien{"cvtps2pd", 2, 0x0f5a, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 125777298Sobrien{"cvtps2dq", 2, 0x660f5b, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } }, 125877298Sobrien{"cvtsd2si", 2, 0xf20f2d, X, CpuSSE2, lq_Suf|IgnoreSize|Modrm,{ RegXMM|LLongMem, Reg32|Reg64, 0 } }, 125977298Sobrien{"cvtsd2ss", 2, 0xf20f5a, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 126077298Sobrien{"cvtss2sd", 2, 0xf30f5a, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 126177298Sobrien{"cvttpd2pi", 2, 0x660f2c, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } }, 126277298Sobrien{"cvttsd2si", 2, 0xf20f2c, X, CpuSSE2, lq_Suf|IgnoreSize|Modrm,{ RegXMM|WordMem, Reg32|Reg64, 0 } }, 126377298Sobrien{"cvttpd2dq", 2, 0x660fe6, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 126477298Sobrien{"cvttps2dq", 2, 0xf30f5b, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 126577298Sobrien{"maskmovdqu",2, 0x660ff7, X, CpuSSE2, FP|Modrm, { RegXMM|InvMem, RegXMM, 0 } }, 126677298Sobrien{"movdqa", 2, 0x660f6f, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 126777298Sobrien{"movdqa", 2, 0x660f7f, X, CpuSSE2, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, 126877298Sobrien{"movdqu", 2, 0xf30f6f, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 126977298Sobrien{"movdqu", 2, 0xf30f7f, X, CpuSSE2, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, 127077298Sobrien{"movdq2q", 2, 0xf20fd6, X, CpuSSE2, FP|Modrm, { RegMMX|LLongMem, RegXMM, 0 } }, 127177298Sobrien{"movq2dq", 2, 0xf30fd6, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } }, 127277298Sobrien{"pmuludq", 2, 0x0ff4, X, CpuSSE2, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 127377298Sobrien{"pmuludq", 2, 0x660ff4, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, 127477298Sobrien{"pshufd", 3, 0x660f70, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, 127577298Sobrien{"pshufhw", 3, 0xf30f70, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, 127677298Sobrien{"pshuflw", 3, 0xf20f70, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, 127777298Sobrien{"pslldq", 2, 0x660f73, 7, CpuSSE2, FP|Modrm, { Imm8, RegXMM, 0 } }, 127877298Sobrien{"psrldq", 2, 0x660f73, 3, CpuSSE2, FP|Modrm, { Imm8, RegXMM, 0 } }, 127977298Sobrien{"punpckhqdq",2, 0x660f6d, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 128077298Sobrien{"punpcklqdq",2, 0x660f6c, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 128177298Sobrien 128260484Sobrien/* AMD 3DNow! instructions. */ 128360484Sobrien 128477298Sobrien{"prefetch", 1, 0x0f0d, 0, Cpu3dnow, FP|Modrm, { ByteMem, 0, 0 } }, 128577298Sobrien{"prefetchw",1, 0x0f0d, 1, Cpu3dnow, FP|Modrm, { ByteMem, 0, 0 } }, 128677298Sobrien{"femms", 0, 0x0f0e, X, Cpu3dnow, FP, { 0, 0, 0 } }, 128777298Sobrien{"pavgusb", 2, 0x0f0f, 0xbf, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 128877298Sobrien{"pf2id", 2, 0x0f0f, 0x1d, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 128977298Sobrien{"pf2iw", 2, 0x0f0f, 0x1c, Cpu3dnow|Cpu686, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 129077298Sobrien{"pfacc", 2, 0x0f0f, 0xae, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 129177298Sobrien{"pfadd", 2, 0x0f0f, 0x9e, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 129277298Sobrien{"pfcmpeq", 2, 0x0f0f, 0xb0, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 129377298Sobrien{"pfcmpge", 2, 0x0f0f, 0x90, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 129477298Sobrien{"pfcmpgt", 2, 0x0f0f, 0xa0, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 129577298Sobrien{"pfmax", 2, 0x0f0f, 0xa4, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 129677298Sobrien{"pfmin", 2, 0x0f0f, 0x94, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 129777298Sobrien{"pfmul", 2, 0x0f0f, 0xb4, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 129877298Sobrien{"pfnacc", 2, 0x0f0f, 0x8a, Cpu3dnow|Cpu686, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 129977298Sobrien{"pfpnacc", 2, 0x0f0f, 0x8e, Cpu3dnow|Cpu686, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 130077298Sobrien{"pfrcp", 2, 0x0f0f, 0x96, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 130177298Sobrien{"pfrcpit1", 2, 0x0f0f, 0xa6, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 130277298Sobrien{"pfrcpit2", 2, 0x0f0f, 0xb6, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 130377298Sobrien{"pfrsqit1", 2, 0x0f0f, 0xa7, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 130477298Sobrien{"pfrsqrt", 2, 0x0f0f, 0x97, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 130577298Sobrien{"pfsub", 2, 0x0f0f, 0x9a, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 130677298Sobrien{"pfsubr", 2, 0x0f0f, 0xaa, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 130777298Sobrien{"pi2fd", 2, 0x0f0f, 0x0d, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 130877298Sobrien{"pi2fw", 2, 0x0f0f, 0x0c, Cpu3dnow|Cpu686, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 130977298Sobrien{"pmulhrw", 2, 0x0f0f, 0xb7, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 131077298Sobrien{"pswapd", 2, 0x0f0f, 0xbb, Cpu3dnow|Cpu686, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 131160484Sobrien 131277298Sobrien/* AMD extensions. */ 131377298Sobrien{"syscall", 0, 0x0f05, X, CpuK6, NoSuf, { 0, 0, 0} }, 131477298Sobrien{"sysret", 0, 0x0f07, X, CpuK6, lq_Suf|DefaultSize, { 0, 0, 0} }, 131577298Sobrien{"swapgs", 0, 0x0f01, 0xf8, Cpu64, NoSuf|ImmExt, { 0, 0, 0} }, 131677298Sobrien 131761843Sobrien/* sentinel */ 131877298Sobrien{NULL, 0, 0, 0, 0, 0, { 0, 0, 0} } 131933965Sjdp}; 132060484Sobrien#undef X 132160484Sobrien#undef NoSuf 132260484Sobrien#undef b_Suf 132360484Sobrien#undef w_Suf 132460484Sobrien#undef l_Suf 132577298Sobrien#undef q_Suf 132660484Sobrien#undef x_Suf 132760484Sobrien#undef bw_Suf 132860484Sobrien#undef bl_Suf 132960484Sobrien#undef wl_Suf 133077298Sobrien#undef wlq_Suf 133160484Sobrien#undef sl_Suf 133260484Sobrien#undef bwl_Suf 133377298Sobrien#undef bwlq_Suf 133460484Sobrien#undef FP 133560484Sobrien#undef l_FP 133660484Sobrien#undef x_FP 133760484Sobrien#undef sl_FP 133833965Sjdp 133960484Sobrien#define MAX_MNEM_SIZE 16 /* for parsing insn mnemonics from input */ 134033965Sjdp 134133965Sjdp 134260484Sobrien/* 386 register table. */ 134360484Sobrien 134433965Sjdpstatic const reg_entry i386_regtab[] = { 134560484Sobrien /* make %st first as we test for it */ 134677298Sobrien {"st", FloatReg|FloatAcc, 0, 0}, 134733965Sjdp /* 8 bit regs */ 134877298Sobrien#define REGNAM_AL 1 /* Entry in i386_regtab. */ 134977298Sobrien {"al", Reg8|Acc, 0, 0}, 135077298Sobrien {"cl", Reg8|ShiftCount, 0, 1}, 135177298Sobrien {"dl", Reg8, 0, 2}, 135277298Sobrien {"bl", Reg8, 0, 3}, 135377298Sobrien {"ah", Reg8, 0, 4}, 135477298Sobrien {"ch", Reg8, 0, 5}, 135577298Sobrien {"dh", Reg8, 0, 6}, 135677298Sobrien {"bh", Reg8, 0, 7}, 135777298Sobrien {"axl", Reg8|Acc, RegRex64, 0}, /* Must be in the "al + 8" slot. */ 135877298Sobrien {"cxl", Reg8, RegRex64, 1}, 135977298Sobrien {"dxl", Reg8, RegRex64, 2}, 136077298Sobrien {"bxl", Reg8, RegRex64, 3}, 136177298Sobrien {"spl", Reg8, RegRex64, 4}, 136277298Sobrien {"bpl", Reg8, RegRex64, 5}, 136377298Sobrien {"sil", Reg8, RegRex64, 6}, 136477298Sobrien {"dil", Reg8, RegRex64, 7}, 136577298Sobrien {"r8b", Reg8, RegRex64|RegRex, 0}, 136677298Sobrien {"r9b", Reg8, RegRex64|RegRex, 1}, 136777298Sobrien {"r10b", Reg8, RegRex64|RegRex, 2}, 136877298Sobrien {"r11b", Reg8, RegRex64|RegRex, 3}, 136977298Sobrien {"r12b", Reg8, RegRex64|RegRex, 4}, 137077298Sobrien {"r13b", Reg8, RegRex64|RegRex, 5}, 137177298Sobrien {"r14b", Reg8, RegRex64|RegRex, 6}, 137277298Sobrien {"r15b", Reg8, RegRex64|RegRex, 7}, 137333965Sjdp /* 16 bit regs */ 137477298Sobrien#define REGNAM_AX 25 137577298Sobrien {"ax", Reg16|Acc, 0, 0}, 137677298Sobrien {"cx", Reg16, 0, 1}, 137777298Sobrien {"dx", Reg16|InOutPortReg, 0, 2}, 137877298Sobrien {"bx", Reg16|BaseIndex, 0, 3}, 137977298Sobrien {"sp", Reg16, 0, 4}, 138077298Sobrien {"bp", Reg16|BaseIndex, 0, 5}, 138177298Sobrien {"si", Reg16|BaseIndex, 0, 6}, 138277298Sobrien {"di", Reg16|BaseIndex, 0, 7}, 138377298Sobrien {"r8w", Reg16, RegRex, 0}, 138477298Sobrien {"r9w", Reg16, RegRex, 1}, 138577298Sobrien {"r10w", Reg16, RegRex, 2}, 138677298Sobrien {"r11w", Reg16, RegRex, 3}, 138777298Sobrien {"r12w", Reg16, RegRex, 4}, 138877298Sobrien {"r13w", Reg16, RegRex, 5}, 138977298Sobrien {"r14w", Reg16, RegRex, 6}, 139077298Sobrien {"r15w", Reg16, RegRex, 7}, 139133965Sjdp /* 32 bit regs */ 139277298Sobrien#define REGNAM_EAX 41 139377298Sobrien {"eax", Reg32|BaseIndex|Acc, 0, 0}, /* Must be in ax + 16 slot */ 139477298Sobrien {"ecx", Reg32|BaseIndex, 0, 1}, 139577298Sobrien {"edx", Reg32|BaseIndex, 0, 2}, 139677298Sobrien {"ebx", Reg32|BaseIndex, 0, 3}, 139777298Sobrien {"esp", Reg32, 0, 4}, 139877298Sobrien {"ebp", Reg32|BaseIndex, 0, 5}, 139977298Sobrien {"esi", Reg32|BaseIndex, 0, 6}, 140077298Sobrien {"edi", Reg32|BaseIndex, 0, 7}, 140177298Sobrien {"r8d", Reg32|BaseIndex, RegRex, 0}, 140277298Sobrien {"r9d", Reg32|BaseIndex, RegRex, 1}, 140377298Sobrien {"r10d", Reg32|BaseIndex, RegRex, 2}, 140477298Sobrien {"r11d", Reg32|BaseIndex, RegRex, 3}, 140577298Sobrien {"r12d", Reg32|BaseIndex, RegRex, 4}, 140677298Sobrien {"r13d", Reg32|BaseIndex, RegRex, 5}, 140777298Sobrien {"r14d", Reg32|BaseIndex, RegRex, 6}, 140877298Sobrien {"r15d", Reg32|BaseIndex, RegRex, 7}, 140977298Sobrien {"rax", Reg64|BaseIndex|Acc, 0, 0}, 141077298Sobrien {"rcx", Reg64|BaseIndex, 0, 1}, 141177298Sobrien {"rdx", Reg64|BaseIndex, 0, 2}, 141277298Sobrien {"rbx", Reg64|BaseIndex, 0, 3}, 141377298Sobrien {"rsp", Reg64, 0, 4}, 141477298Sobrien {"rbp", Reg64|BaseIndex, 0, 5}, 141577298Sobrien {"rsi", Reg64|BaseIndex, 0, 6}, 141677298Sobrien {"rdi", Reg64|BaseIndex, 0, 7}, 141777298Sobrien {"r8", Reg64|BaseIndex, RegRex, 0}, 141877298Sobrien {"r9", Reg64|BaseIndex, RegRex, 1}, 141977298Sobrien {"r10", Reg64|BaseIndex, RegRex, 2}, 142077298Sobrien {"r11", Reg64|BaseIndex, RegRex, 3}, 142177298Sobrien {"r12", Reg64|BaseIndex, RegRex, 4}, 142277298Sobrien {"r13", Reg64|BaseIndex, RegRex, 5}, 142377298Sobrien {"r14", Reg64|BaseIndex, RegRex, 6}, 142477298Sobrien {"r15", Reg64|BaseIndex, RegRex, 7}, 142533965Sjdp /* segment registers */ 142677298Sobrien {"es", SReg2, 0, 0}, 142777298Sobrien {"cs", SReg2, 0, 1}, 142877298Sobrien {"ss", SReg2, 0, 2}, 142977298Sobrien {"ds", SReg2, 0, 3}, 143077298Sobrien {"fs", SReg3, 0, 4}, 143177298Sobrien {"gs", SReg3, 0, 5}, 143233965Sjdp /* control registers */ 143377298Sobrien {"cr0", Control, 0, 0}, 143477298Sobrien {"cr1", Control, 0, 1}, 143577298Sobrien {"cr2", Control, 0, 2}, 143677298Sobrien {"cr3", Control, 0, 3}, 143777298Sobrien {"cr4", Control, 0, 4}, 143877298Sobrien {"cr5", Control, 0, 5}, 143977298Sobrien {"cr6", Control, 0, 6}, 144077298Sobrien {"cr7", Control, 0, 7}, 144177298Sobrien {"cr8", Control, RegRex, 0}, 144277298Sobrien {"cr9", Control, RegRex, 1}, 144377298Sobrien {"cr10", Control, RegRex, 2}, 144477298Sobrien {"cr11", Control, RegRex, 3}, 144577298Sobrien {"cr12", Control, RegRex, 4}, 144677298Sobrien {"cr13", Control, RegRex, 5}, 144777298Sobrien {"cr14", Control, RegRex, 6}, 144877298Sobrien {"cr15", Control, RegRex, 7}, 144933965Sjdp /* debug registers */ 145077298Sobrien {"db0", Debug, 0, 0}, 145177298Sobrien {"db1", Debug, 0, 1}, 145277298Sobrien {"db2", Debug, 0, 2}, 145377298Sobrien {"db3", Debug, 0, 3}, 145477298Sobrien {"db4", Debug, 0, 4}, 145577298Sobrien {"db5", Debug, 0, 5}, 145677298Sobrien {"db6", Debug, 0, 6}, 145777298Sobrien {"db7", Debug, 0, 7}, 145877298Sobrien {"db8", Debug, RegRex, 0}, 145977298Sobrien {"db9", Debug, RegRex, 1}, 146077298Sobrien {"db10", Debug, RegRex, 2}, 146177298Sobrien {"db11", Debug, RegRex, 3}, 146277298Sobrien {"db12", Debug, RegRex, 4}, 146377298Sobrien {"db13", Debug, RegRex, 5}, 146477298Sobrien {"db14", Debug, RegRex, 6}, 146577298Sobrien {"db15", Debug, RegRex, 7}, 146677298Sobrien {"dr0", Debug, 0, 0}, 146777298Sobrien {"dr1", Debug, 0, 1}, 146877298Sobrien {"dr2", Debug, 0, 2}, 146977298Sobrien {"dr3", Debug, 0, 3}, 147077298Sobrien {"dr4", Debug, 0, 4}, 147177298Sobrien {"dr5", Debug, 0, 5}, 147277298Sobrien {"dr6", Debug, 0, 6}, 147377298Sobrien {"dr7", Debug, 0, 7}, 147477298Sobrien {"dr8", Debug, RegRex, 0}, 147577298Sobrien {"dr9", Debug, RegRex, 1}, 147677298Sobrien {"dr10", Debug, RegRex, 2}, 147777298Sobrien {"dr11", Debug, RegRex, 3}, 147877298Sobrien {"dr12", Debug, RegRex, 4}, 147977298Sobrien {"dr13", Debug, RegRex, 5}, 148077298Sobrien {"dr14", Debug, RegRex, 6}, 148177298Sobrien {"dr15", Debug, RegRex, 7}, 148233965Sjdp /* test registers */ 148377298Sobrien {"tr0", Test, 0, 0}, 148477298Sobrien {"tr1", Test, 0, 1}, 148577298Sobrien {"tr2", Test, 0, 2}, 148677298Sobrien {"tr3", Test, 0, 3}, 148777298Sobrien {"tr4", Test, 0, 4}, 148877298Sobrien {"tr5", Test, 0, 5}, 148977298Sobrien {"tr6", Test, 0, 6}, 149077298Sobrien {"tr7", Test, 0, 7}, 149160484Sobrien /* mmx and simd registers */ 149277298Sobrien {"mm0", RegMMX, 0, 0}, 149377298Sobrien {"mm1", RegMMX, 0, 1}, 149477298Sobrien {"mm2", RegMMX, 0, 2}, 149577298Sobrien {"mm3", RegMMX, 0, 3}, 149677298Sobrien {"mm4", RegMMX, 0, 4}, 149777298Sobrien {"mm5", RegMMX, 0, 5}, 149877298Sobrien {"mm6", RegMMX, 0, 6}, 149977298Sobrien {"mm7", RegMMX, 0, 7}, 150077298Sobrien {"xmm0", RegXMM, 0, 0}, 150177298Sobrien {"xmm1", RegXMM, 0, 1}, 150277298Sobrien {"xmm2", RegXMM, 0, 2}, 150377298Sobrien {"xmm3", RegXMM, 0, 3}, 150477298Sobrien {"xmm4", RegXMM, 0, 4}, 150577298Sobrien {"xmm5", RegXMM, 0, 5}, 150677298Sobrien {"xmm6", RegXMM, 0, 6}, 150777298Sobrien {"xmm7", RegXMM, 0, 7}, 150877298Sobrien {"xmm8", RegXMM, RegRex, 0}, 150977298Sobrien {"xmm9", RegXMM, RegRex, 1}, 151077298Sobrien {"xmm10", RegXMM, RegRex, 2}, 151177298Sobrien {"xmm11", RegXMM, RegRex, 3}, 151277298Sobrien {"xmm12", RegXMM, RegRex, 4}, 151377298Sobrien {"xmm13", RegXMM, RegRex, 5}, 151477298Sobrien {"xmm14", RegXMM, RegRex, 6}, 151577298Sobrien {"xmm15", RegXMM, RegRex, 7}, 151677298Sobrien /* no type will make this register rejected for all purposes except 151777298Sobrien for addressing. This saves creating one extra type for RIP. */ 151877298Sobrien {"rip", BaseIndex, 0, 0} 151960484Sobrien}; 152060484Sobrien 152160484Sobrienstatic const reg_entry i386_float_regtab[] = { 152277298Sobrien {"st(0)", FloatReg|FloatAcc, 0, 0}, 152377298Sobrien {"st(1)", FloatReg, 0, 1}, 152477298Sobrien {"st(2)", FloatReg, 0, 2}, 152577298Sobrien {"st(3)", FloatReg, 0, 3}, 152677298Sobrien {"st(4)", FloatReg, 0, 4}, 152777298Sobrien {"st(5)", FloatReg, 0, 5}, 152877298Sobrien {"st(6)", FloatReg, 0, 6}, 152977298Sobrien {"st(7)", FloatReg, 0, 7} 153033965Sjdp}; 153133965Sjdp 153233965Sjdp#define MAX_REG_NAME_SIZE 8 /* for parsing register names from input */ 153333965Sjdp 153433965Sjdp/* segment stuff */ 153533965Sjdpstatic const seg_entry cs = { "cs", 0x2e }; 153633965Sjdpstatic const seg_entry ds = { "ds", 0x3e }; 153733965Sjdpstatic const seg_entry ss = { "ss", 0x36 }; 153833965Sjdpstatic const seg_entry es = { "es", 0x26 }; 153933965Sjdpstatic const seg_entry fs = { "fs", 0x64 }; 154033965Sjdpstatic const seg_entry gs = { "gs", 0x65 }; 154133965Sjdp 154260484Sobrien/* end of opcode/i386.h */ 1543