i386.h revision 60484
160484Sobrien/* opcode/i386.h -- Intel 80386 opcode table 260484Sobrien Copyright 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999 Free Software Foundation. 333965Sjdp 433965SjdpThis file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger. 533965Sjdp 633965SjdpThis program is free software; you can redistribute it and/or modify 733965Sjdpit under the terms of the GNU General Public License as published by 833965Sjdpthe Free Software Foundation; either version 2 of the License, or 933965Sjdp(at your option) any later version. 1033965Sjdp 1133965SjdpThis program is distributed in the hope that it will be useful, 1233965Sjdpbut WITHOUT ANY WARRANTY; without even the implied warranty of 1333965SjdpMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1433965SjdpGNU General Public License for more details. 1533965Sjdp 1633965SjdpYou should have received a copy of the GNU General Public License 1733965Sjdpalong with this program; if not, write to the Free Software 1833965SjdpFoundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 1933965Sjdp 2060484Sobrien/* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived 2160484Sobrien ix86 Unix assemblers, generate floating point instructions with 2260484Sobrien reversed source and destination registers in certain cases. 2360484Sobrien Unfortunately, gcc and possibly many other programs use this 2460484Sobrien reversed syntax, so we're stuck with it. 2533965Sjdp 2660484Sobrien eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but 2760484Sobrien `fsub %st,%st(3)' results in st(3) = st - st(3), rather than 2860484Sobrien the expected st(3) = st(3) - st 2960484Sobrien 3060484Sobrien This happens with all the non-commutative arithmetic floating point 3160484Sobrien operations with two register operands, where the source register is 3260484Sobrien %st, and destination register is %st(i). See FloatDR below. 3360484Sobrien 3460484Sobrien The affected opcode map is dceX, dcfX, deeX, defX. */ 3560484Sobrien 3660484Sobrien#ifndef SYSV386_COMPAT 3760484Sobrien/* Set non-zero for broken, compatible instructions. Set to zero for 3860484Sobrien non-broken opcodes at your peril. gcc generates SystemV/386 3960484Sobrien compatible instructions. */ 4060484Sobrien#define SYSV386_COMPAT 1 4160484Sobrien#endif 4260484Sobrien#ifndef OLDGCC_COMPAT 4360484Sobrien/* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could 4460484Sobrien generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands 4560484Sobrien reversed. */ 4660484Sobrien#define OLDGCC_COMPAT SYSV386_COMPAT 4760484Sobrien#endif 4860484Sobrien 4933965Sjdpstatic const template i386_optab[] = { 5033965Sjdp 5160484Sobrien#define X None 5260484Sobrien#define NoSuf (No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_dSuf|No_xSuf) 5360484Sobrien#define b_Suf (No_wSuf|No_lSuf|No_sSuf|No_dSuf|No_xSuf) 5460484Sobrien#define w_Suf (No_bSuf|No_lSuf|No_sSuf|No_dSuf|No_xSuf) 5560484Sobrien#define l_Suf (No_bSuf|No_wSuf|No_sSuf|No_dSuf|No_xSuf) 5660484Sobrien#define d_Suf (No_bSuf|No_wSuf|No_sSuf|No_lSuf|No_xSuf) 5760484Sobrien#define x_Suf (No_bSuf|No_wSuf|No_sSuf|No_lSuf|No_dSuf) 5860484Sobrien#define bw_Suf (No_lSuf|No_sSuf|No_dSuf|No_xSuf) 5960484Sobrien#define bl_Suf (No_wSuf|No_sSuf|No_dSuf|No_xSuf) 6060484Sobrien#define wl_Suf (No_bSuf|No_sSuf|No_dSuf|No_xSuf) 6160484Sobrien#define sl_Suf (No_bSuf|No_wSuf|No_dSuf|No_xSuf) 6260484Sobrien#define sld_Suf (No_bSuf|No_wSuf|No_xSuf) 6360484Sobrien#define sldx_Suf (No_bSuf|No_wSuf) 6460484Sobrien#define bwl_Suf (No_sSuf|No_dSuf|No_xSuf) 6560484Sobrien#define bwld_Suf (No_sSuf|No_xSuf) 6660484Sobrien#define FP (NoSuf|IgnoreSize) 6760484Sobrien#define l_FP (l_Suf|IgnoreSize) 6860484Sobrien#define d_FP (d_Suf|IgnoreSize) 6960484Sobrien#define x_FP (x_Suf|IgnoreSize) 7060484Sobrien#define sl_FP (sl_Suf|IgnoreSize) 7160484Sobrien#define sld_FP (sld_Suf|IgnoreSize) 7260484Sobrien#define sldx_FP (sldx_Suf|IgnoreSize) 7360484Sobrien#if SYSV386_COMPAT 7460484Sobrien/* Someone forgot that the FloatR bit reverses the operation when not 7560484Sobrien equal to the FloatD bit. ie. Changing only FloatD results in the 7660484Sobrien destination being swapped *and* the direction being reversed. */ 7760484Sobrien#define FloatDR FloatD 7860484Sobrien#else 7960484Sobrien#define FloatDR (FloatD|FloatR) 8060484Sobrien#endif 8160484Sobrien 8260484Sobrien/* Move instructions. */ 8333965Sjdp#define MOV_AX_DISP32 0xa0 8460484Sobrien{ "mov", 2, 0xa0, X, bwl_Suf|D|W, { Disp16|Disp32, Acc, 0 } }, 8560484Sobrien{ "mov", 2, 0x88, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0 } }, 8660484Sobrien{ "mov", 2, 0xb0, X, bwl_Suf|W|ShortForm, { Imm, Reg, 0 } }, 8760484Sobrien{ "mov", 2, 0xc6, X, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0 } }, 8860484Sobrien/* The next two instructions accept WordReg so that a segment register 8960484Sobrien can be copied to a 32 bit register, and vice versa, without using a 9060484Sobrien size prefix. When moving to a 32 bit register, the upper 16 bits 9160484Sobrien are set to an implementation defined value (on the Pentium Pro, 9238889Sjdp the implementation defined value is zero). */ 9360484Sobrien{ "mov", 2, 0x8c, X, wl_Suf|Modrm, { SReg3|SReg2, WordReg|WordMem, 0 } }, 9460484Sobrien{ "mov", 2, 0x8e, X, wl_Suf|Modrm|IgnoreSize, { WordReg|WordMem, SReg3|SReg2, 0 } }, 9560484Sobrien/* Move to/from control debug registers. */ 9660484Sobrien{ "mov", 2, 0x0f20, X, l_Suf|D|Modrm|IgnoreSize, { Control, Reg32|InvMem, 0} }, 9760484Sobrien{ "mov", 2, 0x0f21, X, l_Suf|D|Modrm|IgnoreSize, { Debug, Reg32|InvMem, 0} }, 9860484Sobrien{ "mov", 2, 0x0f24, X, l_Suf|D|Modrm|IgnoreSize, { Test, Reg32|InvMem, 0} }, 9933965Sjdp 10060484Sobrien/* Move with sign extend. */ 10133965Sjdp/* "movsbl" & "movsbw" must not be unified into "movsb" to avoid 10260484Sobrien conflict with the "movs" string move instruction. */ 10360484Sobrien{"movsbl", 2, 0x0fbe, X, NoSuf|Modrm, { Reg8|ByteMem, Reg32, 0} }, 10460484Sobrien{"movsbw", 2, 0x0fbe, X, NoSuf|Modrm, { Reg8|ByteMem, Reg16, 0} }, 10560484Sobrien{"movswl", 2, 0x0fbf, X, NoSuf|Modrm, { Reg16|ShortMem, Reg32, 0} }, 10660484Sobrien/* Intel Syntax */ 10760484Sobrien{"movsx", 2, 0x0fbf, X, w_Suf|Modrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} }, 10860484Sobrien{"movsx", 2, 0x0fbe, X, b_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} }, 10933965Sjdp 11060484Sobrien/* Move with zero extend. */ 11160484Sobrien{"movzb", 2, 0x0fb6, X, wl_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} }, 11260484Sobrien{"movzwl", 2, 0x0fb7, X, NoSuf|Modrm, { Reg16|ShortMem, Reg32, 0} }, 11360484Sobrien/* Intel Syntax */ 11460484Sobrien{"movzx", 2, 0x0fb7, X, w_Suf|Modrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} }, 11560484Sobrien{"movzx", 2, 0x0fb6, X, b_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} }, 11633965Sjdp 11760484Sobrien/* Push instructions. */ 11860484Sobrien{"push", 1, 0x50, X, wl_Suf|ShortForm|DefaultSize, { WordReg, 0, 0 } }, 11960484Sobrien{"push", 1, 0xff, 6, wl_Suf|Modrm|DefaultSize, { WordReg|WordMem, 0, 0 } }, 12060484Sobrien{"push", 1, 0x6a, X, wl_Suf|DefaultSize, { Imm8S, 0, 0} }, 12160484Sobrien{"push", 1, 0x68, X, wl_Suf|DefaultSize, { Imm16|Imm32, 0, 0} }, 12260484Sobrien{"push", 1, 0x06, X, wl_Suf|Seg2ShortForm|DefaultSize, { SReg2, 0, 0 } }, 12360484Sobrien{"push", 1, 0x0fa0, X, wl_Suf|Seg3ShortForm|DefaultSize, { SReg3, 0, 0 } }, 12460484Sobrien{"pusha", 0, 0x60, X, wl_Suf|DefaultSize, { 0, 0, 0 } }, 12533965Sjdp 12660484Sobrien/* Pop instructions. */ 12760484Sobrien{"pop", 1, 0x58, X, wl_Suf|ShortForm|DefaultSize, { WordReg, 0, 0 } }, 12860484Sobrien{"pop", 1, 0x8f, 0, wl_Suf|Modrm|DefaultSize, { WordReg|WordMem, 0, 0 } }, 12960484Sobrien#define POP_SEG_SHORT 0x07 13060484Sobrien{"pop", 1, 0x07, X, wl_Suf|Seg2ShortForm|DefaultSize, { SReg2, 0, 0 } }, 13160484Sobrien{"pop", 1, 0x0fa1, X, wl_Suf|Seg3ShortForm|DefaultSize, { SReg3, 0, 0 } }, 13260484Sobrien{"popa", 0, 0x61, X, wl_Suf|DefaultSize, { 0, 0, 0 } }, 13333965Sjdp 13460484Sobrien/* Exchange instructions. 13560484Sobrien xchg commutes: we allow both operand orders. */ 13660484Sobrien{"xchg", 2, 0x90, X, wl_Suf|ShortForm, { WordReg, Acc, 0 } }, 13760484Sobrien{"xchg", 2, 0x90, X, wl_Suf|ShortForm, { Acc, WordReg, 0 } }, 13860484Sobrien{"xchg", 2, 0x86, X, bwl_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } }, 13960484Sobrien{"xchg", 2, 0x86, X, bwl_Suf|W|Modrm, { Reg|AnyMem, Reg, 0 } }, 14033965Sjdp 14160484Sobrien/* In/out from ports. */ 14260484Sobrien{"in", 2, 0xe4, X, bwl_Suf|W, { Imm8, Acc, 0 } }, 14360484Sobrien{"in", 2, 0xec, X, bwl_Suf|W, { InOutPortReg, Acc, 0 } }, 14460484Sobrien{"in", 1, 0xe4, X, bwl_Suf|W, { Imm8, 0, 0 } }, 14560484Sobrien{"in", 1, 0xec, X, bwl_Suf|W, { InOutPortReg, 0, 0 } }, 14660484Sobrien{"out", 2, 0xe6, X, bwl_Suf|W, { Acc, Imm8, 0 } }, 14760484Sobrien{"out", 2, 0xee, X, bwl_Suf|W, { Acc, InOutPortReg, 0 } }, 14860484Sobrien{"out", 1, 0xe6, X, bwl_Suf|W, { Imm8, 0, 0 } }, 14960484Sobrien{"out", 1, 0xee, X, bwl_Suf|W, { InOutPortReg, 0, 0 } }, 15033965Sjdp 15160484Sobrien/* Load effective address. */ 15260484Sobrien{"lea", 2, 0x8d, X, wl_Suf|Modrm, { WordMem, WordReg, 0 } }, 15333965Sjdp 15460484Sobrien/* Load segment registers from memory. */ 15560484Sobrien{"lds", 2, 0xc5, X, wl_Suf|Modrm, { WordMem, WordReg, 0} }, 15660484Sobrien{"les", 2, 0xc4, X, wl_Suf|Modrm, { WordMem, WordReg, 0} }, 15760484Sobrien{"lfs", 2, 0x0fb4, X, wl_Suf|Modrm, { WordMem, WordReg, 0} }, 15860484Sobrien{"lgs", 2, 0x0fb5, X, wl_Suf|Modrm, { WordMem, WordReg, 0} }, 15960484Sobrien{"lss", 2, 0x0fb2, X, wl_Suf|Modrm, { WordMem, WordReg, 0} }, 16033965Sjdp 16160484Sobrien/* Flags register instructions. */ 16260484Sobrien{"clc", 0, 0xf8, X, NoSuf, { 0, 0, 0} }, 16360484Sobrien{"cld", 0, 0xfc, X, NoSuf, { 0, 0, 0} }, 16460484Sobrien{"cli", 0, 0xfa, X, NoSuf, { 0, 0, 0} }, 16560484Sobrien{"clts", 0, 0x0f06, X, NoSuf, { 0, 0, 0} }, 16660484Sobrien{"cmc", 0, 0xf5, X, NoSuf, { 0, 0, 0} }, 16760484Sobrien{"lahf", 0, 0x9f, X, NoSuf, { 0, 0, 0} }, 16860484Sobrien{"sahf", 0, 0x9e, X, NoSuf, { 0, 0, 0} }, 16960484Sobrien{"pushf", 0, 0x9c, X, wl_Suf|DefaultSize, { 0, 0, 0} }, 17060484Sobrien{"popf", 0, 0x9d, X, wl_Suf|DefaultSize, { 0, 0, 0} }, 17160484Sobrien{"stc", 0, 0xf9, X, NoSuf, { 0, 0, 0} }, 17260484Sobrien{"std", 0, 0xfd, X, NoSuf, { 0, 0, 0} }, 17360484Sobrien{"sti", 0, 0xfb, X, NoSuf, { 0, 0, 0} }, 17433965Sjdp 17560484Sobrien/* Arithmetic. */ 17660484Sobrien{"add", 2, 0x00, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 17760484Sobrien{"add", 2, 0x83, 0, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 17860484Sobrien{"add", 2, 0x04, X, bwl_Suf|W, { Imm, Acc, 0} }, 17960484Sobrien{"add", 2, 0x80, 0, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} }, 18033965Sjdp 18160484Sobrien{"inc", 1, 0x40, X, wl_Suf|ShortForm, { WordReg, 0, 0} }, 18260484Sobrien{"inc", 1, 0xfe, 0, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 18333965Sjdp 18460484Sobrien{"sub", 2, 0x28, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 18560484Sobrien{"sub", 2, 0x83, 5, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 18660484Sobrien{"sub", 2, 0x2c, X, bwl_Suf|W, { Imm, Acc, 0} }, 18760484Sobrien{"sub", 2, 0x80, 5, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} }, 18833965Sjdp 18960484Sobrien{"dec", 1, 0x48, X, wl_Suf|ShortForm, { WordReg, 0, 0} }, 19060484Sobrien{"dec", 1, 0xfe, 1, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 19133965Sjdp 19260484Sobrien{"sbb", 2, 0x18, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 19360484Sobrien{"sbb", 2, 0x83, 3, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 19460484Sobrien{"sbb", 2, 0x1c, X, bwl_Suf|W, { Imm, Acc, 0} }, 19560484Sobrien{"sbb", 2, 0x80, 3, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} }, 19633965Sjdp 19760484Sobrien{"cmp", 2, 0x38, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 19860484Sobrien{"cmp", 2, 0x83, 7, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 19960484Sobrien{"cmp", 2, 0x3c, X, bwl_Suf|W, { Imm, Acc, 0} }, 20060484Sobrien{"cmp", 2, 0x80, 7, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} }, 20133965Sjdp 20260484Sobrien{"test", 2, 0x84, X, bwl_Suf|W|Modrm, { Reg|AnyMem, Reg, 0} }, 20360484Sobrien{"test", 2, 0x84, X, bwl_Suf|W|Modrm, { Reg, Reg|AnyMem, 0} }, 20460484Sobrien{"test", 2, 0xa8, X, bwl_Suf|W, { Imm, Acc, 0} }, 20560484Sobrien{"test", 2, 0xf6, 0, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} }, 20633965Sjdp 20760484Sobrien{"and", 2, 0x20, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 20860484Sobrien{"and", 2, 0x83, 4, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 20960484Sobrien{"and", 2, 0x24, X, bwl_Suf|W, { Imm, Acc, 0} }, 21060484Sobrien{"and", 2, 0x80, 4, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} }, 21133965Sjdp 21260484Sobrien{"or", 2, 0x08, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 21360484Sobrien{"or", 2, 0x83, 1, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 21460484Sobrien{"or", 2, 0x0c, X, bwl_Suf|W, { Imm, Acc, 0} }, 21560484Sobrien{"or", 2, 0x80, 1, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} }, 21633965Sjdp 21760484Sobrien{"xor", 2, 0x30, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 21860484Sobrien{"xor", 2, 0x83, 6, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 21960484Sobrien{"xor", 2, 0x34, X, bwl_Suf|W, { Imm, Acc, 0} }, 22060484Sobrien{"xor", 2, 0x80, 6, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} }, 22133965Sjdp 22233965Sjdp/* iclr with 1 operand is really xor with 2 operands. */ 22360484Sobrien{"clr", 1, 0x30, X, bwl_Suf|W|Modrm|regKludge, { Reg, 0, 0 } }, 22433965Sjdp 22560484Sobrien{"adc", 2, 0x10, X, bwl_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, 22660484Sobrien{"adc", 2, 0x83, 2, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, 0} }, 22760484Sobrien{"adc", 2, 0x14, X, bwl_Suf|W, { Imm, Acc, 0} }, 22860484Sobrien{"adc", 2, 0x80, 2, bwl_Suf|W|Modrm, { Imm, Reg|AnyMem, 0} }, 22933965Sjdp 23060484Sobrien{"neg", 1, 0xf6, 3, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 23160484Sobrien{"not", 1, 0xf6, 2, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 23233965Sjdp 23360484Sobrien{"aaa", 0, 0x37, X, NoSuf, { 0, 0, 0} }, 23460484Sobrien{"aas", 0, 0x3f, X, NoSuf, { 0, 0, 0} }, 23560484Sobrien{"daa", 0, 0x27, X, NoSuf, { 0, 0, 0} }, 23660484Sobrien{"das", 0, 0x2f, X, NoSuf, { 0, 0, 0} }, 23760484Sobrien{"aad", 0, 0xd50a, X, NoSuf, { 0, 0, 0} }, 23860484Sobrien{"aad", 1, 0xd5, X, NoSuf, { Imm8S, 0, 0} }, 23960484Sobrien{"aam", 0, 0xd40a, X, NoSuf, { 0, 0, 0} }, 24060484Sobrien{"aam", 1, 0xd4, X, NoSuf, { Imm8S, 0, 0} }, 24133965Sjdp 24260484Sobrien/* Conversion insns. */ 24360484Sobrien/* Intel naming */ 24460484Sobrien{"cbw", 0, 0x98, X, NoSuf|Size16, { 0, 0, 0} }, 24560484Sobrien{"cwde", 0, 0x98, X, NoSuf|Size32, { 0, 0, 0} }, 24660484Sobrien{"cwd", 0, 0x99, X, NoSuf|Size16, { 0, 0, 0} }, 24760484Sobrien{"cdq", 0, 0x99, X, NoSuf|Size32, { 0, 0, 0} }, 24860484Sobrien/* AT&T naming */ 24960484Sobrien{"cbtw", 0, 0x98, X, NoSuf|Size16, { 0, 0, 0} }, 25060484Sobrien{"cwtl", 0, 0x98, X, NoSuf|Size32, { 0, 0, 0} }, 25160484Sobrien{"cwtd", 0, 0x99, X, NoSuf|Size16, { 0, 0, 0} }, 25260484Sobrien{"cltd", 0, 0x99, X, NoSuf|Size32, { 0, 0, 0} }, 25333965Sjdp 25433965Sjdp/* Warning! the mul/imul (opcode 0xf6) must only have 1 operand! They are 25533965Sjdp expanding 64-bit multiplies, and *cannot* be selected to accomplish 25633965Sjdp 'imul %ebx, %eax' (opcode 0x0faf must be used in this case) 25760484Sobrien These multiplies can only be selected with single operand forms. */ 25860484Sobrien{"mul", 1, 0xf6, 4, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 25960484Sobrien{"imul", 1, 0xf6, 5, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 26060484Sobrien{"imul", 2, 0x0faf, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 26160484Sobrien{"imul", 3, 0x6b, X, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, WordReg} }, 26260484Sobrien{"imul", 3, 0x69, X, wl_Suf|Modrm, { Imm16|Imm32, WordReg|WordMem, WordReg} }, 26360484Sobrien/* imul with 2 operands mimics imul with 3 by putting the register in 26460484Sobrien both i.rm.reg & i.rm.regmem fields. regKludge enables this 26560484Sobrien transformation. */ 26660484Sobrien{"imul", 2, 0x6b, X, wl_Suf|Modrm|regKludge,{ Imm8S, WordReg, 0} }, 26760484Sobrien{"imul", 2, 0x69, X, wl_Suf|Modrm|regKludge,{ Imm16|Imm32, WordReg, 0} }, 26833965Sjdp 26960484Sobrien{"div", 1, 0xf6, 6, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 27060484Sobrien{"div", 2, 0xf6, 6, bwl_Suf|W|Modrm, { Reg|AnyMem, Acc, 0} }, 27160484Sobrien{"idiv", 1, 0xf6, 7, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 27260484Sobrien{"idiv", 2, 0xf6, 7, bwl_Suf|W|Modrm, { Reg|AnyMem, Acc, 0} }, 27333965Sjdp 27460484Sobrien{"rol", 2, 0xd0, 0, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 27560484Sobrien{"rol", 2, 0xc0, 0, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 27660484Sobrien{"rol", 2, 0xd2, 0, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 27760484Sobrien{"rol", 1, 0xd0, 0, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 27833965Sjdp 27960484Sobrien{"ror", 2, 0xd0, 1, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 28060484Sobrien{"ror", 2, 0xc0, 1, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 28160484Sobrien{"ror", 2, 0xd2, 1, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 28260484Sobrien{"ror", 1, 0xd0, 1, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 28333965Sjdp 28460484Sobrien{"rcl", 2, 0xd0, 2, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 28560484Sobrien{"rcl", 2, 0xc0, 2, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 28660484Sobrien{"rcl", 2, 0xd2, 2, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 28760484Sobrien{"rcl", 1, 0xd0, 2, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 28833965Sjdp 28960484Sobrien{"rcr", 2, 0xd0, 3, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 29060484Sobrien{"rcr", 2, 0xc0, 3, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 29160484Sobrien{"rcr", 2, 0xd2, 3, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 29260484Sobrien{"rcr", 1, 0xd0, 3, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 29333965Sjdp 29460484Sobrien{"sal", 2, 0xd0, 4, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 29560484Sobrien{"sal", 2, 0xc0, 4, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 29660484Sobrien{"sal", 2, 0xd2, 4, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 29760484Sobrien{"sal", 1, 0xd0, 4, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 29860484Sobrien{"shl", 2, 0xd0, 4, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 29960484Sobrien{"shl", 2, 0xc0, 4, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 30060484Sobrien{"shl", 2, 0xd2, 4, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 30160484Sobrien{"shl", 1, 0xd0, 4, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 30233965Sjdp 30360484Sobrien{"shld", 3, 0x0fa4, X, wl_Suf|Modrm, { Imm8, WordReg, WordReg|WordMem} }, 30460484Sobrien{"shld", 3, 0x0fa5, X, wl_Suf|Modrm, { ShiftCount, WordReg, WordReg|WordMem} }, 30560484Sobrien{"shld", 2, 0x0fa5, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, 30633965Sjdp 30760484Sobrien{"shr", 2, 0xd0, 5, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 30860484Sobrien{"shr", 2, 0xc0, 5, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 30960484Sobrien{"shr", 2, 0xd2, 5, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 31060484Sobrien{"shr", 1, 0xd0, 5, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 31133965Sjdp 31260484Sobrien{"shrd", 3, 0x0fac, X, wl_Suf|Modrm, { Imm8, WordReg, WordReg|WordMem} }, 31360484Sobrien{"shrd", 3, 0x0fad, X, wl_Suf|Modrm, { ShiftCount, WordReg, WordReg|WordMem} }, 31460484Sobrien{"shrd", 2, 0x0fad, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, 31533965Sjdp 31660484Sobrien{"sar", 2, 0xd0, 7, bwl_Suf|W|Modrm, { Imm1, Reg|AnyMem, 0} }, 31760484Sobrien{"sar", 2, 0xc0, 7, bwl_Suf|W|Modrm, { Imm8, Reg|AnyMem, 0} }, 31860484Sobrien{"sar", 2, 0xd2, 7, bwl_Suf|W|Modrm, { ShiftCount, Reg|AnyMem, 0} }, 31960484Sobrien{"sar", 1, 0xd0, 7, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, 32033965Sjdp 32160484Sobrien/* Control transfer instructions. */ 32260484Sobrien{"call", 1, 0xe8, X, wl_Suf|JumpDword|DefaultSize, { Disp16|Disp32, 0, 0} }, 32360484Sobrien{"call", 1, 0xff, 2, wl_Suf|Modrm|DefaultSize, { WordReg|WordMem|JumpAbsolute, 0, 0} }, 32460484Sobrien/* Intel Syntax */ 32560484Sobrien{"call", 2, 0x9a, X, wl_Suf|JumpInterSegment|DefaultSize, { Imm16, Imm16|Imm32, 0} }, 32660484Sobrien/* Intel Syntax */ 32760484Sobrien{"call", 1, 0xff, 3, x_Suf|Modrm|DefaultSize, { WordMem, 0, 0} }, 32860484Sobrien{"lcall", 2, 0x9a, X, wl_Suf|JumpInterSegment|DefaultSize, { Imm16, Imm16|Imm32, 0} }, 32960484Sobrien{"lcall", 1, 0xff, 3, wl_Suf|Modrm|DefaultSize, { WordMem|JumpAbsolute, 0, 0} }, 33033965Sjdp 33133965Sjdp#define JUMP_PC_RELATIVE 0xeb 33260484Sobrien{"jmp", 1, 0xeb, X, NoSuf|Jump, { Disp, 0, 0} }, 33360484Sobrien{"jmp", 1, 0xff, 4, wl_Suf|Modrm, { WordReg|WordMem|JumpAbsolute, 0, 0} }, 33460484Sobrien/* Intel Syntax */ 33560484Sobrien{"jmp", 2, 0xea, X, wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} }, 33660484Sobrien/* Intel Syntax */ 33760484Sobrien{"jmp", 1, 0xff, 5, x_Suf|Modrm, { WordMem, 0, 0} }, 33860484Sobrien{"ljmp", 2, 0xea, X, wl_Suf|JumpInterSegment, { Imm16, Imm16|Imm32, 0} }, 33960484Sobrien{"ljmp", 1, 0xff, 5, wl_Suf|Modrm, { WordMem|JumpAbsolute, 0, 0} }, 34033965Sjdp 34160484Sobrien{"ret", 0, 0xc3, X, wl_Suf|DefaultSize, { 0, 0, 0} }, 34260484Sobrien{"ret", 1, 0xc2, X, wl_Suf|DefaultSize, { Imm16, 0, 0} }, 34360484Sobrien{"lret", 0, 0xcb, X, wl_Suf|DefaultSize, { 0, 0, 0} }, 34460484Sobrien{"lret", 1, 0xca, X, wl_Suf|DefaultSize, { Imm16, 0, 0} }, 34560484Sobrien{"enter", 2, 0xc8, X, wl_Suf|DefaultSize, { Imm16, Imm8, 0} }, 34660484Sobrien{"leave", 0, 0xc9, X, wl_Suf|DefaultSize, { 0, 0, 0} }, 34733965Sjdp 34860484Sobrien/* Conditional jumps. */ 34960484Sobrien{"jo", 1, 0x70, X, NoSuf|Jump, { Disp, 0, 0} }, 35060484Sobrien{"jno", 1, 0x71, X, NoSuf|Jump, { Disp, 0, 0} }, 35160484Sobrien{"jb", 1, 0x72, X, NoSuf|Jump, { Disp, 0, 0} }, 35260484Sobrien{"jc", 1, 0x72, X, NoSuf|Jump, { Disp, 0, 0} }, 35360484Sobrien{"jnae", 1, 0x72, X, NoSuf|Jump, { Disp, 0, 0} }, 35460484Sobrien{"jnb", 1, 0x73, X, NoSuf|Jump, { Disp, 0, 0} }, 35560484Sobrien{"jnc", 1, 0x73, X, NoSuf|Jump, { Disp, 0, 0} }, 35660484Sobrien{"jae", 1, 0x73, X, NoSuf|Jump, { Disp, 0, 0} }, 35760484Sobrien{"je", 1, 0x74, X, NoSuf|Jump, { Disp, 0, 0} }, 35860484Sobrien{"jz", 1, 0x74, X, NoSuf|Jump, { Disp, 0, 0} }, 35960484Sobrien{"jne", 1, 0x75, X, NoSuf|Jump, { Disp, 0, 0} }, 36060484Sobrien{"jnz", 1, 0x75, X, NoSuf|Jump, { Disp, 0, 0} }, 36160484Sobrien{"jbe", 1, 0x76, X, NoSuf|Jump, { Disp, 0, 0} }, 36260484Sobrien{"jna", 1, 0x76, X, NoSuf|Jump, { Disp, 0, 0} }, 36360484Sobrien{"jnbe", 1, 0x77, X, NoSuf|Jump, { Disp, 0, 0} }, 36460484Sobrien{"ja", 1, 0x77, X, NoSuf|Jump, { Disp, 0, 0} }, 36560484Sobrien{"js", 1, 0x78, X, NoSuf|Jump, { Disp, 0, 0} }, 36660484Sobrien{"jns", 1, 0x79, X, NoSuf|Jump, { Disp, 0, 0} }, 36760484Sobrien{"jp", 1, 0x7a, X, NoSuf|Jump, { Disp, 0, 0} }, 36860484Sobrien{"jpe", 1, 0x7a, X, NoSuf|Jump, { Disp, 0, 0} }, 36960484Sobrien{"jnp", 1, 0x7b, X, NoSuf|Jump, { Disp, 0, 0} }, 37060484Sobrien{"jpo", 1, 0x7b, X, NoSuf|Jump, { Disp, 0, 0} }, 37160484Sobrien{"jl", 1, 0x7c, X, NoSuf|Jump, { Disp, 0, 0} }, 37260484Sobrien{"jnge", 1, 0x7c, X, NoSuf|Jump, { Disp, 0, 0} }, 37360484Sobrien{"jnl", 1, 0x7d, X, NoSuf|Jump, { Disp, 0, 0} }, 37460484Sobrien{"jge", 1, 0x7d, X, NoSuf|Jump, { Disp, 0, 0} }, 37560484Sobrien{"jle", 1, 0x7e, X, NoSuf|Jump, { Disp, 0, 0} }, 37660484Sobrien{"jng", 1, 0x7e, X, NoSuf|Jump, { Disp, 0, 0} }, 37760484Sobrien{"jnle", 1, 0x7f, X, NoSuf|Jump, { Disp, 0, 0} }, 37860484Sobrien{"jg", 1, 0x7f, X, NoSuf|Jump, { Disp, 0, 0} }, 37933965Sjdp 38038889Sjdp/* jcxz vs. jecxz is chosen on the basis of the address size prefix. */ 38160484Sobrien{"jcxz", 1, 0xe3, X, NoSuf|JumpByte|Size16, { Disp, 0, 0} }, 38260484Sobrien{"jecxz", 1, 0xe3, X, NoSuf|JumpByte|Size32, { Disp, 0, 0} }, 38333965Sjdp 38460484Sobrien/* The loop instructions also use the address size prefix to select 38560484Sobrien %cx rather than %ecx for the loop count, so the `w' form of these 38660484Sobrien instructions emit an address size prefix rather than a data size 38760484Sobrien prefix. */ 38860484Sobrien{"loop", 1, 0xe2, X, wl_Suf|JumpByte, { Disp, 0, 0} }, 38960484Sobrien{"loopz", 1, 0xe1, X, wl_Suf|JumpByte, { Disp, 0, 0} }, 39060484Sobrien{"loope", 1, 0xe1, X, wl_Suf|JumpByte, { Disp, 0, 0} }, 39160484Sobrien{"loopnz", 1, 0xe0, X, wl_Suf|JumpByte, { Disp, 0, 0} }, 39260484Sobrien{"loopne", 1, 0xe0, X, wl_Suf|JumpByte, { Disp, 0, 0} }, 39333965Sjdp 39460484Sobrien/* Set byte on flag instructions. */ 39560484Sobrien{"seto", 1, 0x0f90, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 39660484Sobrien{"setno", 1, 0x0f91, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 39760484Sobrien{"setb", 1, 0x0f92, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 39860484Sobrien{"setc", 1, 0x0f92, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 39960484Sobrien{"setnae", 1, 0x0f92, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 40060484Sobrien{"setnb", 1, 0x0f93, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 40160484Sobrien{"setnc", 1, 0x0f93, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 40260484Sobrien{"setae", 1, 0x0f93, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 40360484Sobrien{"sete", 1, 0x0f94, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 40460484Sobrien{"setz", 1, 0x0f94, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 40560484Sobrien{"setne", 1, 0x0f95, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 40660484Sobrien{"setnz", 1, 0x0f95, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 40760484Sobrien{"setbe", 1, 0x0f96, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 40860484Sobrien{"setna", 1, 0x0f96, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 40960484Sobrien{"setnbe", 1, 0x0f97, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 41060484Sobrien{"seta", 1, 0x0f97, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 41160484Sobrien{"sets", 1, 0x0f98, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 41260484Sobrien{"setns", 1, 0x0f99, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 41360484Sobrien{"setp", 1, 0x0f9a, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 41460484Sobrien{"setpe", 1, 0x0f9a, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 41560484Sobrien{"setnp", 1, 0x0f9b, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 41660484Sobrien{"setpo", 1, 0x0f9b, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 41760484Sobrien{"setl", 1, 0x0f9c, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 41860484Sobrien{"setnge", 1, 0x0f9c, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 41960484Sobrien{"setnl", 1, 0x0f9d, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 42060484Sobrien{"setge", 1, 0x0f9d, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 42160484Sobrien{"setle", 1, 0x0f9e, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 42260484Sobrien{"setng", 1, 0x0f9e, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 42360484Sobrien{"setnle", 1, 0x0f9f, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 42460484Sobrien{"setg", 1, 0x0f9f, 0, b_Suf|Modrm, { Reg8|ByteMem, 0, 0} }, 42533965Sjdp 42660484Sobrien/* String manipulation. */ 42760484Sobrien{"cmps", 0, 0xa6, X, bwld_Suf|W|IsString, { 0, 0, 0} }, 42860484Sobrien{"cmps", 2, 0xa6, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, AnyMem, 0} }, 42960484Sobrien{"scmp", 0, 0xa6, X, bwld_Suf|W|IsString, { 0, 0, 0} }, 43060484Sobrien{"scmp", 2, 0xa6, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, AnyMem, 0} }, 43160484Sobrien{"ins", 0, 0x6c, X, bwld_Suf|W|IsString, { 0, 0, 0} }, 43260484Sobrien{"ins", 2, 0x6c, X, bwld_Suf|W|IsString, { InOutPortReg, AnyMem|EsSeg, 0} }, 43360484Sobrien{"outs", 0, 0x6e, X, bwld_Suf|W|IsString, { 0, 0, 0} }, 43460484Sobrien{"outs", 2, 0x6e, X, bwld_Suf|W|IsString, { AnyMem, InOutPortReg, 0} }, 43560484Sobrien{"lods", 0, 0xac, X, bwld_Suf|W|IsString, { 0, 0, 0} }, 43660484Sobrien{"lods", 1, 0xac, X, bwld_Suf|W|IsString, { AnyMem, 0, 0} }, 43760484Sobrien{"lods", 2, 0xac, X, bwld_Suf|W|IsString, { AnyMem, Acc, 0} }, 43860484Sobrien{"slod", 0, 0xac, X, bwld_Suf|W|IsString, { 0, 0, 0} }, 43960484Sobrien{"slod", 1, 0xac, X, bwld_Suf|W|IsString, { AnyMem, 0, 0} }, 44060484Sobrien{"slod", 2, 0xac, X, bwld_Suf|W|IsString, { AnyMem, Acc, 0} }, 44160484Sobrien{"movs", 0, 0xa4, X, bwld_Suf|W|IsString, { 0, 0, 0} }, 44260484Sobrien{"movs", 2, 0xa4, X, bwld_Suf|W|IsString, { AnyMem, AnyMem|EsSeg, 0} }, 44360484Sobrien{"smov", 0, 0xa4, X, bwld_Suf|W|IsString, { 0, 0, 0} }, 44460484Sobrien{"smov", 2, 0xa4, X, bwld_Suf|W|IsString, { AnyMem, AnyMem|EsSeg, 0} }, 44560484Sobrien{"scas", 0, 0xae, X, bwld_Suf|W|IsString, { 0, 0, 0} }, 44660484Sobrien{"scas", 1, 0xae, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, 0, 0} }, 44760484Sobrien{"scas", 2, 0xae, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, Acc, 0} }, 44860484Sobrien{"ssca", 0, 0xae, X, bwld_Suf|W|IsString, { 0, 0, 0} }, 44960484Sobrien{"ssca", 1, 0xae, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, 0, 0} }, 45060484Sobrien{"ssca", 2, 0xae, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, Acc, 0} }, 45160484Sobrien{"stos", 0, 0xaa, X, bwld_Suf|W|IsString, { 0, 0, 0} }, 45260484Sobrien{"stos", 1, 0xaa, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, 0, 0} }, 45360484Sobrien{"stos", 2, 0xaa, X, bwld_Suf|W|IsString, { Acc, AnyMem|EsSeg, 0} }, 45460484Sobrien{"ssto", 0, 0xaa, X, bwld_Suf|W|IsString, { 0, 0, 0} }, 45560484Sobrien{"ssto", 1, 0xaa, X, bwld_Suf|W|IsString, { AnyMem|EsSeg, 0, 0} }, 45660484Sobrien{"ssto", 2, 0xaa, X, bwld_Suf|W|IsString, { Acc, AnyMem|EsSeg, 0} }, 45760484Sobrien{"xlat", 0, 0xd7, X, b_Suf|IsString, { 0, 0, 0} }, 45860484Sobrien{"xlat", 1, 0xd7, X, b_Suf|IsString, { AnyMem, 0, 0} }, 45933965Sjdp 46060484Sobrien/* Bit manipulation. */ 46160484Sobrien{"bsf", 2, 0x0fbc, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 46260484Sobrien{"bsr", 2, 0x0fbd, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 46360484Sobrien{"bt", 2, 0x0fa3, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, 46460484Sobrien{"bt", 2, 0x0fba, 4, wl_Suf|Modrm, { Imm8, WordReg|WordMem, 0} }, 46560484Sobrien{"btc", 2, 0x0fbb, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, 46660484Sobrien{"btc", 2, 0x0fba, 7, wl_Suf|Modrm, { Imm8, WordReg|WordMem, 0} }, 46760484Sobrien{"btr", 2, 0x0fb3, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, 46860484Sobrien{"btr", 2, 0x0fba, 6, wl_Suf|Modrm, { Imm8, WordReg|WordMem, 0} }, 46960484Sobrien{"bts", 2, 0x0fab, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, 47060484Sobrien{"bts", 2, 0x0fba, 5, wl_Suf|Modrm, { Imm8, WordReg|WordMem, 0} }, 47133965Sjdp 47260484Sobrien/* Interrupts & op. sys insns. */ 47333965Sjdp/* See gas/config/tc-i386.c for conversion of 'int $3' into the special 47460484Sobrien int 3 insn. */ 47533965Sjdp#define INT_OPCODE 0xcd 47633965Sjdp#define INT3_OPCODE 0xcc 47760484Sobrien{"int", 1, 0xcd, X, NoSuf, { Imm8, 0, 0} }, 47860484Sobrien{"int3", 0, 0xcc, X, NoSuf, { 0, 0, 0} }, 47960484Sobrien{"into", 0, 0xce, X, NoSuf, { 0, 0, 0} }, 48060484Sobrien{"iret", 0, 0xcf, X, wl_Suf, { 0, 0, 0} }, 48160484Sobrien/* i386sl, i486sl, later 486, and Pentium. */ 48260484Sobrien{"rsm", 0, 0x0faa, X, NoSuf, { 0, 0, 0} }, 48333965Sjdp 48460484Sobrien{"bound", 2, 0x62, X, wl_Suf|Modrm, { WordReg, WordMem, 0} }, 48533965Sjdp 48660484Sobrien{"hlt", 0, 0xf4, X, NoSuf, { 0, 0, 0} }, 48760484Sobrien/* nop is actually 'xchgl %eax, %eax'. */ 48860484Sobrien{"nop", 0, 0x90, X, NoSuf, { 0, 0, 0} }, 48933965Sjdp 49060484Sobrien/* Protection control. */ 49160484Sobrien{"arpl", 2, 0x63, X, w_Suf|Modrm|IgnoreSize,{ Reg16, Reg16|ShortMem, 0} }, 49260484Sobrien{"lar", 2, 0x0f02, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 49360484Sobrien{"lgdt", 1, 0x0f01, 2, wl_Suf|Modrm, { WordMem, 0, 0} }, 49460484Sobrien{"lidt", 1, 0x0f01, 3, wl_Suf|Modrm, { WordMem, 0, 0} }, 49560484Sobrien{"lldt", 1, 0x0f00, 2, w_Suf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, 49660484Sobrien{"lmsw", 1, 0x0f01, 6, w_Suf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, 49760484Sobrien{"lsl", 2, 0x0f03, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 49860484Sobrien{"ltr", 1, 0x0f00, 3, w_Suf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, 49933965Sjdp 50060484Sobrien{"sgdt", 1, 0x0f01, 0, wl_Suf|Modrm, { WordMem, 0, 0} }, 50160484Sobrien{"sidt", 1, 0x0f01, 1, wl_Suf|Modrm, { WordMem, 0, 0} }, 50260484Sobrien{"sldt", 1, 0x0f00, 0, wl_Suf|Modrm, { WordReg|WordMem, 0, 0} }, 50360484Sobrien{"smsw", 1, 0x0f01, 4, wl_Suf|Modrm, { WordReg|WordMem, 0, 0} }, 50460484Sobrien{"str", 1, 0x0f00, 1, w_Suf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, 50533965Sjdp 50660484Sobrien{"verr", 1, 0x0f00, 4, w_Suf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, 50760484Sobrien{"verw", 1, 0x0f00, 5, w_Suf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, 50833965Sjdp 50960484Sobrien/* Floating point instructions. */ 51033965Sjdp 51133965Sjdp/* load */ 51260484Sobrien{"fld", 1, 0xd9c0, X, FP|ShortForm, { FloatReg, 0, 0} }, /* register */ 51360484Sobrien{"fld", 1, 0xd9, 0, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, /* %st0 <-- mem float/double */ 51460484Sobrien{"fld", 1, 0xd9c0, X, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} }, 51560484Sobrien/* Intel Syntax */ 51660484Sobrien{"fld", 1, 0xdb, 5, x_FP|Modrm, { LLongMem, 0, 0} }, /* %st0 <-- mem efloat */ 51760484Sobrien{"fild", 1, 0xdf, 0, sl_Suf|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, /* %st0 <-- mem word(16)/dword(32) */ 51860484Sobrien/* Intel Syntax */ 51960484Sobrien{"fildd", 1, 0xdf, 5, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 <-- mem qword (64) */ 52060484Sobrien{"fildq", 1, 0xdf, 5, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 <-- mem qword (64) */ 52160484Sobrien{"fildll", 1, 0xdf, 5, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 <-- mem qword (64) */ 52260484Sobrien{"fldt", 1, 0xdb, 5, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 <-- mem efloat */ 52360484Sobrien{"fbld", 1, 0xdf, 4, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 <-- mem bcd */ 52433965Sjdp 52533965Sjdp/* store (no pop) */ 52660484Sobrien{"fst", 1, 0xddd0, X, FP|ShortForm, { FloatReg, 0, 0} }, /* register */ 52760484Sobrien{"fst", 1, 0xd9, 2, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, /* %st0 --> mem float/double */ 52860484Sobrien{"fst", 1, 0xddd0, X, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} }, 52960484Sobrien{"fist", 1, 0xdf, 2, sld_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, /* %st0 --> mem word(16)/dword(32) */ 53033965Sjdp 53133965Sjdp/* store (with pop) */ 53260484Sobrien{"fstp", 1, 0xddd8, X, FP|ShortForm, { FloatReg, 0, 0} }, /* register */ 53360484Sobrien{"fstp", 1, 0xd9, 3, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, /* %st0 --> mem float/double */ 53460484Sobrien{"fstp", 1, 0xddd8, X, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} }, 53560484Sobrien/* Intel Syntax */ 53660484Sobrien{"fstp", 1, 0xdb, 7, x_FP|Modrm, { LLongMem, 0, 0} }, /* %st0 --> mem efloat */ 53760484Sobrien{"fistp", 1, 0xdf, 3, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, /* %st0 --> mem word(16)/dword(32) */ 53860484Sobrien/* Intel Syntax */ 53960484Sobrien{"fistpd", 1, 0xdf, 7, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 --> mem qword (64) */ 54060484Sobrien{"fistpq", 1, 0xdf, 7, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 --> mem qword (64) */ 54160484Sobrien{"fistpll",1, 0xdf, 7, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 --> mem qword (64) */ 54260484Sobrien{"fstpt", 1, 0xdb, 7, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 --> mem efloat */ 54360484Sobrien{"fbstp", 1, 0xdf, 6, FP|Modrm, { LLongMem, 0, 0} }, /* %st0 --> mem bcd */ 54433965Sjdp 54533965Sjdp/* exchange %st<n> with %st0 */ 54660484Sobrien{"fxch", 1, 0xd9c8, X, FP|ShortForm, { FloatReg, 0, 0} }, 54760484Sobrien{"fxch", 0, 0xd9c9, X, FP, { 0, 0, 0} }, /* alias for fxch %st(1) */ 54833965Sjdp 54933965Sjdp/* comparison (without pop) */ 55060484Sobrien{"fcom", 1, 0xd8d0, X, FP|ShortForm, { FloatReg, 0, 0} }, 55160484Sobrien{"fcom", 0, 0xd8d1, X, FP, { 0, 0, 0} }, /* alias for fcom %st(1) */ 55260484Sobrien{"fcom", 1, 0xd8, 2, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, /* compare %st0, mem float/double */ 55360484Sobrien{"fcom", 1, 0xd8d0, X, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} }, 55460484Sobrien{"ficom", 1, 0xde, 2, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, /* compare %st0, mem word/dword */ 55533965Sjdp 55633965Sjdp/* comparison (with pop) */ 55760484Sobrien{"fcomp", 1, 0xd8d8, X, FP|ShortForm, { FloatReg, 0, 0} }, 55860484Sobrien{"fcomp", 0, 0xd8d9, X, FP, { 0, 0, 0} }, /* alias for fcomp %st(1) */ 55960484Sobrien{"fcomp", 1, 0xd8, 3, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, /* compare %st0, mem float/double */ 56060484Sobrien{"fcomp", 1, 0xd8d8, X, l_FP|ShortForm|Ugh, { FloatReg, 0, 0} }, 56160484Sobrien{"ficomp", 1, 0xde, 3, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, /* compare %st0, mem word/dword */ 56260484Sobrien{"fcompp", 0, 0xded9, X, FP, { 0, 0, 0} }, /* compare %st0, %st1 & pop 2 */ 56333965Sjdp 56433965Sjdp/* unordered comparison (with pop) */ 56560484Sobrien{"fucom", 1, 0xdde0, X, FP|ShortForm, { FloatReg, 0, 0} }, 56660484Sobrien{"fucom", 0, 0xdde1, X, FP, { 0, 0, 0} }, /* alias for fucom %st(1) */ 56760484Sobrien{"fucomp", 1, 0xdde8, X, FP|ShortForm, { FloatReg, 0, 0} }, 56860484Sobrien{"fucomp", 0, 0xdde9, X, FP, { 0, 0, 0} }, /* alias for fucomp %st(1) */ 56960484Sobrien{"fucompp",0, 0xdae9, X, FP, { 0, 0, 0} }, /* ucompare %st0, %st1 & pop twice */ 57033965Sjdp 57160484Sobrien{"ftst", 0, 0xd9e4, X, FP, { 0, 0, 0} }, /* test %st0 */ 57260484Sobrien{"fxam", 0, 0xd9e5, X, FP, { 0, 0, 0} }, /* examine %st0 */ 57333965Sjdp 57433965Sjdp/* load constants into %st0 */ 57560484Sobrien{"fld1", 0, 0xd9e8, X, FP, { 0, 0, 0} }, /* %st0 <-- 1.0 */ 57660484Sobrien{"fldl2t", 0, 0xd9e9, X, FP, { 0, 0, 0} }, /* %st0 <-- log2(10) */ 57760484Sobrien{"fldl2e", 0, 0xd9ea, X, FP, { 0, 0, 0} }, /* %st0 <-- log2(e) */ 57860484Sobrien{"fldpi", 0, 0xd9eb, X, FP, { 0, 0, 0} }, /* %st0 <-- pi */ 57960484Sobrien{"fldlg2", 0, 0xd9ec, X, FP, { 0, 0, 0} }, /* %st0 <-- log10(2) */ 58060484Sobrien{"fldln2", 0, 0xd9ed, X, FP, { 0, 0, 0} }, /* %st0 <-- ln(2) */ 58160484Sobrien{"fldz", 0, 0xd9ee, X, FP, { 0, 0, 0} }, /* %st0 <-- 0.0 */ 58233965Sjdp 58333965Sjdp/* arithmetic */ 58433965Sjdp 58533965Sjdp/* add */ 58660484Sobrien{"fadd", 2, 0xd8c0, X, FP|ShortForm|FloatD, { FloatReg, FloatAcc, 0} }, 58760484Sobrien{"fadd", 1, 0xd8c0, X, FP|ShortForm, { FloatReg, 0, 0} }, /* alias for fadd %st(i), %st */ 58860484Sobrien#if SYSV386_COMPAT 58960484Sobrien{"fadd", 0, 0xdec1, X, FP|Ugh, { 0, 0, 0} }, /* alias for faddp */ 59060484Sobrien#endif 59160484Sobrien{"fadd", 1, 0xd8, 0, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 59260484Sobrien{"fiadd", 1, 0xde, 0, sld_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 59333965Sjdp 59460484Sobrien{"faddp", 2, 0xdec0, X, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 59560484Sobrien{"faddp", 1, 0xdec0, X, FP|ShortForm, { FloatReg, 0, 0} }, 59660484Sobrien{"faddp", 0, 0xdec1, X, FP, { 0, 0, 0} }, /* alias for faddp %st, %st(1) */ 59760484Sobrien{"faddp", 2, 0xdec0, X, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} }, 59860484Sobrien 59960484Sobrien/* subtract */ 60060484Sobrien{"fsub", 2, 0xd8e0, X, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} }, 60160484Sobrien{"fsub", 1, 0xd8e0, X, FP|ShortForm, { FloatReg, 0, 0} }, 60260484Sobrien#if SYSV386_COMPAT 60360484Sobrien{"fsub", 0, 0xdee1, X, FP|Ugh, { 0, 0, 0} }, /* alias for fsubp */ 60433965Sjdp#endif 60560484Sobrien{"fsub", 1, 0xd8, 4, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 60660484Sobrien{"fisub", 1, 0xde, 4, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 60760484Sobrien 60860484Sobrien#if SYSV386_COMPAT 60960484Sobrien{"fsubp", 2, 0xdee0, X, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 61060484Sobrien{"fsubp", 1, 0xdee0, X, FP|ShortForm, { FloatReg, 0, 0} }, 61160484Sobrien{"fsubp", 0, 0xdee1, X, FP, { 0, 0, 0} }, 61260484Sobrien#if OLDGCC_COMPAT 61360484Sobrien{"fsubp", 2, 0xdee0, X, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} }, 61460484Sobrien#endif 61533965Sjdp#else 61660484Sobrien{"fsubp", 2, 0xdee8, X, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 61760484Sobrien{"fsubp", 1, 0xdee8, X, FP|ShortForm, { FloatReg, 0, 0} }, 61860484Sobrien{"fsubp", 0, 0xdee9, X, FP, { 0, 0, 0} }, 61933965Sjdp#endif 62033965Sjdp 62160484Sobrien/* subtract reverse */ 62260484Sobrien{"fsubr", 2, 0xd8e8, X, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} }, 62360484Sobrien{"fsubr", 1, 0xd8e8, X, FP|ShortForm, { FloatReg, 0, 0} }, 62460484Sobrien#if SYSV386_COMPAT 62560484Sobrien{"fsubr", 0, 0xdee9, X, FP|Ugh, { 0, 0, 0} }, /* alias for fsubrp */ 62633965Sjdp#endif 62760484Sobrien{"fsubr", 1, 0xd8, 5, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 62860484Sobrien{"fisubr", 1, 0xde, 5, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 62960484Sobrien 63060484Sobrien#if SYSV386_COMPAT 63160484Sobrien{"fsubrp", 2, 0xdee8, X, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 63260484Sobrien{"fsubrp", 1, 0xdee8, X, FP|ShortForm, { FloatReg, 0, 0} }, 63360484Sobrien{"fsubrp", 0, 0xdee9, X, FP, { 0, 0, 0} }, 63460484Sobrien#if OLDGCC_COMPAT 63560484Sobrien{"fsubrp", 2, 0xdee8, X, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} }, 63660484Sobrien#endif 63733965Sjdp#else 63860484Sobrien{"fsubrp", 2, 0xdee0, X, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 63960484Sobrien{"fsubrp", 1, 0xdee0, X, FP|ShortForm, { FloatReg, 0, 0} }, 64060484Sobrien{"fsubrp", 0, 0xdee1, X, FP, { 0, 0, 0} }, 64133965Sjdp#endif 64233965Sjdp 64360484Sobrien/* multiply */ 64460484Sobrien{"fmul", 2, 0xd8c8, X, FP|ShortForm|FloatD, { FloatReg, FloatAcc, 0} }, 64560484Sobrien{"fmul", 1, 0xd8c8, X, FP|ShortForm, { FloatReg, 0, 0} }, 64660484Sobrien#if SYSV386_COMPAT 64760484Sobrien{"fmul", 0, 0xdec9, X, FP|Ugh, { 0, 0, 0} }, /* alias for fmulp */ 64860484Sobrien#endif 64960484Sobrien{"fmul", 1, 0xd8, 1, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 65060484Sobrien{"fimul", 1, 0xde, 1, sld_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 65133965Sjdp 65260484Sobrien{"fmulp", 2, 0xdec8, X, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 65360484Sobrien{"fmulp", 1, 0xdec8, X, FP|ShortForm, { FloatReg, 0, 0} }, 65460484Sobrien{"fmulp", 0, 0xdec9, X, FP, { 0, 0, 0} }, 65560484Sobrien{"fmulp", 2, 0xdec8, X, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} }, 65660484Sobrien 65760484Sobrien/* divide */ 65860484Sobrien{"fdiv", 2, 0xd8f0, X, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} }, 65960484Sobrien{"fdiv", 1, 0xd8f0, X, FP|ShortForm, { FloatReg, 0, 0} }, 66060484Sobrien#if SYSV386_COMPAT 66160484Sobrien{"fdiv", 0, 0xdef1, X, FP|Ugh, { 0, 0, 0} }, /* alias for fdivp */ 66233965Sjdp#endif 66360484Sobrien{"fdiv", 1, 0xd8, 6, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 66460484Sobrien{"fidiv", 1, 0xde, 6, sld_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 66560484Sobrien 66660484Sobrien#if SYSV386_COMPAT 66760484Sobrien{"fdivp", 2, 0xdef0, X, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 66860484Sobrien{"fdivp", 1, 0xdef0, X, FP|ShortForm, { FloatReg, 0, 0} }, 66960484Sobrien{"fdivp", 0, 0xdef1, X, FP, { 0, 0, 0} }, 67060484Sobrien#if OLDGCC_COMPAT 67160484Sobrien{"fdivp", 2, 0xdef0, X, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} }, 67260484Sobrien#endif 67333965Sjdp#else 67460484Sobrien{"fdivp", 2, 0xdef8, X, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 67560484Sobrien{"fdivp", 1, 0xdef8, X, FP|ShortForm, { FloatReg, 0, 0} }, 67660484Sobrien{"fdivp", 0, 0xdef9, X, FP, { 0, 0, 0} }, 67733965Sjdp#endif 67833965Sjdp 67960484Sobrien/* divide reverse */ 68060484Sobrien{"fdivr", 2, 0xd8f8, X, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} }, 68160484Sobrien{"fdivr", 1, 0xd8f8, X, FP|ShortForm, { FloatReg, 0, 0} }, 68260484Sobrien#if SYSV386_COMPAT 68360484Sobrien{"fdivr", 0, 0xdef9, X, FP|Ugh, { 0, 0, 0} }, /* alias for fdivrp */ 68433965Sjdp#endif 68560484Sobrien{"fdivr", 1, 0xd8, 7, sld_FP|FloatMF|Modrm, { LongMem|LLongMem, 0, 0} }, 68660484Sobrien{"fidivr", 1, 0xde, 7, sl_FP|FloatMF|Modrm, { ShortMem|LongMem, 0, 0} }, 68760484Sobrien 68860484Sobrien#if SYSV386_COMPAT 68960484Sobrien{"fdivrp", 2, 0xdef8, X, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 69060484Sobrien{"fdivrp", 1, 0xdef8, X, FP|ShortForm, { FloatReg, 0, 0} }, 69160484Sobrien{"fdivrp", 0, 0xdef9, X, FP, { 0, 0, 0} }, 69260484Sobrien#if OLDGCC_COMPAT 69360484Sobrien{"fdivrp", 2, 0xdef8, X, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} }, 69460484Sobrien#endif 69533965Sjdp#else 69660484Sobrien{"fdivrp", 2, 0xdef0, X, FP|ShortForm, { FloatAcc, FloatReg, 0} }, 69760484Sobrien{"fdivrp", 1, 0xdef0, X, FP|ShortForm, { FloatReg, 0, 0} }, 69860484Sobrien{"fdivrp", 0, 0xdef1, X, FP, { 0, 0, 0} }, 69933965Sjdp#endif 70033965Sjdp 70160484Sobrien{"f2xm1", 0, 0xd9f0, X, FP, { 0, 0, 0} }, 70260484Sobrien{"fyl2x", 0, 0xd9f1, X, FP, { 0, 0, 0} }, 70360484Sobrien{"fptan", 0, 0xd9f2, X, FP, { 0, 0, 0} }, 70460484Sobrien{"fpatan", 0, 0xd9f3, X, FP, { 0, 0, 0} }, 70560484Sobrien{"fxtract",0, 0xd9f4, X, FP, { 0, 0, 0} }, 70660484Sobrien{"fprem1", 0, 0xd9f5, X, FP, { 0, 0, 0} }, 70760484Sobrien{"fdecstp",0, 0xd9f6, X, FP, { 0, 0, 0} }, 70860484Sobrien{"fincstp",0, 0xd9f7, X, FP, { 0, 0, 0} }, 70960484Sobrien{"fprem", 0, 0xd9f8, X, FP, { 0, 0, 0} }, 71060484Sobrien{"fyl2xp1",0, 0xd9f9, X, FP, { 0, 0, 0} }, 71160484Sobrien{"fsqrt", 0, 0xd9fa, X, FP, { 0, 0, 0} }, 71260484Sobrien{"fsincos",0, 0xd9fb, X, FP, { 0, 0, 0} }, 71360484Sobrien{"frndint",0, 0xd9fc, X, FP, { 0, 0, 0} }, 71460484Sobrien{"fscale", 0, 0xd9fd, X, FP, { 0, 0, 0} }, 71560484Sobrien{"fsin", 0, 0xd9fe, X, FP, { 0, 0, 0} }, 71660484Sobrien{"fcos", 0, 0xd9ff, X, FP, { 0, 0, 0} }, 71760484Sobrien{"fchs", 0, 0xd9e0, X, FP, { 0, 0, 0} }, 71860484Sobrien{"fabs", 0, 0xd9e1, X, FP, { 0, 0, 0} }, 71933965Sjdp 72033965Sjdp/* processor control */ 72160484Sobrien{"fninit", 0, 0xdbe3, X, FP, { 0, 0, 0} }, 72260484Sobrien{"finit", 0, 0xdbe3, X, FP|FWait, { 0, 0, 0} }, 72360484Sobrien{"fldcw", 1, 0xd9, 5, FP|Modrm, { ShortMem, 0, 0} }, 72460484Sobrien{"fnstcw", 1, 0xd9, 7, FP|Modrm, { ShortMem, 0, 0} }, 72560484Sobrien{"fstcw", 1, 0xd9, 7, FP|FWait|Modrm, { ShortMem, 0, 0} }, 72660484Sobrien{"fnstsw", 1, 0xdfe0, X, FP, { Acc, 0, 0} }, 72760484Sobrien{"fnstsw", 1, 0xdd, 7, FP|Modrm, { ShortMem, 0, 0} }, 72860484Sobrien{"fnstsw", 0, 0xdfe0, X, FP, { 0, 0, 0} }, 72960484Sobrien{"fstsw", 1, 0xdfe0, X, FP|FWait, { Acc, 0, 0} }, 73060484Sobrien{"fstsw", 1, 0xdd, 7, FP|FWait|Modrm, { ShortMem, 0, 0} }, 73160484Sobrien{"fstsw", 0, 0xdfe0, X, FP|FWait, { 0, 0, 0} }, 73260484Sobrien{"fnclex", 0, 0xdbe2, X, FP, { 0, 0, 0} }, 73360484Sobrien{"fclex", 0, 0xdbe2, X, FP|FWait, { 0, 0, 0} }, 73460484Sobrien/* Short forms of fldenv, fstenv use data size prefix. */ 73560484Sobrien{"fnstenv",1, 0xd9, 6, sl_Suf|Modrm, { LLongMem, 0, 0} }, 73660484Sobrien{"fstenv", 1, 0xd9, 6, sl_Suf|FWait|Modrm, { LLongMem, 0, 0} }, 73760484Sobrien{"fldenv", 1, 0xd9, 4, sl_Suf|Modrm, { LLongMem, 0, 0} }, 73860484Sobrien{"fnsave", 1, 0xdd, 6, sl_Suf|Modrm, { LLongMem, 0, 0} }, 73960484Sobrien{"fsave", 1, 0xdd, 6, sl_Suf|FWait|Modrm, { LLongMem, 0, 0} }, 74060484Sobrien{"frstor", 1, 0xdd, 4, sl_Suf|Modrm, { LLongMem, 0, 0} }, 74133965Sjdp 74260484Sobrien{"ffree", 1, 0xddc0, X, FP|ShortForm, { FloatReg, 0, 0} }, 74333965Sjdp/* P6:free st(i), pop st */ 74460484Sobrien{"ffreep", 1, 0xdfc0, X, FP|ShortForm, { FloatReg, 0, 0} }, 74560484Sobrien{"fnop", 0, 0xd9d0, X, FP, { 0, 0, 0} }, 74638889Sjdp#define FWAIT_OPCODE 0x9b 74760484Sobrien{"fwait", 0, 0x9b, X, FP, { 0, 0, 0} }, 74833965Sjdp 74960484Sobrien/* Opcode prefixes; we allow them as separate insns too. */ 75033965Sjdp 75160484Sobrien#define ADDR_PREFIX_OPCODE 0x67 75260484Sobrien{"addr16", 0, 0x67, X, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} }, 75360484Sobrien{"addr32", 0, 0x67, X, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} }, 75460484Sobrien{"aword", 0, 0x67, X, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} }, 75560484Sobrien{"adword", 0, 0x67, X, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} }, 75660484Sobrien#define DATA_PREFIX_OPCODE 0x66 75760484Sobrien{"data16", 0, 0x66, X, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} }, 75860484Sobrien{"data32", 0, 0x66, X, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} }, 75960484Sobrien{"word", 0, 0x66, X, NoSuf|IsPrefix|Size16|IgnoreSize, { 0, 0, 0} }, 76060484Sobrien{"dword", 0, 0x66, X, NoSuf|IsPrefix|Size32|IgnoreSize, { 0, 0, 0} }, 76160484Sobrien#define LOCK_PREFIX_OPCODE 0xf0 76260484Sobrien{"lock", 0, 0xf0, X, NoSuf|IsPrefix, { 0, 0, 0} }, 76360484Sobrien{"wait", 0, 0x9b, X, NoSuf|IsPrefix, { 0, 0, 0} }, 76460484Sobrien#define CS_PREFIX_OPCODE 0x2e 76560484Sobrien{"cs", 0, 0x2e, X, NoSuf|IsPrefix, { 0, 0, 0} }, 76660484Sobrien#define DS_PREFIX_OPCODE 0x3e 76760484Sobrien{"ds", 0, 0x3e, X, NoSuf|IsPrefix, { 0, 0, 0} }, 76860484Sobrien#define ES_PREFIX_OPCODE 0x26 76960484Sobrien{"es", 0, 0x26, X, NoSuf|IsPrefix, { 0, 0, 0} }, 77060484Sobrien#define FS_PREFIX_OPCODE 0x64 77160484Sobrien{"fs", 0, 0x64, X, NoSuf|IsPrefix, { 0, 0, 0} }, 77260484Sobrien#define GS_PREFIX_OPCODE 0x65 77360484Sobrien{"gs", 0, 0x65, X, NoSuf|IsPrefix, { 0, 0, 0} }, 77460484Sobrien#define SS_PREFIX_OPCODE 0x36 77560484Sobrien{"ss", 0, 0x36, X, NoSuf|IsPrefix, { 0, 0, 0} }, 77660484Sobrien#define REPNE_PREFIX_OPCODE 0xf2 77760484Sobrien#define REPE_PREFIX_OPCODE 0xf3 77860484Sobrien{"rep", 0, 0xf3, X, NoSuf|IsPrefix, { 0, 0, 0} }, 77960484Sobrien{"repe", 0, 0xf3, X, NoSuf|IsPrefix, { 0, 0, 0} }, 78060484Sobrien{"repz", 0, 0xf3, X, NoSuf|IsPrefix, { 0, 0, 0} }, 78160484Sobrien{"repne", 0, 0xf2, X, NoSuf|IsPrefix, { 0, 0, 0} }, 78260484Sobrien{"repnz", 0, 0xf2, X, NoSuf|IsPrefix, { 0, 0, 0} }, 78333965Sjdp 78460484Sobrien/* 486 extensions. */ 78533965Sjdp 78660484Sobrien{"bswap", 1, 0x0fc8, X, l_Suf|ShortForm, { Reg32, 0, 0 } }, 78760484Sobrien{"xadd", 2, 0x0fc0, X, bwl_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } }, 78860484Sobrien{"cmpxchg", 2, 0x0fb0, X, bwl_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } }, 78960484Sobrien{"invd", 0, 0x0f08, X, NoSuf, { 0, 0, 0} }, 79060484Sobrien{"wbinvd", 0, 0x0f09, X, NoSuf, { 0, 0, 0} }, 79160484Sobrien{"invlpg", 1, 0x0f01, 7, NoSuf|Modrm, { AnyMem, 0, 0} }, 79233965Sjdp 79360484Sobrien/* 586 and late 486 extensions. */ 79460484Sobrien{"cpuid", 0, 0x0fa2, X, NoSuf, { 0, 0, 0} }, 79533965Sjdp 79660484Sobrien/* Pentium extensions. */ 79760484Sobrien{"wrmsr", 0, 0x0f30, X, NoSuf, { 0, 0, 0} }, 79860484Sobrien{"rdtsc", 0, 0x0f31, X, NoSuf, { 0, 0, 0} }, 79960484Sobrien{"rdmsr", 0, 0x0f32, X, NoSuf, { 0, 0, 0} }, 80060484Sobrien{"cmpxchg8b",1,0x0fc7, 1, NoSuf|Modrm, { LLongMem, 0, 0} }, 80160484Sobrien{"sysenter",0, 0x0f34, X, NoSuf, { 0, 0, 0} }, 80260484Sobrien{"sysexit", 0, 0x0f35, X, NoSuf, { 0, 0, 0} }, 80360484Sobrien{"fxsave", 1, 0x0fae, 0, FP|Modrm, { LLongMem, 0, 0} }, 80460484Sobrien{"fxrstor", 1, 0x0fae, 1, FP|Modrm, { LLongMem, 0, 0} }, 80533965Sjdp 80660484Sobrien/* Pentium Pro extensions. */ 80760484Sobrien{"rdpmc", 0, 0x0f33, X, NoSuf, { 0, 0, 0} }, 80833965Sjdp 80960484Sobrien{"ud2", 0, 0x0f0b, X, NoSuf, { 0, 0, 0} }, /* official undefined instr. */ 81060484Sobrien{"ud2a", 0, 0x0f0b, X, NoSuf, { 0, 0, 0} }, /* alias for ud2 */ 81160484Sobrien{"ud2b", 0, 0x0fb9, X, NoSuf, { 0, 0, 0} }, /* 2nd. official undefined instr. */ 81233965Sjdp 81360484Sobrien{"cmovo", 2, 0x0f40, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 81460484Sobrien{"cmovno", 2, 0x0f41, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 81560484Sobrien{"cmovb", 2, 0x0f42, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 81660484Sobrien{"cmovc", 2, 0x0f42, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 81760484Sobrien{"cmovnae", 2, 0x0f42, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 81860484Sobrien{"cmovae", 2, 0x0f43, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 81960484Sobrien{"cmovnc", 2, 0x0f43, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 82060484Sobrien{"cmovnb", 2, 0x0f43, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 82160484Sobrien{"cmove", 2, 0x0f44, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 82260484Sobrien{"cmovz", 2, 0x0f44, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 82360484Sobrien{"cmovne", 2, 0x0f45, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 82460484Sobrien{"cmovnz", 2, 0x0f45, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 82560484Sobrien{"cmovbe", 2, 0x0f46, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 82660484Sobrien{"cmovna", 2, 0x0f46, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 82760484Sobrien{"cmova", 2, 0x0f47, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 82860484Sobrien{"cmovnbe", 2, 0x0f47, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 82960484Sobrien{"cmovs", 2, 0x0f48, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 83060484Sobrien{"cmovns", 2, 0x0f49, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 83160484Sobrien{"cmovp", 2, 0x0f4a, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 83260484Sobrien{"cmovnp", 2, 0x0f4b, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 83360484Sobrien{"cmovl", 2, 0x0f4c, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 83460484Sobrien{"cmovnge", 2, 0x0f4c, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 83560484Sobrien{"cmovge", 2, 0x0f4d, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 83660484Sobrien{"cmovnl", 2, 0x0f4d, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 83760484Sobrien{"cmovle", 2, 0x0f4e, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 83860484Sobrien{"cmovng", 2, 0x0f4e, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 83960484Sobrien{"cmovg", 2, 0x0f4f, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 84060484Sobrien{"cmovnle", 2, 0x0f4f, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, 84133965Sjdp 84260484Sobrien{"fcmovb", 2, 0xdac0, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 84360484Sobrien{"fcmovnae",2, 0xdac0, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 84460484Sobrien{"fcmove", 2, 0xdac8, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 84560484Sobrien{"fcmovbe", 2, 0xdad0, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 84660484Sobrien{"fcmovna", 2, 0xdad0, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 84760484Sobrien{"fcmovu", 2, 0xdad8, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 84860484Sobrien{"fcmovae", 2, 0xdbc0, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 84960484Sobrien{"fcmovnb", 2, 0xdbc0, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 85060484Sobrien{"fcmovne", 2, 0xdbc8, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 85160484Sobrien{"fcmova", 2, 0xdbd0, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 85260484Sobrien{"fcmovnbe",2, 0xdbd0, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 85360484Sobrien{"fcmovnu", 2, 0xdbd8, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 85433965Sjdp 85560484Sobrien{"fcomi", 2, 0xdbf0, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 85660484Sobrien{"fcomi", 0, 0xdbf1, X, FP|ShortForm, { 0, 0, 0} }, 85760484Sobrien{"fcomi", 1, 0xdbf0, X, FP|ShortForm, { FloatReg, 0, 0} }, 85860484Sobrien{"fucomi", 2, 0xdbe8, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 85960484Sobrien{"fucomi", 0, 0xdbe9, X, FP|ShortForm, { 0, 0, 0} }, 86060484Sobrien{"fucomi", 1, 0xdbe8, X, FP|ShortForm, { FloatReg, 0, 0} }, 86160484Sobrien{"fcomip", 2, 0xdff0, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 86260484Sobrien{"fcompi", 2, 0xdff0, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 86360484Sobrien{"fcompi", 0, 0xdff1, X, FP|ShortForm, { 0, 0, 0} }, 86460484Sobrien{"fcompi", 1, 0xdff0, X, FP|ShortForm, { FloatReg, 0, 0} }, 86560484Sobrien{"fucomip", 2, 0xdfe8, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 86660484Sobrien{"fucompi", 2, 0xdfe8, X, FP|ShortForm, { FloatReg, FloatAcc, 0} }, 86760484Sobrien{"fucompi", 0, 0xdfe9, X, FP|ShortForm, { 0, 0, 0} }, 86860484Sobrien{"fucompi", 1, 0xdfe8, X, FP|ShortForm, { FloatReg, 0, 0} }, 86960484Sobrien 87033965Sjdp/* MMX instructions. */ 87133965Sjdp 87260484Sobrien{"emms", 0, 0x0f77, X, FP, { 0, 0, 0 } }, 87360484Sobrien{"movd", 2, 0x0f6e, X, FP|Modrm, { Reg32|LongMem, RegMMX, 0 } }, 87460484Sobrien{"movd", 2, 0x0f7e, X, FP|Modrm, { RegMMX, Reg32|LongMem, 0 } }, 87560484Sobrien{"movq", 2, 0x0f6f, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 87660484Sobrien{"movq", 2, 0x0f7f, X, FP|Modrm, { RegMMX, RegMMX|LongMem, 0 } }, 87760484Sobrien{"packssdw", 2, 0x0f6b, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 87860484Sobrien{"packsswb", 2, 0x0f63, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 87960484Sobrien{"packuswb", 2, 0x0f67, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 88060484Sobrien{"paddb", 2, 0x0ffc, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 88160484Sobrien{"paddw", 2, 0x0ffd, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 88260484Sobrien{"paddd", 2, 0x0ffe, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 88360484Sobrien{"paddsb", 2, 0x0fec, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 88460484Sobrien{"paddsw", 2, 0x0fed, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 88560484Sobrien{"paddusb", 2, 0x0fdc, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 88660484Sobrien{"paddusw", 2, 0x0fdd, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 88760484Sobrien{"pand", 2, 0x0fdb, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 88860484Sobrien{"pandn", 2, 0x0fdf, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 88960484Sobrien{"pcmpeqb", 2, 0x0f74, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 89060484Sobrien{"pcmpeqw", 2, 0x0f75, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 89160484Sobrien{"pcmpeqd", 2, 0x0f76, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 89260484Sobrien{"pcmpgtb", 2, 0x0f64, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 89360484Sobrien{"pcmpgtw", 2, 0x0f65, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 89460484Sobrien{"pcmpgtd", 2, 0x0f66, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 89560484Sobrien{"pmaddwd", 2, 0x0ff5, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 89660484Sobrien{"pmulhw", 2, 0x0fe5, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 89760484Sobrien{"pmullw", 2, 0x0fd5, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 89860484Sobrien{"por", 2, 0x0feb, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 89960484Sobrien{"psllw", 2, 0x0ff1, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 90060484Sobrien{"psllw", 2, 0x0f71, 6, FP|Modrm, { Imm8, RegMMX, 0 } }, 90160484Sobrien{"pslld", 2, 0x0ff2, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 90260484Sobrien{"pslld", 2, 0x0f72, 6, FP|Modrm, { Imm8, RegMMX, 0 } }, 90360484Sobrien{"psllq", 2, 0x0ff3, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 90460484Sobrien{"psllq", 2, 0x0f73, 6, FP|Modrm, { Imm8, RegMMX, 0 } }, 90560484Sobrien{"psraw", 2, 0x0fe1, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 90660484Sobrien{"psraw", 2, 0x0f71, 4, FP|Modrm, { Imm8, RegMMX, 0 } }, 90760484Sobrien{"psrad", 2, 0x0fe2, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 90860484Sobrien{"psrad", 2, 0x0f72, 4, FP|Modrm, { Imm8, RegMMX, 0 } }, 90960484Sobrien{"psrlw", 2, 0x0fd1, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 91060484Sobrien{"psrlw", 2, 0x0f71, 2, FP|Modrm, { Imm8, RegMMX, 0 } }, 91160484Sobrien{"psrld", 2, 0x0fd2, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 91260484Sobrien{"psrld", 2, 0x0f72, 2, FP|Modrm, { Imm8, RegMMX, 0 } }, 91360484Sobrien{"psrlq", 2, 0x0fd3, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 91460484Sobrien{"psrlq", 2, 0x0f73, 2, FP|Modrm, { Imm8, RegMMX, 0 } }, 91560484Sobrien{"psubb", 2, 0x0ff8, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 91660484Sobrien{"psubw", 2, 0x0ff9, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 91760484Sobrien{"psubd", 2, 0x0ffa, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 91860484Sobrien{"psubsb", 2, 0x0fe8, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 91960484Sobrien{"psubsw", 2, 0x0fe9, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 92060484Sobrien{"psubusb", 2, 0x0fd8, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 92160484Sobrien{"psubusw", 2, 0x0fd9, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 92260484Sobrien{"punpckhbw",2, 0x0f68, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 92360484Sobrien{"punpckhwd",2, 0x0f69, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 92460484Sobrien{"punpckhdq",2, 0x0f6a, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 92560484Sobrien{"punpcklbw",2, 0x0f60, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 92660484Sobrien{"punpcklwd",2, 0x0f61, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 92760484Sobrien{"punpckldq",2, 0x0f62, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 92860484Sobrien{"pxor", 2, 0x0fef, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, 92933965Sjdp 93060484Sobrien 93160484Sobrien/* PIII Katmai New Instructions / SIMD instructions. */ 93260484Sobrien 93360484Sobrien{"addps", 2, 0x0f58, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 93460484Sobrien{"addss", 2, 0xf30f58, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 93560484Sobrien{"andnps", 2, 0x0f55, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 93660484Sobrien{"andps", 2, 0x0f54, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 93760484Sobrien{"cmpeqps", 2, 0x0fc2, 0, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 93860484Sobrien{"cmpeqss", 2, 0xf30fc2, 0, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 93960484Sobrien{"cmpleps", 2, 0x0fc2, 2, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 94060484Sobrien{"cmpless", 2, 0xf30fc2, 2, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 94160484Sobrien{"cmpltps", 2, 0x0fc2, 1, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 94260484Sobrien{"cmpltss", 2, 0xf30fc2, 1, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 94360484Sobrien{"cmpneqps", 2, 0x0fc2, 4, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 94460484Sobrien{"cmpneqss", 2, 0xf30fc2, 4, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 94560484Sobrien{"cmpnleps", 2, 0x0fc2, 6, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 94660484Sobrien{"cmpnless", 2, 0xf30fc2, 6, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 94760484Sobrien{"cmpnltps", 2, 0x0fc2, 5, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 94860484Sobrien{"cmpnltss", 2, 0xf30fc2, 5, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 94960484Sobrien{"cmpordps", 2, 0x0fc2, 7, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 95060484Sobrien{"cmpordss", 2, 0xf30fc2, 7, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 95160484Sobrien{"cmpunordps",2, 0x0fc2, 3, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, 95260484Sobrien{"cmpunordss",2, 0xf30fc2, 3, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, 95360484Sobrien{"cmpps", 3, 0x0fc2, X, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, 95460484Sobrien{"cmpss", 3, 0xf30fc2, X, FP|Modrm, { Imm8, RegXMM|WordMem, RegXMM } }, 95560484Sobrien{"comiss", 2, 0x0f2f, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 95660484Sobrien{"cvtpi2ps", 2, 0x0f2a, X, FP|Modrm, { RegMMX|LLongMem, RegXMM, 0 } }, 95760484Sobrien{"cvtps2pi", 2, 0x0f2d, X, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } }, 95860484Sobrien{"cvtsi2ss", 2, 0xf30f2a, X, FP|Modrm, { Reg32|WordMem, RegXMM, 0 } }, 95960484Sobrien{"cvtss2si", 2, 0xf30f2d, X, FP|Modrm, { RegXMM|WordMem, Reg32, 0 } }, 96060484Sobrien{"cvttps2pi", 2, 0x0f2c, X, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } }, 96160484Sobrien{"cvttss2si", 2, 0xf30f2c, X, FP|Modrm, { RegXMM|WordMem, Reg32, 0 } }, 96260484Sobrien{"divps", 2, 0x0f5e, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 96360484Sobrien{"divss", 2, 0xf30f5e, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 96460484Sobrien{"ldmxcsr", 1, 0x0fae, 2, FP|Modrm, { WordMem, 0, 0 } }, 96560484Sobrien{"maskmovq", 2, 0x0ff7, X, FP|Modrm, { RegMMX|InvMem, RegMMX, 0 } }, 96660484Sobrien{"maxps", 2, 0x0f5f, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 96760484Sobrien{"maxss", 2, 0xf30f5f, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 96860484Sobrien{"minps", 2, 0x0f5d, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 96960484Sobrien{"minss", 2, 0xf30f5d, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 97060484Sobrien{"movaps", 2, 0x0f28, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 97160484Sobrien{"movaps", 2, 0x0f29, X, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, 97260484Sobrien{"movhlps", 2, 0x0f12, X, FP|Modrm, { RegXMM|InvMem, RegXMM, 0 } }, 97360484Sobrien{"movhps", 2, 0x0f16, X, FP|Modrm, { LLongMem, RegXMM, 0 } }, 97460484Sobrien{"movhps", 2, 0x0f17, X, FP|Modrm, { RegXMM, LLongMem, 0 } }, 97560484Sobrien{"movlhps", 2, 0x0f16, X, FP|Modrm, { RegXMM|InvMem, RegXMM, 0 } }, 97660484Sobrien{"movlps", 2, 0x0f12, X, FP|Modrm, { LLongMem, RegXMM, 0 } }, 97760484Sobrien{"movlps", 2, 0x0f13, X, FP|Modrm, { RegXMM, LLongMem, 0 } }, 97860484Sobrien{"movmskps", 2, 0x0f50, X, FP|Modrm, { RegXMM|InvMem, Reg32, 0 } }, 97960484Sobrien{"movntps", 2, 0x0f2b, X, FP|Modrm, { RegXMM, LLongMem, 0 } }, 98060484Sobrien{"movntq", 2, 0x0fe7, X, FP|Modrm, { RegMMX, LLongMem, 0 } }, 98160484Sobrien{"movss", 2, 0xf30f10, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 98260484Sobrien{"movss", 2, 0xf30f11, X, FP|Modrm, { RegXMM, RegXMM|WordMem, 0 } }, 98360484Sobrien{"movups", 2, 0x0f10, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 98460484Sobrien{"movups", 2, 0x0f11, X, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, 98560484Sobrien{"mulps", 2, 0x0f59, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 98660484Sobrien{"mulss", 2, 0xf30f59, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 98760484Sobrien{"orps", 2, 0x0f56, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 98860484Sobrien{"pavgb", 2, 0x0fe0, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 98960484Sobrien{"pavgw", 2, 0x0fe3, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 99060484Sobrien{"pextrw", 3, 0x0fc5, X, FP|Modrm, { Imm8, RegMMX, Reg32|InvMem } }, 99160484Sobrien{"pinsrw", 3, 0x0fc4, X, FP|Modrm, { Imm8, Reg32|ShortMem, RegMMX } }, 99260484Sobrien{"pmaxsw", 2, 0x0fee, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 99360484Sobrien{"pmaxub", 2, 0x0fde, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 99460484Sobrien{"pminsw", 2, 0x0fea, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 99560484Sobrien{"pminub", 2, 0x0fda, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 99660484Sobrien{"pmovmskb", 2, 0x0fd7, X, FP|Modrm, { RegMMX, Reg32|InvMem, 0 } }, 99760484Sobrien{"pmulhuw", 2, 0x0fe4, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 99860484Sobrien{"prefetchnta", 1, 0x0f18, 0, FP|Modrm, { LLongMem, 0, 0 } }, 99960484Sobrien{"prefetcht0", 1, 0x0f18, 1, FP|Modrm, { LLongMem, 0, 0 } }, 100060484Sobrien{"prefetcht1", 1, 0x0f18, 2, FP|Modrm, { LLongMem, 0, 0 } }, 100160484Sobrien{"prefetcht2", 1, 0x0f18, 3, FP|Modrm, { LLongMem, 0, 0 } }, 100260484Sobrien{"psadbw", 2, 0x0ff6, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, 100360484Sobrien{"pshufw", 3, 0x0f70, X, FP|Modrm, { Imm8, RegMMX|LLongMem, RegMMX } }, 100460484Sobrien{"rcpps", 2, 0x0f53, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 100560484Sobrien{"rcpss", 2, 0xf30f53, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 100660484Sobrien{"rsqrtps", 2, 0x0f52, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 100760484Sobrien{"rsqrtss", 2, 0xf30f52, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 100860484Sobrien{"sfence", 0, 0x0faef8, X, FP, { 0, 0, 0 } }, 100960484Sobrien{"shufps", 3, 0x0fc6, X, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, 101060484Sobrien{"sqrtps", 2, 0x0f51, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 101160484Sobrien{"sqrtss", 2, 0xf30f51, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 101260484Sobrien{"stmxcsr", 1, 0x0fae, 3, FP|Modrm, { WordMem, 0, 0 } }, 101360484Sobrien{"subps", 2, 0x0f5c, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 101460484Sobrien{"subss", 2, 0xf30f5c, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 101560484Sobrien{"ucomiss", 2, 0x0f2e, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, 101660484Sobrien{"unpckhps", 2, 0x0f15, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 101760484Sobrien{"unpcklps", 2, 0x0f14, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 101860484Sobrien{"xorps", 2, 0x0f57, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, 101960484Sobrien 102060484Sobrien/* AMD 3DNow! instructions. */ 102160484Sobrien 102260484Sobrien{"prefetch", 1, 0x0f0d, 0, FP|Modrm, { ByteMem, 0, 0 } }, 102360484Sobrien{"prefetchw",1, 0x0f0d, 1, FP|Modrm, { ByteMem, 0, 0 } }, 102460484Sobrien{"femms", 0, 0x0f0e, X, FP, { 0, 0, 0 } }, 102560484Sobrien{"pavgusb", 2, 0x0f0f, 0xbf, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 102660484Sobrien{"pf2id", 2, 0x0f0f, 0x1d, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 102760484Sobrien{"pf2iw", 2, 0x0f0f, 0x1c, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Athlon */ 102860484Sobrien{"pfacc", 2, 0x0f0f, 0xae, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 102960484Sobrien{"pfadd", 2, 0x0f0f, 0x9e, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 103060484Sobrien{"pfcmpeq", 2, 0x0f0f, 0xb0, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 103160484Sobrien{"pfcmpge", 2, 0x0f0f, 0x90, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 103260484Sobrien{"pfcmpgt", 2, 0x0f0f, 0xa0, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 103360484Sobrien{"pfmax", 2, 0x0f0f, 0xa4, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 103460484Sobrien{"pfmin", 2, 0x0f0f, 0x94, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 103560484Sobrien{"pfmul", 2, 0x0f0f, 0xb4, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 103660484Sobrien{"pfnacc", 2, 0x0f0f, 0x8a, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Athlon */ 103760484Sobrien{"pfpnacc", 2, 0x0f0f, 0x8e, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Athlon */ 103860484Sobrien{"pfrcp", 2, 0x0f0f, 0x96, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 103960484Sobrien{"pfrcpit1", 2, 0x0f0f, 0xa6, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 104060484Sobrien{"pfrcpit2", 2, 0x0f0f, 0xb6, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 104160484Sobrien{"pfrsqit1", 2, 0x0f0f, 0xa7, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 104260484Sobrien{"pfrsqrt", 2, 0x0f0f, 0x97, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 104360484Sobrien{"pfsub", 2, 0x0f0f, 0x9a, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 104460484Sobrien{"pfsubr", 2, 0x0f0f, 0xaa, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 104560484Sobrien{"pi2fd", 2, 0x0f0f, 0x0d, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 104660484Sobrien{"pi2fw", 2, 0x0f0f, 0x0c, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Athlon */ 104760484Sobrien{"pmulhrw", 2, 0x0f0f, 0xb7, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, 104860484Sobrien{"pswapd", 2, 0x0f0f, 0xbb, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Athlon */ 104960484Sobrien 105060484Sobrien{NULL, 0, 0, 0, 0, { 0, 0, 0} } /* sentinel */ 105133965Sjdp}; 105260484Sobrien#undef X 105360484Sobrien#undef NoSuf 105460484Sobrien#undef b_Suf 105560484Sobrien#undef w_Suf 105660484Sobrien#undef l_Suf 105760484Sobrien#undef d_Suf 105860484Sobrien#undef x_Suf 105960484Sobrien#undef bw_Suf 106060484Sobrien#undef bl_Suf 106160484Sobrien#undef wl_Suf 106260484Sobrien#undef sl_Suf 106360484Sobrien#undef sld_Suf 106460484Sobrien#undef sldx_Suf 106560484Sobrien#undef bwl_Suf 106660484Sobrien#undef bwld_Suf 106760484Sobrien#undef FP 106860484Sobrien#undef l_FP 106960484Sobrien#undef d_FP 107060484Sobrien#undef x_FP 107160484Sobrien#undef sl_FP 107260484Sobrien#undef sld_FP 107360484Sobrien#undef sldx_FP 107433965Sjdp 107560484Sobrien#define MAX_MNEM_SIZE 16 /* for parsing insn mnemonics from input */ 107633965Sjdp 107733965Sjdp 107860484Sobrien/* 386 register table. */ 107960484Sobrien 108033965Sjdpstatic const reg_entry i386_regtab[] = { 108160484Sobrien /* make %st first as we test for it */ 108260484Sobrien {"st", FloatReg|FloatAcc, 0}, 108333965Sjdp /* 8 bit regs */ 108460484Sobrien {"al", Reg8|Acc, 0}, 108560484Sobrien {"cl", Reg8|ShiftCount, 1}, 108660484Sobrien {"dl", Reg8, 2}, 108733965Sjdp {"bl", Reg8, 3}, 108860484Sobrien {"ah", Reg8, 4}, 108960484Sobrien {"ch", Reg8, 5}, 109060484Sobrien {"dh", Reg8, 6}, 109160484Sobrien {"bh", Reg8, 7}, 109233965Sjdp /* 16 bit regs */ 109360484Sobrien {"ax", Reg16|Acc, 0}, 109460484Sobrien {"cx", Reg16, 1}, 109560484Sobrien {"dx", Reg16|InOutPortReg, 2}, 109660484Sobrien {"bx", Reg16|BaseIndex, 3}, 109760484Sobrien {"sp", Reg16, 4}, 109860484Sobrien {"bp", Reg16|BaseIndex, 5}, 109960484Sobrien {"si", Reg16|BaseIndex, 6}, 110060484Sobrien {"di", Reg16|BaseIndex, 7}, 110133965Sjdp /* 32 bit regs */ 110260484Sobrien {"eax", Reg32|BaseIndex|Acc, 0}, 110360484Sobrien {"ecx", Reg32|BaseIndex, 1}, 110460484Sobrien {"edx", Reg32|BaseIndex, 2}, 110560484Sobrien {"ebx", Reg32|BaseIndex, 3}, 110660484Sobrien {"esp", Reg32, 4}, 110760484Sobrien {"ebp", Reg32|BaseIndex, 5}, 110860484Sobrien {"esi", Reg32|BaseIndex, 6}, 110960484Sobrien {"edi", Reg32|BaseIndex, 7}, 111033965Sjdp /* segment registers */ 111160484Sobrien {"es", SReg2, 0}, 111260484Sobrien {"cs", SReg2, 1}, 111360484Sobrien {"ss", SReg2, 2}, 111460484Sobrien {"ds", SReg2, 3}, 111560484Sobrien {"fs", SReg3, 4}, 111660484Sobrien {"gs", SReg3, 5}, 111733965Sjdp /* control registers */ 111860484Sobrien {"cr0", Control, 0}, 111960484Sobrien {"cr1", Control, 1}, 112060484Sobrien {"cr2", Control, 2}, 112160484Sobrien {"cr3", Control, 3}, 112233965Sjdp {"cr4", Control, 4}, 112360484Sobrien {"cr5", Control, 5}, 112460484Sobrien {"cr6", Control, 6}, 112560484Sobrien {"cr7", Control, 7}, 112633965Sjdp /* debug registers */ 112760484Sobrien {"db0", Debug, 0}, 112860484Sobrien {"db1", Debug, 1}, 112960484Sobrien {"db2", Debug, 2}, 113060484Sobrien {"db3", Debug, 3}, 113160484Sobrien {"db4", Debug, 4}, 113260484Sobrien {"db5", Debug, 5}, 113360484Sobrien {"db6", Debug, 6}, 113460484Sobrien {"db7", Debug, 7}, 113560484Sobrien {"dr0", Debug, 0}, 113660484Sobrien {"dr1", Debug, 1}, 113760484Sobrien {"dr2", Debug, 2}, 113860484Sobrien {"dr3", Debug, 3}, 113960484Sobrien {"dr4", Debug, 4}, 114060484Sobrien {"dr5", Debug, 5}, 114160484Sobrien {"dr6", Debug, 6}, 114260484Sobrien {"dr7", Debug, 7}, 114333965Sjdp /* test registers */ 114460484Sobrien {"tr0", Test, 0}, 114560484Sobrien {"tr1", Test, 1}, 114660484Sobrien {"tr2", Test, 2}, 114760484Sobrien {"tr3", Test, 3}, 114860484Sobrien {"tr4", Test, 4}, 114960484Sobrien {"tr5", Test, 5}, 115060484Sobrien {"tr6", Test, 6}, 115160484Sobrien {"tr7", Test, 7}, 115260484Sobrien /* mmx and simd registers */ 115360484Sobrien {"mm0", RegMMX, 0}, 115460484Sobrien {"mm1", RegMMX, 1}, 115560484Sobrien {"mm2", RegMMX, 2}, 115660484Sobrien {"mm3", RegMMX, 3}, 115760484Sobrien {"mm4", RegMMX, 4}, 115860484Sobrien {"mm5", RegMMX, 5}, 115960484Sobrien {"mm6", RegMMX, 6}, 116060484Sobrien {"mm7", RegMMX, 7}, 116160484Sobrien {"xmm0", RegXMM, 0}, 116260484Sobrien {"xmm1", RegXMM, 1}, 116360484Sobrien {"xmm2", RegXMM, 2}, 116460484Sobrien {"xmm3", RegXMM, 3}, 116560484Sobrien {"xmm4", RegXMM, 4}, 116660484Sobrien {"xmm5", RegXMM, 5}, 116760484Sobrien {"xmm6", RegXMM, 6}, 116860484Sobrien {"xmm7", RegXMM, 7} 116960484Sobrien}; 117060484Sobrien 117160484Sobrienstatic const reg_entry i386_float_regtab[] = { 117233965Sjdp {"st(0)", FloatReg|FloatAcc, 0}, 117360484Sobrien {"st(1)", FloatReg, 1}, 117460484Sobrien {"st(2)", FloatReg, 2}, 117560484Sobrien {"st(3)", FloatReg, 3}, 117660484Sobrien {"st(4)", FloatReg, 4}, 117760484Sobrien {"st(5)", FloatReg, 5}, 117860484Sobrien {"st(6)", FloatReg, 6}, 117960484Sobrien {"st(7)", FloatReg, 7} 118033965Sjdp}; 118133965Sjdp 118233965Sjdp#define MAX_REG_NAME_SIZE 8 /* for parsing register names from input */ 118333965Sjdp 118433965Sjdp/* segment stuff */ 118533965Sjdpstatic const seg_entry cs = { "cs", 0x2e }; 118633965Sjdpstatic const seg_entry ds = { "ds", 0x3e }; 118733965Sjdpstatic const seg_entry ss = { "ss", 0x36 }; 118833965Sjdpstatic const seg_entry es = { "es", 0x26 }; 118933965Sjdpstatic const seg_entry fs = { "fs", 0x64 }; 119033965Sjdpstatic const seg_entry gs = { "gs", 0x65 }; 119133965Sjdp 119260484Sobrien/* end of opcode/i386.h */ 1193