1218822Sdim/* opcode/i386.h -- Intel 80386 opcode macros 277298Sobrien Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3218822Sdim 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 477298Sobrien Free Software Foundation, Inc. 533965Sjdp 6218822Sdim This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger. 733965Sjdp 8218822Sdim This program is free software; you can redistribute it and/or modify 9218822Sdim it under the terms of the GNU General Public License as published by 10218822Sdim the Free Software Foundation; either version 2 of the License, or 11218822Sdim (at your option) any later version. 1233965Sjdp 13218822Sdim This program is distributed in the hope that it will be useful, 14218822Sdim but WITHOUT ANY WARRANTY; without even the implied warranty of 15218822Sdim MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16218822Sdim GNU General Public License for more details. 1733965Sjdp 18218822Sdim You should have received a copy of the GNU General Public License 19218822Sdim along with this program; if not, write to the Free Software 20218822Sdim Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 2133965Sjdp 2260484Sobrien/* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived 2360484Sobrien ix86 Unix assemblers, generate floating point instructions with 2460484Sobrien reversed source and destination registers in certain cases. 2560484Sobrien Unfortunately, gcc and possibly many other programs use this 2660484Sobrien reversed syntax, so we're stuck with it. 2733965Sjdp 2860484Sobrien eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but 2960484Sobrien `fsub %st,%st(3)' results in st(3) = st - st(3), rather than 3060484Sobrien the expected st(3) = st(3) - st 3160484Sobrien 3260484Sobrien This happens with all the non-commutative arithmetic floating point 3360484Sobrien operations with two register operands, where the source register is 34218822Sdim %st, and destination register is %st(i). 3560484Sobrien 3660484Sobrien The affected opcode map is dceX, dcfX, deeX, defX. */ 3760484Sobrien 3860484Sobrien#ifndef SYSV386_COMPAT 3960484Sobrien/* Set non-zero for broken, compatible instructions. Set to zero for 4060484Sobrien non-broken opcodes at your peril. gcc generates SystemV/386 4160484Sobrien compatible instructions. */ 4260484Sobrien#define SYSV386_COMPAT 1 4360484Sobrien#endif 4460484Sobrien#ifndef OLDGCC_COMPAT 4560484Sobrien/* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could 4660484Sobrien generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands 4760484Sobrien reversed. */ 4860484Sobrien#define OLDGCC_COMPAT SYSV386_COMPAT 4960484Sobrien#endif 5060484Sobrien 5133965Sjdp#define MOV_AX_DISP32 0xa0 5260484Sobrien#define POP_SEG_SHORT 0x07 5333965Sjdp#define JUMP_PC_RELATIVE 0xeb 54218822Sdim#define INT_OPCODE 0xcd 5533965Sjdp#define INT3_OPCODE 0xcc 56218822Sdim/* The opcode for the fwait instruction, which disassembler treats as a 57218822Sdim prefix when it can. */ 5838889Sjdp#define FWAIT_OPCODE 0x9b 5960484Sobrien#define ADDR_PREFIX_OPCODE 0x67 6060484Sobrien#define DATA_PREFIX_OPCODE 0x66 6160484Sobrien#define LOCK_PREFIX_OPCODE 0xf0 6260484Sobrien#define CS_PREFIX_OPCODE 0x2e 6360484Sobrien#define DS_PREFIX_OPCODE 0x3e 6460484Sobrien#define ES_PREFIX_OPCODE 0x26 6560484Sobrien#define FS_PREFIX_OPCODE 0x64 6660484Sobrien#define GS_PREFIX_OPCODE 0x65 6760484Sobrien#define SS_PREFIX_OPCODE 0x36 6860484Sobrien#define REPNE_PREFIX_OPCODE 0xf2 6960484Sobrien#define REPE_PREFIX_OPCODE 0xf3 7033965Sjdp 71218822Sdim#define TWO_BYTE_OPCODE_ESCAPE 0x0f 72218822Sdim#define NOP_OPCODE (char) 0x90 7333965Sjdp 74218822Sdim/* register numbers */ 75218822Sdim#define EBP_REG_NUM 5 76218822Sdim#define ESP_REG_NUM 4 7733965Sjdp 78218822Sdim/* modrm_byte.regmem for twobyte escape */ 79218822Sdim#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM 80218822Sdim/* index_base_byte.index for no index register addressing */ 81218822Sdim#define NO_INDEX_REGISTER ESP_REG_NUM 82218822Sdim/* index_base_byte.base for no base register addressing */ 83218822Sdim#define NO_BASE_REGISTER EBP_REG_NUM 84218822Sdim#define NO_BASE_REGISTER_16 6 8533965Sjdp 86218822Sdim/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */ 87218822Sdim#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */ 88218822Sdim#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG) 8961843Sobrien 90218822Sdim/* x86-64 extension prefix. */ 91218822Sdim#define REX_OPCODE 0x40 9233965Sjdp 93218822Sdim/* Indicates 64 bit operand size. */ 94218822Sdim#define REX_W 8 95218822Sdim/* High extension to reg field of modrm byte. */ 96218822Sdim#define REX_R 4 97218822Sdim/* High extension to SIB index field. */ 98218822Sdim#define REX_X 2 99218822Sdim/* High extension to base field of modrm or SIB, or reg field of opcode. */ 100218822Sdim#define REX_B 1 10133965Sjdp 102218822Sdim/* max operands per insn */ 103218822Sdim#define MAX_OPERANDS 4 10433965Sjdp 105218822Sdim/* max immediates per insn (lcall, ljmp, insertq, extrq) */ 106218822Sdim#define MAX_IMMEDIATE_OPERANDS 2 10760484Sobrien 108218822Sdim/* max memory refs per insn (string ops) */ 109218822Sdim#define MAX_MEMORY_OPERANDS 2 11033965Sjdp 111218822Sdim/* max size of insn mnemonics. */ 112218822Sdim#define MAX_MNEM_SIZE 16 11333965Sjdp 114218822Sdim/* max size of register name in insn mnemonics. */ 115218822Sdim#define MAX_REG_NAME_SIZE 8 116