pci_emul.h revision 245678
1/*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/usr.sbin/bhyve/pci_emul.h 245678 2013-01-20 03:42:49Z neel $ 27 */ 28 29#ifndef _PCI_EMUL_H_ 30#define _PCI_EMUL_H_ 31 32#include <sys/types.h> 33#include <sys/queue.h> 34#include <sys/kernel.h> 35 36#include <dev/pci/pcireg.h> 37 38#include <assert.h> 39 40#define PCI_BARMAX PCIR_MAX_BAR_0 /* BAR registers in a Type 0 header */ 41#define PCIY_RESERVED 0x00 42 43struct vmctx; 44struct pci_devinst; 45struct memory_region; 46 47struct pci_devemu { 48 char *pe_emu; /* Name of device emulation */ 49 50 /* instance creation */ 51 int (*pe_init)(struct vmctx *, struct pci_devinst *, 52 char *opts); 53 54 /* config space read/write callbacks */ 55 int (*pe_cfgwrite)(struct vmctx *ctx, int vcpu, 56 struct pci_devinst *pi, int offset, 57 int bytes, uint32_t val); 58 int (*pe_cfgread)(struct vmctx *ctx, int vcpu, 59 struct pci_devinst *pi, int offset, 60 int bytes, uint32_t *retval); 61 62 /* BAR read/write callbacks */ 63 void (*pe_barwrite)(struct vmctx *ctx, int vcpu, 64 struct pci_devinst *pi, int baridx, 65 uint64_t offset, int size, uint64_t value); 66 uint64_t (*pe_barread)(struct vmctx *ctx, int vcpu, 67 struct pci_devinst *pi, int baridx, 68 uint64_t offset, int size); 69}; 70#define PCI_EMUL_SET(x) DATA_SET(pci_devemu_set, x); 71 72enum pcibar_type { 73 PCIBAR_NONE, 74 PCIBAR_IO, 75 PCIBAR_MEM32, 76 PCIBAR_MEM64, 77 PCIBAR_MEMHI64 78}; 79 80struct pcibar { 81 enum pcibar_type type; /* io or memory */ 82 uint64_t size; 83 uint64_t addr; 84}; 85 86#define PI_NAMESZ 40 87 88struct msix_table_entry { 89 uint64_t addr; 90 uint32_t msg_data; 91 uint32_t vector_control; 92} __packed; 93 94/* 95 * In case the structure is modified to hold extra information, use a define 96 * for the size that should be emulated. 97 */ 98#define MSIX_TABLE_ENTRY_SIZE 16 99#define MAX_MSIX_TABLE_SIZE 2048 100 101struct pci_devinst { 102 struct pci_devemu *pi_d; 103 struct vmctx *pi_vmctx; 104 uint8_t pi_bus, pi_slot, pi_func; 105 uint8_t pi_lintr_pin; 106 char pi_name[PI_NAMESZ]; 107 uint16_t pi_iobase; 108 int pi_bar_getsize; 109 110 struct { 111 int enabled; 112 int cpu; 113 int vector; 114 int msgnum; 115 } pi_msi; 116 117 struct { 118 int enabled; 119 int table_bar; 120 int pba_bar; 121 size_t table_offset; 122 size_t table_size; 123 int table_count; 124 size_t pba_offset; 125 struct msix_table_entry table[MAX_MSIX_TABLE_SIZE]; 126 } pi_msix; 127 128 void *pi_arg; /* devemu-private data */ 129 130 u_char pi_cfgdata[PCI_REGMAX + 1]; 131 struct pcibar pi_bar[PCI_BARMAX + 1]; 132}; 133 134struct msicap { 135 uint8_t capid; 136 uint8_t nextptr; 137 uint16_t msgctrl; 138 uint32_t addrlo; 139 uint32_t addrhi; 140 uint16_t msgdata; 141} __packed; 142 143struct msixcap { 144 uint8_t capid; 145 uint8_t nextptr; 146 uint16_t msgctrl; 147 uint32_t table_offset; 148 uint32_t pba_offset; 149} __packed; 150 151void init_pci(struct vmctx *ctx); 152void msicap_cfgwrite(struct pci_devinst *pi, int capoff, int offset, 153 int bytes, uint32_t val); 154void msixcap_cfgwrite(struct pci_devinst *pi, int capoff, int offset, 155 int bytes, uint32_t val); 156void pci_callback(void); 157int pci_emul_alloc_bar(struct pci_devinst *pdi, int idx, 158 enum pcibar_type type, uint64_t size); 159int pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx, 160 uint64_t hostbase, enum pcibar_type type, uint64_t size); 161int pci_emul_add_msicap(struct pci_devinst *pi, int msgnum); 162int pci_is_legacy(struct pci_devinst *pi); 163void pci_generate_msi(struct pci_devinst *pi, int msgnum); 164void pci_generate_msix(struct pci_devinst *pi, int msgnum); 165void pci_lintr_assert(struct pci_devinst *pi); 166void pci_lintr_deassert(struct pci_devinst *pi); 167int pci_lintr_request(struct pci_devinst *pi, int ivec); 168int pci_msi_enabled(struct pci_devinst *pi); 169int pci_msix_enabled(struct pci_devinst *pi); 170int pci_msi_msgnum(struct pci_devinst *pi); 171void pci_parse_slot(char *opt, int legacy); 172void pci_populate_msicap(struct msicap *cap, int msgs, int nextptr); 173 174static __inline void 175pci_set_cfgdata8(struct pci_devinst *pi, int offset, uint8_t val) 176{ 177 assert(offset <= PCI_REGMAX); 178 *(uint8_t *)(pi->pi_cfgdata + offset) = val; 179} 180 181static __inline void 182pci_set_cfgdata16(struct pci_devinst *pi, int offset, uint16_t val) 183{ 184 assert(offset <= (PCI_REGMAX - 1) && (offset & 1) == 0); 185 *(uint16_t *)(pi->pi_cfgdata + offset) = val; 186} 187 188static __inline void 189pci_set_cfgdata32(struct pci_devinst *pi, int offset, uint32_t val) 190{ 191 assert(offset <= (PCI_REGMAX - 3) && (offset & 3) == 0); 192 *(uint32_t *)(pi->pi_cfgdata + offset) = val; 193} 194 195static __inline uint8_t 196pci_get_cfgdata8(struct pci_devinst *pi, int offset) 197{ 198 assert(offset <= PCI_REGMAX); 199 return (*(uint8_t *)(pi->pi_cfgdata + offset)); 200} 201 202static __inline uint16_t 203pci_get_cfgdata16(struct pci_devinst *pi, int offset) 204{ 205 assert(offset <= (PCI_REGMAX - 1) && (offset & 1) == 0); 206 return (*(uint16_t *)(pi->pi_cfgdata + offset)); 207} 208 209static __inline uint32_t 210pci_get_cfgdata32(struct pci_devinst *pi, int offset) 211{ 212 assert(offset <= (PCI_REGMAX - 3) && (offset & 3) == 0); 213 return (*(uint32_t *)(pi->pi_cfgdata + offset)); 214} 215 216#endif /* _PCI_EMUL_H_ */ 217