pci_emul.h revision 234938 
1/*-
2 * Copyright (c) 2011 NetApp, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29#ifndef _PCI_EMUL_H_
30#define _PCI_EMUL_H_
31
32#include <sys/types.h>
33#include <sys/queue.h>
34#include <sys/kernel.h>
35
36#include <dev/pci/pcireg.h>
37
38#include <assert.h>
39
40#define	PCI_BARMAX	PCIR_MAX_BAR_0	/* BAR registers in a Type 0 header */
41#define	PCIY_RESERVED	0x00
42
43struct vmctx;
44struct pci_devinst;
45struct memory_region;
46
47struct pci_devemu {
48	char      *pe_emu;		/* Name of device emulation */
49
50	/* instance creation */
51	int       (*pe_init)(struct vmctx *, struct pci_devinst *, char *opts);
52
53	/* config space read/write callbacks */
54	int	(*pe_cfgwrite)(struct vmctx *ctx, int vcpu,
55			       struct pci_devinst *pi, int offset,
56			       int bytes, uint32_t val);
57	int	(*pe_cfgread)(struct vmctx *ctx, int vcpu,
58			      struct pci_devinst *pi, int offset,
59			      int bytes, uint32_t *retval);
60
61	/* I/O space read/write callbacks */
62	void      (*pe_iow)(struct pci_devinst *pi, int baridx,
63			    int offset, int size, uint32_t value);
64	uint32_t  (*pe_ior)(struct pci_devinst *pi, int baridx,
65			    int offset, int size);
66};
67#define PCI_EMUL_SET(x)   DATA_SET(pci_devemu_set, x);
68
69enum pcibar_type {
70	PCIBAR_NONE,
71	PCIBAR_IO,
72	PCIBAR_MEM32,
73	PCIBAR_MEM64,
74	PCIBAR_MEMHI64
75};
76
77typedef int (*bar_write_func_t)(struct pci_devinst *pdi, int idx, uint64_t bar);
78
79struct pcibar {
80	enum pcibar_type	type;		/* io or memory */
81	uint64_t		size;
82	uint64_t		addr;
83	bar_write_func_t	handler;
84};
85
86#define PI_NAMESZ	40
87
88struct msix_table_entry {
89	uint64_t	addr;
90	uint32_t	msg_data;
91	uint32_t	vector_control;
92} __packed;
93
94/*
95 * In case the structure is modified to hold extra information, use a define
96 * for the size that should be emulated.
97 */
98#define MSIX_TABLE_ENTRY_SIZE 16
99#define MAX_MSIX_TABLE_SIZE 2048
100
101struct pci_devinst {
102	struct pci_devemu *pi_d;
103	struct vmctx *pi_vmctx;
104	uint8_t	  pi_bus, pi_slot, pi_func;
105	uint8_t   pi_lintr_pin;
106	char	  pi_name[PI_NAMESZ];
107	uint16_t  pi_iobase;
108	int	  pi_bar_getsize;
109
110	struct {
111		int	enabled;
112		int	cpu;
113		int	vector;
114		int	msgnum;
115	} pi_msi;
116
117	struct {
118		int	enabled;
119		int	table_bar;
120		int	pba_bar;
121		size_t	table_offset;
122		uintptr_t table_gpa;
123		size_t	table_size;
124		int	table_count;
125		size_t	pba_offset;
126		struct memory_region *table_bar_region;
127		struct msix_table_entry table[MAX_MSIX_TABLE_SIZE];
128	} pi_msix;
129
130	void      *pi_arg;		/* devemu-private data */
131
132	u_char	  pi_cfgdata[PCI_REGMAX + 1];
133	struct pcibar pi_bar[PCI_BARMAX + 1];
134};
135
136struct msicap {
137	uint8_t		capid;
138	uint8_t		nextptr;
139	uint16_t	msgctrl;
140	uint32_t	addrlo;
141	uint32_t	addrhi;
142	uint16_t	msgdata;
143} __packed;
144
145struct msixcap {
146	uint8_t		capid;
147	uint8_t		nextptr;
148	uint16_t	msgctrl;
149	uint32_t	table_offset;
150	uint32_t	pba_offset;
151} __packed;
152
153void	init_pci(struct vmctx *ctx);
154void	msicap_cfgwrite(struct pci_devinst *pi, int capoff, int offset,
155	    int bytes, uint32_t val);
156void	msixcap_cfgwrite(struct pci_devinst *pi, int capoff, int offset,
157	    int bytes, uint32_t val);
158void	pci_callback(void);
159int	pci_emul_alloc_bar(struct pci_devinst *pdi, int idx, uint64_t hostbase,
160	    enum pcibar_type type, uint64_t size);
161int	pci_emul_add_msicap(struct pci_devinst *pi, int msgnum);
162int	pci_is_legacy(struct pci_devinst *pi);
163void	pci_generate_msi(struct pci_devinst *pi, int msgnum);
164void	pci_lintr_assert(struct pci_devinst *pi);
165void	pci_lintr_deassert(struct pci_devinst *pi);
166int	pci_lintr_request(struct pci_devinst *pi, int ivec);
167int	pci_msi_enabled(struct pci_devinst *pi);
168int	pci_msi_msgnum(struct pci_devinst *pi);
169void	pci_parse_name(char *opt);
170void	pci_parse_slot(char *opt, int legacy);
171void	pci_populate_msicap(struct msicap *cap, int msgs, int nextptr);
172
173static __inline void
174pci_set_cfgdata8(struct pci_devinst *pi, int offset, uint8_t val)
175{
176	assert(offset <= PCI_REGMAX);
177	*(uint8_t *)(pi->pi_cfgdata + offset) = val;
178}
179
180static __inline void
181pci_set_cfgdata16(struct pci_devinst *pi, int offset, uint16_t val)
182{
183	assert(offset <= (PCI_REGMAX - 1) && (offset & 1) == 0);
184	*(uint16_t *)(pi->pi_cfgdata + offset) = val;
185}
186
187static __inline void
188pci_set_cfgdata32(struct pci_devinst *pi, int offset, uint32_t val)
189{
190	assert(offset <= (PCI_REGMAX - 3) && (offset & 3) == 0);
191	*(uint32_t *)(pi->pi_cfgdata + offset) = val;
192}
193
194static __inline uint8_t
195pci_get_cfgdata8(struct pci_devinst *pi, int offset)
196{
197	assert(offset <= PCI_REGMAX);
198	return (*(uint8_t *)(pi->pi_cfgdata + offset));
199}
200
201static __inline uint16_t
202pci_get_cfgdata16(struct pci_devinst *pi, int offset)
203{
204	assert(offset <= (PCI_REGMAX - 1) && (offset & 1) == 0);
205	return (*(uint16_t *)(pi->pi_cfgdata + offset));
206}
207
208static __inline uint32_t
209pci_get_cfgdata32(struct pci_devinst *pi, int offset)
210{
211	assert(offset <= (PCI_REGMAX - 3) && (offset & 3) == 0);
212	return (*(uint32_t *)(pi->pi_cfgdata + offset));
213}
214
215#endif /* _PCI_EMUL_H_ */
216