ata.h revision 93662
1/*-
2 * Copyright (c) 2000,2001,2002 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer,
10 *    without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 *    derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/sys/ata.h 93662 2002-04-02 13:48:17Z sos $
29 */
30
31#ifndef _SYS_ATA_H_
32#define _SYS_ATA_H_
33
34#include <sys/ioccom.h>
35
36/* ATA/ATAPI device parameter information */
37struct ata_params {
38/*000*/	u_int16_t	packet_size	:2;	/* packet command size */
39#define ATAPI_PSIZE_12			0	/* 12 bytes */
40#define ATAPI_PSIZE_16			1	/* 16 bytes */
41
42    	u_int16_t	incomplete	:1;
43    	u_int16_t			:2;
44    	u_int16_t	drq_type	:2;	/* DRQ type */
45#define ATAPI_DRQT_MPROC		0	/* cpu	  3 ms delay */
46#define ATAPI_DRQT_INTR			1	/* intr	 10 ms delay */
47#define ATAPI_DRQT_ACCEL		2	/* accel 50 us delay */
48
49    	u_int16_t	removable	:1;	/* device is removable */
50    	u_int16_t	type		:5;	/* device type */
51#define ATAPI_TYPE_DIRECT		0	/* disk/floppy */
52#define ATAPI_TYPE_TAPE			1	/* streaming tape */
53#define ATAPI_TYPE_CDROM		5	/* CD-ROM device */
54#define ATAPI_TYPE_OPTICAL		7	/* optical disk */
55
56    	u_int16_t			:2;
57    	u_int16_t	cmd_protocol	:1;	/* command protocol */
58#define ATA_PROTO_ATA			0
59#define ATA_PROTO_ATAPI			1
60
61/*001*/	u_int16_t	cylinders;		/* # of cylinders */
62	u_int16_t	reserved2;
63/*003*/	u_int16_t	heads;			/* # heads */
64	u_int16_t	obsolete4;
65	u_int16_t	obsolete5;
66/*006*/	u_int16_t	sectors;		/* # sectors/track */
67/*007*/	u_int16_t	vendor7[3];
68/*010*/	u_int8_t	serial[20];		/* serial number */
69	u_int16_t	retired20;
70	u_int16_t	retired21;
71	u_int16_t	obsolete22;
72/*023*/	u_int8_t	revision[8];		/* firmware revision */
73/*027*/	u_int8_t	model[40];		/* model name */
74/*047*/	u_int16_t	sectors_intr:8;		/* sectors per interrupt */
75	u_int16_t	:8;
76
77/*048*/	u_int16_t	usedmovsd;		/* double word read/write? */
78/*049*/	u_int16_t	retired49:8;
79	u_int16_t	support_dma	:1;	/* DMA supported */
80	u_int16_t	support_lba	:1;	/* LBA supported */
81	u_int16_t	disable_iordy	:1;	/* IORDY may be disabled */
82	u_int16_t	support_iordy	:1;	/* IORDY supported */
83	u_int16_t	softreset	:1;	/* needs softreset when busy */
84	u_int16_t	stdby_ovlap	:1;	/* standby/overlap supported */
85	u_int16_t	support_queueing:1;	/* supports queuing overlap */
86	u_int16_t	support_idma	:1;	/* interleaved DMA supported */
87
88/*050*/	u_int16_t	device_stdby_min:1;
89	u_int16_t	:13;
90	u_int16_t	capability_one:1;
91	u_int16_t	capability_zero:1;
92
93/*051*/	u_int16_t	vendor51:8;
94	u_int16_t	retired_piomode:8;	/* PIO modes 0-2 */
95/*052*/	u_int16_t	vendor52:8;
96	u_int16_t	retired_dmamode:8;	/* DMA modes, not ATA-3 */
97/*053*/	u_int16_t	atavalid;		/* fields valid */
98#define ATA_FLAG_54_58			1	/* words 54-58 valid */
99#define ATA_FLAG_64_70			2	/* words 64-70 valid */
100#define ATA_FLAG_88			4	/* word 88 valid */
101
102	u_int16_t	obsolete54[5];
103/*059*/	u_int16_t	multi_count:8;
104	u_int16_t	multi_valid:1;
105	u_int16_t	:7;
106
107/*060*/	u_int32_t	lba_size;
108	u_int16_t	obsolete62;
109/*063*/	u_int16_t	mwdmamodes;		/* multiword DMA modes */
110/*064*/	u_int16_t	apiomodes;		/* advanced PIO modes */
111
112/*065*/	u_int16_t	mwdmamin;		/* min. M/W DMA time/word ns */
113/*066*/	u_int16_t	mwdmarec;		/* rec. M/W DMA time ns */
114/*067*/	u_int16_t	pioblind;		/* min. PIO cycle w/o flow */
115/*068*/	u_int16_t	pioiordy;		/* min. PIO cycle IORDY flow */
116	u_int16_t	reserved69;
117	u_int16_t	reserved70;
118/*071*/	u_int16_t	rlsovlap;		/* rel time (us) for overlap */
119/*072*/	u_int16_t	rlsservice;		/* rel time (us) for service */
120	u_int16_t	reserved73;
121	u_int16_t	reserved74;
122
123/*075*/	u_int16_t	queuelen:5;
124	u_int16_t	:11;
125
126	u_int16_t	reserved76;
127	u_int16_t	reserved77;
128	u_int16_t	reserved78;
129	u_int16_t	reserved79;
130/*080*/	u_int16_t	version_major;
131/*081*/	u_int16_t	version_minor;
132	struct {
133/*082/085*/ u_int16_t	smart:1;
134	    u_int16_t	security:1;
135	    u_int16_t	removable:1;
136	    u_int16_t	power_mngt:1;
137	    u_int16_t	packet:1;
138	    u_int16_t	write_cache:1;
139	    u_int16_t	look_ahead:1;
140	    u_int16_t	release_irq:1;
141	    u_int16_t	service_irq:1;
142	    u_int16_t	reset:1;
143	    u_int16_t	protected:1;
144	    u_int16_t	:1;
145	    u_int16_t	write_buffer:1;
146	    u_int16_t	read_buffer:1;
147	    u_int16_t	nop:1;
148	    u_int16_t	:1;
149
150/*083/086*/ u_int16_t	microcode:1;
151	    u_int16_t	queued:1;
152	    u_int16_t	cfa:1;
153	    u_int16_t	apm:1;
154	    u_int16_t	notify:1;
155	    u_int16_t	standby:1;
156	    u_int16_t	spinup:1;
157	    u_int16_t	:1;
158	    u_int16_t	max_security:1;
159	    u_int16_t	auto_acoustic:1;
160	    u_int16_t	address48:1;
161	    u_int16_t	config_overlay:1;
162	    u_int16_t	flush_cache:1;
163	    u_int16_t	flush_cache48:1;
164	    u_int16_t	support_one:1;
165	    u_int16_t	support_zero:1;
166
167/*084/087*/ u_int16_t	smart_error_log:1;
168	    u_int16_t	smart_self_test:1;
169	    u_int16_t	media_serial_no:1;
170	    u_int16_t	media_card_pass:1;
171	    u_int16_t	streaming:1;
172	    u_int16_t	logging:1;
173	    u_int16_t	:8;
174	    u_int16_t	extended_one:1;
175	    u_int16_t	extended_zero:1;
176	} support, enabled;
177
178/*088*/	u_int16_t	udmamodes;		/* UltraDMA modes */
179/*089*/	u_int16_t	erase_time;
180/*090*/	u_int16_t	enhanced_erase_time;
181/*091*/	u_int16_t	apm_value;
182/*092*/	u_int16_t	master_passwd_revision;
183
184/*093*/	u_int16_t	hwres_master	:8;
185	u_int16_t	hwres_slave	:5;
186	u_int16_t	hwres_cblid	:1;
187	u_int16_t	hwres_valid:2;
188
189/*094*/	u_int16_t	current_acoustic:8;
190	u_int16_t	vendor_acoustic:8;
191
192/*095*/	u_int16_t	stream_min_req_size;
193/*096*/	u_int16_t	stream_transfer_time;
194/*097*/	u_int16_t	stream_access_latency;
195/*098*/	u_int32_t	stream_granularity;
196/*100*/	u_int64_t	lba_size48;
197	u_int16_t	reserved104[23];
198/*127*/	u_int16_t	removable_status;
199/*128*/	u_int16_t	security_status;
200	u_int16_t	reserved129[31];
201/*160*/	u_int16_t	cfa_powermode1;
202	u_int16_t	reserved161[14];
203/*176*/	u_int16_t	media_serial[30];
204	u_int16_t	reserved206[49];
205/*255*/	u_int16_t	integrity;
206};
207
208#define ATA_MODE_MASK		0x0f
209#define ATA_DMA_MASK		0xf0
210#define ATA_PIO			0x00
211#define ATA_PIO0		0x08
212#define ATA_PIO1		0x09
213#define ATA_PIO2		0x0a
214#define ATA_PIO3		0x0b
215#define ATA_PIO4		0x0c
216#define ATA_DMA			0x10
217#define ATA_WDMA		0x20
218#define ATA_WDMA2		0x22
219#define ATA_UDMA		0x40
220#define ATA_UDMA2		0x42
221#define ATA_UDMA4		0x44
222#define ATA_UDMA5		0x45
223#define ATA_UDMA6		0x46
224
225struct ata_cmd {
226    int				channel;
227    int				device;
228    int				cmd;
229#define ATAGPARM		1
230#define ATAGMODE		2
231#define ATASMODE		3
232#define ATAREINIT		4
233#define ATAATTACH		5
234#define ATADETACH		6
235#define ATAPICMD		7
236#define ATARAIDREBUILD		8
237#define ATARAIDCREATE		9
238#define ATARAIDDELETE		10
239#define ATARAIDSTATUS		11
240#define ATAENCSTAT		12
241
242    union {
243	struct {
244	    int			mode[2];
245	} mode;
246	struct {
247	    int			type[2];
248	    char		name[2][32];
249	    struct ata_params	params[2];
250	} param;
251	struct raid_setup {
252	    int			type;
253#define	AR_RAID0			1
254#define	AR_RAID1			2
255#define	AR_SPAN				4
256
257	    int			total_disks;
258	    int			disks[16];
259	    int			interleave;
260	    int			unit;
261	} raid_setup;
262	struct raid_status {
263	    int			type;
264	    int			total_disks;
265	    int			disks[16];
266	    int			interleave;
267	    int			status;
268#define	AR_READY			1
269#define	AR_DEGRADED			2
270#define	AR_REBUILDING			4
271
272	    int			progress;
273	} raid_status;
274	struct {
275	    int			fan;
276	    int			temp;
277	    int			v05;
278	    int			v12;
279	} enclosure;
280	struct {
281	    char		ccb[16];
282	    caddr_t		data;
283	    int			count;
284	    int			flags;
285#define ATAPI_CMD_CTRL			0x00
286#define ATAPI_CMD_READ			0x01
287#define ATAPI_CMD_WRITE			0x02
288
289	    int			timeout;
290	    int			error;
291	    char		sense_data[18];
292	} atapi;
293    } u;
294};
295
296#define IOCATA			_IOWR('a',  1, struct ata_cmd)
297
298#endif /* _SYS_ATA_H_ */
299