vmparam.h revision 221855
1100894Srwatson/*- 2100894Srwatson * Copyright (c) 1990 The Regents of the University of California. 3100894Srwatson * All rights reserved. 4100894Srwatson * Copyright (c) 1994 John S. Dyson 5100894Srwatson * All rights reserved. 6100894Srwatson * 7100894Srwatson * This code is derived from software contributed to Berkeley by 8100894Srwatson * William Jolitz. 9100894Srwatson * 10100894Srwatson * Redistribution and use in source and binary forms, with or without 11100894Srwatson * modification, are permitted provided that the following conditions 12100894Srwatson * are met: 13100894Srwatson * 1. Redistributions of source code must retain the above copyright 14100894Srwatson * notice, this list of conditions and the following disclaimer. 15100894Srwatson * 2. Redistributions in binary form must reproduce the above copyright 16100894Srwatson * notice, this list of conditions and the following disclaimer in the 17100894Srwatson * documentation and/or other materials provided with the distribution. 18100894Srwatson * 4. Neither the name of the University nor the names of its contributors 19100894Srwatson * may be used to endorse or promote products derived from this software 20100894Srwatson * without specific prior written permission. 21100894Srwatson * 22100894Srwatson * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23100894Srwatson * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24100894Srwatson * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25100894Srwatson * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26100894Srwatson * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27100894Srwatson * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28100894Srwatson * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29100894Srwatson * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30100894Srwatson * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31100894Srwatson * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32100894Srwatson * SUCH DAMAGE. 33100894Srwatson * 34100894Srwatson * from: @(#)vmparam.h 5.9 (Berkeley) 5/12/91 35100894Srwatson * from: FreeBSD: src/sys/i386/include/vmparam.h,v 1.33 2000/03/30 36100894Srwatson * $FreeBSD: head/sys/sparc64/include/vmparam.h 221855 2011-05-13 19:35:01Z mdf $ 37100894Srwatson */ 38100894Srwatson 39100894Srwatson#ifndef _MACHINE_VMPARAM_H_ 40100894Srwatson#define _MACHINE_VMPARAM_H_ 41100894Srwatson 42100894Srwatson/* 43100894Srwatson * Virtual memory related constants, all in bytes 44100894Srwatson */ 45100894Srwatson#ifndef MAXTSIZ 46100894Srwatson#define MAXTSIZ (1*1024*1024*1024) /* max text size */ 47100894Srwatson#endif 48100894Srwatson#ifndef DFLDSIZ 49104300Sphk#define DFLDSIZ (128*1024*1024) /* initial data size limit */ 50101173Srwatson#endif 51100894Srwatson#ifndef MAXDSIZ 52100979Srwatson#define MAXDSIZ (1*1024*1024*1024) /* max data size */ 53100979Srwatson#endif 54100979Srwatson#ifndef DFLSSIZ 55102949Sbde#define DFLSSIZ (128*1024*1024) /* initial stack size limit */ 56100979Srwatson#endif 57100979Srwatson#ifndef MAXSSIZ 58101712Srwatson#define MAXSSIZ (1*1024*1024*1024) /* max stack size */ 59100979Srwatson#endif 60100979Srwatson#ifndef SGROWSIZ 61100894Srwatson#define SGROWSIZ (128*1024) /* amount to grow stack */ 62100894Srwatson#endif 63100979Srwatson 64100979Srwatson/* 65100979Srwatson * The physical address space is sparsely populated. 66100979Srwatson */ 67100979Srwatson#define VM_PHYSSEG_SPARSE 68100979Srwatson 69100979Srwatson/* 70100979Srwatson * The number of PHYSSEG entries must be one greater than the number 71100894Srwatson * of phys_avail entries because the phys_avail entry that spans the 72100979Srwatson * largest physical address that is accessible by ISA DMA is split 73100979Srwatson * into two PHYSSEG entries. 74100979Srwatson */ 75100979Srwatson#define VM_PHYSSEG_MAX 64 76100979Srwatson 77100979Srwatson/* 78100979Srwatson * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool 79100979Srwatson * from which physical pages are allocated and VM_FREEPOOL_DIRECT is 80100979Srwatson * the pool from which physical pages for small UMA objects are 81100979Srwatson * allocated. 82100979Srwatson */ 83100979Srwatson#define VM_NFREEPOOL 3 84100979Srwatson#define VM_FREEPOOL_CACHE 2 85100979Srwatson#define VM_FREEPOOL_DEFAULT 0 86100979Srwatson#define VM_FREEPOOL_DIRECT 1 87100979Srwatson 88100979Srwatson/* 89100979Srwatson * Create two free page lists: VM_FREELIST_DEFAULT is for physical 90101712Srwatson * pages that are above the largest physical address that is 91101712Srwatson * accessible by ISA DMA and VM_FREELIST_ISADMA is for physical pages 92101712Srwatson * that are below that address. 93101712Srwatson */ 94101712Srwatson#define VM_NFREELIST 2 95101712Srwatson#define VM_FREELIST_DEFAULT 0 96101712Srwatson#define VM_FREELIST_ISADMA 1 97100979Srwatson 98100979Srwatson/* 99100979Srwatson * An allocation size of 16MB is supported in order to optimize the 100100979Srwatson * use of the direct map by UMA. Specifically, a cache line contains 101104517Srwatson * at most four TTEs, collectively mapping 16MB of physical memory. 102100979Srwatson * By reducing the number of distinct 16MB "pages" that are used by UMA, 103100979Srwatson * the physical memory allocator reduces the likelihood of both 4MB 104100979Srwatson * page TLB misses and cache misses caused by 4MB page TLB misses. 105100979Srwatson */ 106100979Srwatson#define VM_NFREEORDER 12 107100979Srwatson 108100979Srwatson/* 109100979Srwatson * Only one memory domain. 110100979Srwatson */ 111100979Srwatson#ifndef VM_NDOMAIN 112100979Srwatson#define VM_NDOMAIN 1 113100979Srwatson#endif 114100979Srwatson 115100979Srwatson/* 116100979Srwatson * Enable superpage reservations: 1 level. 117100979Srwatson */ 118100979Srwatson#ifndef VM_NRESERVLEVEL 119100979Srwatson#define VM_NRESERVLEVEL 1 120100979Srwatson#endif 121100979Srwatson 122100979Srwatson/* 123100979Srwatson * Level 0 reservations consist of 512 pages. 124100979Srwatson */ 125103513Srwatson#ifndef VM_LEVEL_0_ORDER 126103513Srwatson#define VM_LEVEL_0_ORDER 9 127103513Srwatson#endif 128104236Srwatson 129103513Srwatson/* 130100979Srwatson * Address space layout. 131100979Srwatson * 132100979Srwatson * UltraSPARC I and II implement a 44 bit virtual address space. The address 133100979Srwatson * space is split into 2 regions at each end of the 64 bit address space, with 134100979Srwatson * an out of range "hole" in the middle. UltraSPARC III implements the full 135100979Srwatson * 64 bit virtual address space, but we don't really have any use for it and 136100979Srwatson * 43 bits of user address space is considered to be "enough", so we ignore it. 137100979Srwatson * 138100979Srwatson * Upper region: 0xffffffffffffffff 139100979Srwatson * 0xfffff80000000000 140103514Srwatson * 141103514Srwatson * Hole: 0xfffff7ffffffffff 142103514Srwatson * 0x0000080000000000 143104236Srwatson * 144103514Srwatson * Lower region: 0x000007ffffffffff 145100979Srwatson * 0x0000000000000000 146100979Srwatson * 147100979Srwatson * In general we ignore the upper region, and use the lower region as mappable 148100979Srwatson * space. 149100979Srwatson * 150100979Srwatson * We define some interesting address constants: 151100979Srwatson * 152100979Srwatson * VM_MIN_ADDRESS and VM_MAX_ADDRESS define the start and of the entire 64 bit 153100979Srwatson * address space, mostly just for convenience. 154100979Srwatson * 155100979Srwatson * VM_MIN_DIRECT_ADDRESS and VM_MAX_DIRECT_ADDRESS define the start and end 156100979Srwatson * of the direct mapped region. This maps virtual addresses to physical 157100979Srwatson * addresses directly using 4mb tlb entries, with the physical address encoded 158100979Srwatson * in the lower 43 bits of virtual address. These mappings are convenient 159100979Srwatson * because they do not require page tables, and because they never change they 160100979Srwatson * do not require tlb flushes. However, since these mappings are cacheable, 161103136Srwatson * we must ensure that all pages accessed this way are either not double 162103136Srwatson * mapped, or that all other mappings have virtual color equal to physical 163103136Srwatson * color, in order to avoid creating illegal aliases in the data cache. 164103136Srwatson * 165103136Srwatson * VM_MIN_KERNEL_ADDRESS and VM_MAX_KERNEL_ADDRESS define the start and end of 166101892Srwatson * mappable kernel virtual address space. VM_MIN_KERNEL_ADDRESS is basically 167100979Srwatson * arbitrary, a convenient address is chosen which allows both the kernel text 168100979Srwatson * and data and the prom's address space to be mapped with 1 4mb tsb page. 169100979Srwatson * VM_MAX_KERNEL_ADDRESS is variable, computed at startup time based on the 170100979Srwatson * amount of physical memory available. Each 4mb tsb page provides 1g of 171101988Srwatson * virtual address space, with the only practical limit being available 172104268Srwatson * phsyical memory. 173104268Srwatson * 174104268Srwatson * VM_MIN_PROM_ADDRESS and VM_MAX_PROM_ADDRESS define the start and end of the 175104268Srwatson * prom address space. On startup the prom's mappings are duplicated in the 176104268Srwatson * kernel tsb, to allow prom memory to be accessed normally by the kernel. 177104268Srwatson * 178104268Srwatson * VM_MIN_USER_ADDRESS and VM_MAX_USER_ADDRESS define the start and end of the 179104268Srwatson * user address space. There are some hardware errata about using addresses 180104268Srwatson * at the boundary of the va hole, so we allow just under 43 bits of user 181104268Srwatson * address space. Note that the kernel and user address spaces overlap, but 182104517Srwatson * this doesn't matter because they use different tlb contexts, and because 183104517Srwatson * the kernel address space is not mapped into each process' address space. 184104517Srwatson */ 185100979Srwatson#define VM_MIN_ADDRESS (0x0000000000000000UL) 186100979Srwatson#define VM_MAX_ADDRESS (0xffffffffffffffffUL) 187100979Srwatson 188104517Srwatson#define VM_MIN_DIRECT_ADDRESS (0xfffff80000000000UL) 189104517Srwatson#define VM_MAX_DIRECT_ADDRESS (VM_MAX_ADDRESS) 190100979Srwatson 191104517Srwatson#define VM_MIN_KERNEL_ADDRESS (0x00000000c0000000UL) 192100979Srwatson#define VM_MAX_KERNEL_ADDRESS (vm_max_kernel_address) 193104517Srwatson 194100979Srwatson#define VM_MIN_PROM_ADDRESS (0x00000000f0000000UL) 195104517Srwatson#define VM_MAX_PROM_ADDRESS (0x00000000ffffffffUL) 196100979Srwatson 197104517Srwatson#define VM_MIN_USER_ADDRESS (0x0000000000000000UL) 198100979Srwatson#define VM_MAX_USER_ADDRESS (0x000007fe00000000UL) 199104517Srwatson 200100979Srwatson#define VM_MINUSER_ADDRESS (VM_MIN_USER_ADDRESS) 201104517Srwatson#define VM_MAXUSER_ADDRESS (VM_MAX_USER_ADDRESS) 202100979Srwatson 203104517Srwatson#define KERNBASE (VM_MIN_KERNEL_ADDRESS) 204100979Srwatson#define PROMBASE (VM_MIN_PROM_ADDRESS) 205104517Srwatson#define USRSTACK (VM_MAX_USER_ADDRESS) 206100979Srwatson 207104517Srwatson/* 208100979Srwatson * Virtual size (bytes) for various kernel submaps. 209104517Srwatson */ 210100979Srwatson#ifndef VM_KMEM_SIZE 211101988Srwatson#define VM_KMEM_SIZE (16*1024*1024) 212100979Srwatson#endif 213100979Srwatson 214100979Srwatson/* 215100979Srwatson * How many physical pages per KVA page allocated. 216100979Srwatson * min(max(max(VM_KMEM_SIZE, Physical memory/VM_KMEM_SIZE_SCALE), 217100979Srwatson * VM_KMEM_SIZE_MIN), VM_KMEM_SIZE_MAX) 218100979Srwatson * is the total KVA space allocated for kmem_map. 219100979Srwatson */ 220100979Srwatson#ifndef VM_KMEM_SIZE_SCALE 221100979Srwatson#define VM_KMEM_SIZE_SCALE (3) 222100979Srwatson#endif 223100979Srwatson 224100979Srwatson/* 225100979Srwatson * Ceiling on amount of kmem_map kva space. 226100979Srwatson */ 227100979Srwatson#ifndef VM_KMEM_SIZE_MAX 228100979Srwatson#define VM_KMEM_SIZE_MAX ((VM_MAX_KERNEL_ADDRESS - \ 229100979Srwatson VM_MIN_KERNEL_ADDRESS + 1) * 3 / 5) 230100979Srwatson#endif 231100979Srwatson 232100979Srwatson/* 233100979Srwatson * Initial pagein size of beginning of executable file. 234100979Srwatson */ 235100979Srwatson#ifndef VM_INITIAL_PAGEIN 236100979Srwatson#define VM_INITIAL_PAGEIN 16 237100979Srwatson#endif 238100979Srwatson 239100979Srwatson#define UMA_MD_SMALL_ALLOC 240100979Srwatson 241100979Srwatsonextern vm_offset_t vm_max_kernel_address; 242100979Srwatson 243100979Srwatson/* 244100979Srwatson * Older sparc64 machines have a virtually indexed L1 data cache of 16KB. 245100979Srwatson * Consequently, mapping the same physical page multiple times may have 246100979Srwatson * caching disabled. 247100979Srwatson */ 248100979Srwatson#define ZERO_REGION_SIZE PAGE_SIZE 249100979Srwatson 250100979Srwatson#endif /* !_MACHINE_VMPARAM_H_ */ 251100979Srwatson