fhc.c revision 200815 
1/*-
2 * Copyright (c) 2003 Jake Burkholder.
3 * Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/sparc64/fhc/fhc.c 200815 2009-12-21 21:29:16Z marius $");
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/bus.h>
34#include <sys/kernel.h>
35#include <sys/malloc.h>
36#include <sys/module.h>
37#include <sys/pcpu.h>
38
39#include <dev/led/led.h>
40#include <dev/ofw/ofw_bus.h>
41#include <dev/ofw/ofw_bus_subr.h>
42#include <dev/ofw/openfirm.h>
43
44#include <machine/bus.h>
45#include <machine/bus_common.h>
46#include <machine/resource.h>
47
48#include <sys/rman.h>
49
50#include <sparc64/fhc/fhcreg.h>
51#include <sparc64/sbus/ofw_sbus.h>
52
53struct fhc_devinfo {
54	struct ofw_bus_devinfo	fdi_obdinfo;
55	struct resource_list	fdi_rl;
56};
57
58struct fhc_softc {
59	struct resource		*sc_memres[FHC_NREG];
60	int			sc_nrange;
61	struct sbus_ranges	*sc_ranges;
62	int			sc_ign;
63	struct cdev		*sc_led_dev;
64};
65
66static device_probe_t fhc_probe;
67static device_attach_t fhc_attach;
68static bus_print_child_t fhc_print_child;
69static bus_probe_nomatch_t fhc_probe_nomatch;
70static bus_setup_intr_t fhc_setup_intr;
71static bus_alloc_resource_t fhc_alloc_resource;
72static bus_get_resource_list_t fhc_get_resource_list;
73static ofw_bus_get_devinfo_t fhc_get_devinfo;
74
75static void fhc_intr_enable(void *);
76static void fhc_intr_disable(void *);
77static void fhc_intr_assign(void *);
78static void fhc_intr_clear(void *);
79static void fhc_led_func(void *, int);
80static int fhc_print_res(struct fhc_devinfo *);
81
82static device_method_t fhc_methods[] = {
83	/* Device interface */
84	DEVMETHOD(device_probe,		fhc_probe),
85	DEVMETHOD(device_attach,	fhc_attach),
86	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
87	DEVMETHOD(device_suspend,	bus_generic_suspend),
88	DEVMETHOD(device_resume,	bus_generic_resume),
89
90	/* Bus interface */
91	DEVMETHOD(bus_print_child,	fhc_print_child),
92	DEVMETHOD(bus_probe_nomatch,	fhc_probe_nomatch),
93	DEVMETHOD(bus_alloc_resource,	fhc_alloc_resource),
94	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
95	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
96	DEVMETHOD(bus_release_resource,	bus_generic_rl_release_resource),
97	DEVMETHOD(bus_setup_intr,	fhc_setup_intr),
98	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
99	DEVMETHOD(bus_get_resource,	bus_generic_rl_get_resource),
100	DEVMETHOD(bus_get_resource_list, fhc_get_resource_list),
101	DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
102
103	/* ofw_bus interface */
104	DEVMETHOD(ofw_bus_get_devinfo,	fhc_get_devinfo),
105	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
106	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
107	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
108	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
109	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
110
111	KOBJMETHOD_END
112};
113
114static driver_t fhc_driver = {
115	"fhc",
116	fhc_methods,
117	sizeof(struct fhc_softc),
118};
119
120static devclass_t fhc_devclass;
121
122DRIVER_MODULE(fhc, central, fhc_driver, fhc_devclass, 0, 0);
123MODULE_DEPEND(fhc, central, 1, 1, 1);
124DRIVER_MODULE(fhc, nexus, fhc_driver, fhc_devclass, 0, 0);
125MODULE_DEPEND(fhc, nexus, 1, 1, 1);
126MODULE_VERSION(fhc, 1);
127
128static const struct intr_controller fhc_ic = {
129	fhc_intr_enable,
130	fhc_intr_disable,
131	fhc_intr_assign,
132	fhc_intr_clear
133};
134
135struct fhc_icarg {
136	struct fhc_softc	*fica_sc;
137	struct resource		*fica_memres;
138};
139
140static int
141fhc_probe(device_t dev)
142{
143
144	if (strcmp(ofw_bus_get_name(dev), "fhc") == 0) {
145		device_set_desc(dev, "fhc");
146		return (0);
147	}
148	return (ENXIO);
149}
150
151static int
152fhc_attach(device_t dev)
153{
154	char ledname[sizeof("boardXX")];
155	struct fhc_devinfo *fdi;
156	struct fhc_icarg *fica;
157	struct fhc_softc *sc;
158	struct sbus_regs *reg;
159	phandle_t child;
160	phandle_t node;
161	device_t cdev;
162	uint32_t board;
163	uint32_t ctrl;
164	uint32_t *intr;
165	uint32_t iv;
166	char *name;
167	int central;
168	int error;
169	int i;
170	int j;
171
172	sc = device_get_softc(dev);
173	node = ofw_bus_get_node(dev);
174
175	central = 0;
176	if (strcmp(device_get_name(device_get_parent(dev)), "central") == 0)
177		central = 1;
178
179	for (i = 0; i < FHC_NREG; i++) {
180		j = i;
181		sc->sc_memres[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
182		    &j, RF_ACTIVE);
183		if (sc->sc_memres[i] == NULL) {
184			device_printf(dev, "cannot allocate resource %d\n", i);
185			error = ENXIO;
186			goto fail_memres;
187		}
188	}
189
190	if (central != 0) {
191		board = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_BSR);
192		board = ((board >> 16) & 0x1) | ((board >> 12) & 0xe);
193	} else {
194		if (OF_getprop(node, "board#", &board, sizeof(board)) == -1) {
195			device_printf(dev, "cannot get board number\n");
196			error = ENXIO;
197			goto fail_memres;
198		}
199	}
200
201	device_printf(dev, "board %d, ", board);
202	if (OF_getprop_alloc(node, "board-model", 1, (void **)&name) != -1) {
203		printf("model %s\n", name);
204		free(name, M_OFWPROP);
205	} else
206		printf("model unknown\n");
207
208	for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
209		bus_write_4(sc->sc_memres[i], FHC_ICLR, 0x0);
210		(void)bus_read_4(sc->sc_memres[i], FHC_ICLR);
211	}
212
213	sc->sc_ign = board << 1;
214	bus_write_4(sc->sc_memres[FHC_IGN], 0x0, sc->sc_ign);
215	sc->sc_ign = bus_read_4(sc->sc_memres[FHC_IGN], 0x0);
216
217	ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
218	if (central == 0)
219		ctrl |= FHC_CTRL_IXIST;
220	ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE);
221	bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl);
222	(void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
223
224	sc->sc_nrange = OF_getprop_alloc(node, "ranges",
225	    sizeof(*sc->sc_ranges), (void **)&sc->sc_ranges);
226	if (sc->sc_nrange == -1) {
227		device_printf(dev, "cannot get ranges\n");
228		error = ENXIO;
229		goto fail_memres;
230	}
231
232	/*
233	 * Apparently only the interrupt controller of boards hanging off
234	 * of central(4) is indented to be used, otherwise we would have
235	 * conflicts registering the interrupt controllers for all FHC
236	 * boards as the board number and thus the IGN isn't unique.
237	 */
238	if (central == 1) {
239		/*
240		 * Hunt through all the interrupt mapping regs and register
241		 * our interrupt controller for the corresponding interrupt
242		 * vectors.  We do this early in order to be able to catch
243		 * stray interrupts.
244		 */
245		for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
246			fica = malloc(sizeof(*fica), M_DEVBUF, M_NOWAIT);
247			if (fica == NULL)
248				panic("%s: could not allocate interrupt "
249				    "controller argument", __func__);
250			fica->fica_sc = sc;
251			fica->fica_memres = sc->sc_memres[i];
252#ifdef FHC_DEBUG
253			device_printf(dev, "intr map %d: %#lx, clr: %#lx\n", i,
254			    (u_long)bus_read_4(fica->fica_memres, FHC_IMAP),
255			    (u_long)bus_read_4(fica->fica_memres, FHC_ICLR));
256#endif
257			/*
258			 * XXX we only pick the INO rather than the INR
259			 * from the IMR since the firmware may not provide
260			 * the IGN and the IGN is constant for all devices
261			 * on that FireHose controller.
262			 */
263			j = intr_controller_register(INTMAP_VEC(sc->sc_ign,
264			    INTINO(bus_read_4(fica->fica_memres, FHC_IMAP))),
265			    &fhc_ic, fica);
266			if (j != 0)
267				device_printf(dev, "could not register "
268				    "interrupt controller for map %d (%d)\n",
269				    i, j);
270		}
271	} else {
272		snprintf(ledname, sizeof(ledname), "board%d", board);
273		sc->sc_led_dev = led_create(fhc_led_func, sc, ledname);
274	}
275
276	for (child = OF_child(node); child != 0; child = OF_peer(child)) {
277		fdi = malloc(sizeof(*fdi), M_DEVBUF, M_WAITOK | M_ZERO);
278		if (ofw_bus_gen_setup_devinfo(&fdi->fdi_obdinfo, child) != 0) {
279			free(fdi, M_DEVBUF);
280			continue;
281		}
282		i = OF_getprop_alloc(child, "reg", sizeof(*reg),
283		    (void **)&reg);
284		if (i == -1) {
285			device_printf(dev, "<%s>: incomplete\n",
286			    fdi->fdi_obdinfo.obd_name);
287			ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo);
288			free(fdi, M_DEVBUF);
289			continue;
290		}
291		resource_list_init(&fdi->fdi_rl);
292		for (j = 0; j < i; j++)
293			resource_list_add(&fdi->fdi_rl, SYS_RES_MEMORY, j,
294			    reg[j].sbr_offset, reg[j].sbr_offset +
295			    reg[j].sbr_size, reg[j].sbr_size);
296		free(reg, M_OFWPROP);
297		if (central == 1) {
298			i = OF_getprop_alloc(child, "interrupts",
299			    sizeof(*intr), (void **)&intr);
300			if (i != -1) {
301				for (j = 0; j < i; j++) {
302					iv = INTMAP_VEC(sc->sc_ign, intr[j]);
303					resource_list_add(&fdi->fdi_rl,
304					    SYS_RES_IRQ, j, iv, iv, 1);
305				}
306				free(intr, M_OFWPROP);
307			}
308		}
309		cdev = device_add_child(dev, NULL, -1);
310		if (cdev == NULL) {
311			device_printf(dev, "<%s>: device_add_child failed\n",
312			    fdi->fdi_obdinfo.obd_name);
313			resource_list_free(&fdi->fdi_rl);
314			ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo);
315			free(fdi, M_DEVBUF);
316			continue;
317		}
318		device_set_ivars(cdev, fdi);
319	}
320
321	return (bus_generic_attach(dev));
322
323 fail_memres:
324	for (i = 0; i < FHC_NREG; i++)
325		if (sc->sc_memres[i] != NULL)
326			bus_release_resource(dev, SYS_RES_MEMORY,
327			    rman_get_rid(sc->sc_memres[i]), sc->sc_memres[i]);
328	return (error);
329}
330
331static int
332fhc_print_child(device_t dev, device_t child)
333{
334	int rv;
335
336	rv = bus_print_child_header(dev, child);
337	rv += fhc_print_res(device_get_ivars(child));
338	rv += bus_print_child_footer(dev, child);
339	return (rv);
340}
341
342static void
343fhc_probe_nomatch(device_t dev, device_t child)
344{
345	const char *type;
346
347	device_printf(dev, "<%s>", ofw_bus_get_name(child));
348	fhc_print_res(device_get_ivars(child));
349	type = ofw_bus_get_type(child);
350	printf(" type %s (no driver attached)\n",
351	    type != NULL ? type : "unknown");
352}
353
354static void
355fhc_intr_enable(void *arg)
356{
357	struct intr_vector *iv = arg;
358	struct fhc_icarg *fica = iv->iv_icarg;
359
360	bus_write_4(fica->fica_memres, FHC_IMAP,
361	    INTMAP_ENABLE(iv->iv_vec, iv->iv_mid));
362	(void)bus_read_4(fica->fica_memres, FHC_IMAP);
363}
364
365static void
366fhc_intr_disable(void *arg)
367{
368	struct intr_vector *iv = arg;
369	struct fhc_icarg *fica = iv->iv_icarg;
370
371	bus_write_4(fica->fica_memres, FHC_IMAP, iv->iv_vec);
372	(void)bus_read_4(fica->fica_memres, FHC_IMAP);
373}
374
375static void
376fhc_intr_assign(void *arg)
377{
378	struct intr_vector *iv = arg;
379	struct fhc_icarg *fica = iv->iv_icarg;
380
381	bus_write_4(fica->fica_memres, FHC_IMAP, INTMAP_TID(
382	    bus_read_4(fica->fica_memres, FHC_IMAP), iv->iv_mid));
383	(void)bus_read_4(fica->fica_memres, FHC_IMAP);
384}
385
386static void
387fhc_intr_clear(void *arg)
388{
389	struct intr_vector *iv = arg;
390	struct fhc_icarg *fica = iv->iv_icarg;
391
392	bus_write_4(fica->fica_memres, FHC_ICLR, 0x0);
393	(void)bus_read_4(fica->fica_memres, FHC_ICLR);
394}
395
396static int
397fhc_setup_intr(device_t bus, device_t child, struct resource *r, int flags,
398    driver_filter_t *filt, driver_intr_t *func, void *arg, void **cookiep)
399{
400	struct fhc_softc *sc;
401	u_long vec;
402
403	sc = device_get_softc(bus);
404	/*
405	 * Make sure the vector is fully specified and we registered
406	 * our interrupt controller for it.
407	 */
408	vec = rman_get_start(r);
409	if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &fhc_ic) {
410		device_printf(bus, "invalid interrupt vector 0x%lx\n", vec);
411		return (EINVAL);
412	}
413	return (bus_generic_setup_intr(bus, child, r, flags, filt, func,
414	    arg, cookiep));
415}
416
417static struct resource *
418fhc_alloc_resource(device_t bus, device_t child, int type, int *rid,
419    u_long start, u_long end, u_long count, u_int flags)
420{
421	struct resource_list *rl;
422	struct resource_list_entry *rle;
423	struct fhc_softc *sc;
424	struct resource *res;
425	bus_addr_t coffset;
426	bus_addr_t cend;
427	bus_addr_t phys;
428	int isdefault;
429	int passthrough;
430	int i;
431
432	isdefault = (start == 0UL && end == ~0UL);
433	passthrough = (device_get_parent(child) != bus);
434	res = NULL;
435	rle = NULL;
436	rl = BUS_GET_RESOURCE_LIST(bus, child);
437	sc = device_get_softc(bus);
438	switch (type) {
439	case SYS_RES_IRQ:
440		return (resource_list_alloc(rl, bus, child, type, rid, start,
441		    end, count, flags));
442	case SYS_RES_MEMORY:
443		if (!passthrough) {
444			rle = resource_list_find(rl, type, *rid);
445			if (rle == NULL)
446				return (NULL);
447			if (rle->res != NULL)
448				panic("%s: resource entry is busy", __func__);
449			if (isdefault) {
450				start = rle->start;
451				count = ulmax(count, rle->count);
452				end = ulmax(rle->end, start + count - 1);
453			}
454		}
455		for (i = 0; i < sc->sc_nrange; i++) {
456			coffset = sc->sc_ranges[i].coffset;
457			cend = coffset + sc->sc_ranges[i].size - 1;
458			if (start >= coffset && end <= cend) {
459				start -= coffset;
460				end -= coffset;
461				phys = sc->sc_ranges[i].poffset |
462				    ((bus_addr_t)sc->sc_ranges[i].pspace << 32);
463				res = bus_generic_alloc_resource(bus, child,
464				    type, rid, phys + start, phys + end,
465				    count, flags);
466				if (!passthrough)
467					rle->res = res;
468				break;
469			}
470		}
471		break;
472	}
473	return (res);
474}
475
476static struct resource_list *
477fhc_get_resource_list(device_t bus, device_t child)
478{
479	struct fhc_devinfo *fdi;
480
481	fdi = device_get_ivars(child);
482	return (&fdi->fdi_rl);
483}
484
485static const struct ofw_bus_devinfo *
486fhc_get_devinfo(device_t bus, device_t child)
487{
488	struct fhc_devinfo *fdi;
489
490	fdi = device_get_ivars(child);
491	return (&fdi->fdi_obdinfo);
492}
493
494static void
495fhc_led_func(void *arg, int onoff)
496{
497	struct fhc_softc *sc;
498	uint32_t ctrl;
499
500	sc = (struct fhc_softc *)arg;
501
502	ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
503	if (onoff)
504		ctrl |= FHC_CTRL_RLED;
505	else
506		ctrl &= ~FHC_CTRL_RLED;
507	ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE);
508	bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl);
509	(void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
510}
511
512static int
513fhc_print_res(struct fhc_devinfo *fdi)
514{
515	int rv;
516
517	rv = 0;
518	rv += resource_list_print_type(&fdi->fdi_rl, "mem", SYS_RES_MEMORY,
519	    "%#lx");
520	rv += resource_list_print_type(&fdi->fdi_rl, "irq", SYS_RES_IRQ, "%ld");
521	return (rv);
522}
523