ofw_pcibus.c revision 233018 
1/*-
2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000, BSDi
5 * Copyright (c) 2003, Thomas Moestl <tmm@FreeBSD.org>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice unmodified, this list of conditions, and the following
13 *    disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/powerpc/ofw/ofw_pcibus.c 233018 2012-03-15 22:53:39Z nwhitehorn $");
32
33#include <sys/param.h>
34#include <sys/bus.h>
35#include <sys/kernel.h>
36#include <sys/libkern.h>
37#include <sys/module.h>
38#include <sys/pciio.h>
39
40#include <dev/ofw/ofw_bus.h>
41#include <dev/ofw/ofw_bus_subr.h>
42#include <dev/ofw/ofw_pci.h>
43#include <dev/ofw/openfirm.h>
44
45#include <machine/bus.h>
46#include <machine/intr_machdep.h>
47#include <machine/resource.h>
48
49#include <dev/pci/pcireg.h>
50#include <dev/pci/pcivar.h>
51#include <dev/pci/pci_private.h>
52
53#include "pcib_if.h"
54#include "pci_if.h"
55
56typedef uint32_t ofw_pci_intr_t;
57
58/* Methods */
59static device_probe_t ofw_pcibus_probe;
60static device_attach_t ofw_pcibus_attach;
61static pci_assign_interrupt_t ofw_pcibus_assign_interrupt;
62static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo;
63static int ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child,
64    char *buf, size_t buflen);
65
66static void ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno);
67static void ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno);
68
69static device_method_t ofw_pcibus_methods[] = {
70	/* Device interface */
71	DEVMETHOD(device_probe,		ofw_pcibus_probe),
72	DEVMETHOD(device_attach,	ofw_pcibus_attach),
73
74	/* Bus interface */
75	DEVMETHOD(bus_child_pnpinfo_str, ofw_pcibus_child_pnpinfo_str_method),
76
77	/* PCI interface */
78	DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt),
79
80	/* ofw_bus interface */
81	DEVMETHOD(ofw_bus_get_devinfo,	ofw_pcibus_get_devinfo),
82	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
83	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
84	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
85	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
86	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
87
88	{ 0, 0 }
89};
90
91struct ofw_pcibus_devinfo {
92	struct pci_devinfo	opd_dinfo;
93	struct ofw_bus_devinfo	opd_obdinfo;
94};
95
96static devclass_t pci_devclass;
97
98DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods,
99    sizeof(struct pci_softc), pci_driver);
100DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, pci_devclass, 0, 0);
101MODULE_VERSION(ofw_pcibus, 1);
102MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1);
103
104static int
105ofw_pcibus_probe(device_t dev)
106{
107
108	if (ofw_bus_get_node(dev) == -1)
109		return (ENXIO);
110	device_set_desc(dev, "OFW PCI bus");
111
112	return (0);
113}
114
115static int
116ofw_pcibus_attach(device_t dev)
117{
118	u_int busno, domain;
119	int error;
120
121	error = pci_attach_common(dev);
122	if (error)
123		return (error);
124	domain = pcib_get_domain(dev);
125	busno = pcib_get_bus(dev);
126
127	/*
128	 * Attach those children represented in the device tree.
129	 */
130
131	ofw_pcibus_enum_devtree(dev, domain, busno);
132
133	/*
134	 * We now attach any laggard devices. FDT, for instance, allows
135	 * the device tree to enumerate only some PCI devices. Apple's
136	 * OF device tree on some Grackle-based hardware can also miss
137	 * functions on multi-function cards.
138	 */
139
140	ofw_pcibus_enum_bus(dev, domain, busno);
141
142	return (bus_generic_attach(dev));
143}
144
145static void
146ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno)
147{
148	device_t pcib;
149	struct ofw_pci_register pcir;
150	struct ofw_pcibus_devinfo *dinfo;
151	phandle_t node, child;
152	u_int func, slot;
153	int intline;
154
155	pcib = device_get_parent(dev);
156	node = ofw_bus_get_node(dev);
157
158	for (child = OF_child(node); child != 0; child = OF_peer(child)) {
159		if (OF_getprop(child, "reg", &pcir, sizeof(pcir)) == -1)
160			continue;
161		slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi);
162		func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi);
163
164		/* Some OFW device trees contain dupes. */
165		if (pci_find_dbsf(domain, busno, slot, func) != NULL)
166			continue;
167
168		/*
169		 * The preset in the intline register is usually bogus.  Reset
170		 * it such that the PCI code will reroute the interrupt if
171		 * needed.
172		 */
173
174		intline = PCI_INVALID_IRQ;
175		if (OF_getproplen(child, "interrupts") > 0)
176			intline = 0;
177		PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE,
178		    intline, 1);
179
180		/*
181		 * Now set up the PCI and OFW bus layer devinfo and add it
182		 * to the PCI bus.
183		 */
184
185		dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib,
186		    domain, busno, slot, func, sizeof(*dinfo));
187		if (dinfo == NULL)
188			continue;
189		if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
190		    0) {
191			pci_freecfg((struct pci_devinfo *)dinfo);
192			continue;
193		}
194		pci_add_child(dev, (struct pci_devinfo *)dinfo);
195
196		/*
197		 * Some devices don't have an intpin set, but do have
198		 * interrupts. These are fully specified, and set in the
199		 * interrupts property, so add that value to the device's
200		 * resource list.
201		 */
202		if (dinfo->opd_dinfo.cfg.intpin == 0) {
203			ofw_pci_intr_t intr[2];
204			phandle_t iparent;
205			int icells;
206
207			if (OF_getprop(child, "interrupts", &intr,
208			    sizeof(intr)) > 0) {
209				iparent = 0;
210				icells = 1;
211				OF_getprop(child, "interrupt-parent", &iparent,
212				    sizeof(iparent));
213				OF_getprop(iparent, "#interrupt-cells", &icells,
214				    sizeof(icells));
215
216				if (iparent != 0)
217					intr[0] = MAP_IRQ(iparent, intr[0]);
218
219				if (iparent != 0 && icells > 1) {
220					powerpc_config_intr(intr[0],
221					    (intr[1] & 1) ? INTR_TRIGGER_LEVEL :
222					    INTR_TRIGGER_EDGE,
223					    INTR_POLARITY_LOW);
224				}
225
226				resource_list_add(&dinfo->opd_dinfo.resources,
227				    SYS_RES_IRQ, 0, intr[0], intr[0], 1);
228			}
229		}
230	}
231}
232
233/*
234 * The following is an almost exact clone of pci_add_children(), with the
235 * addition that it (a) will not add children that have already been added,
236 * and (b) will set up the OFW devinfo to point to invalid values. This is
237 * to handle non-enumerated PCI children as exist in FDT and on the second
238 * function of the Rage 128 in my Blue & White G3.
239 */
240
241static void
242ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno)
243{
244	device_t pcib;
245	struct ofw_pcibus_devinfo *dinfo;
246	int maxslots;
247	int s, f, pcifunchigh;
248	uint8_t hdrtype;
249
250	pcib = device_get_parent(dev);
251
252	maxslots = PCIB_MAXSLOTS(pcib);
253	for (s = 0; s <= maxslots; s++) {
254		pcifunchigh = 0;
255		f = 0;
256		DELAY(1);
257		hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1);
258		if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
259			continue;
260		if (hdrtype & PCIM_MFDEV)
261			pcifunchigh = PCI_FUNCMAX;
262		for (f = 0; f <= pcifunchigh; f++) {
263			/* Filter devices we have already added */
264			if (pci_find_dbsf(domain, busno, s, f) != NULL)
265				continue;
266
267			dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(
268			    pcib, domain, busno, s, f, sizeof(*dinfo));
269			if (dinfo == NULL)
270				continue;
271
272			dinfo->opd_obdinfo.obd_node = -1;
273
274			dinfo->opd_obdinfo.obd_name = NULL;
275			dinfo->opd_obdinfo.obd_compat = NULL;
276			dinfo->opd_obdinfo.obd_type = NULL;
277			dinfo->opd_obdinfo.obd_model = NULL;
278
279			/*
280			 * For non OFW-devices, don't believe 0
281			 * for an interrupt.
282			 */
283			if (dinfo->opd_dinfo.cfg.intline == 0) {
284				dinfo->opd_dinfo.cfg.intline = PCI_INVALID_IRQ;
285				PCIB_WRITE_CONFIG(pcib, busno, s, f,
286				    PCIR_INTLINE, PCI_INVALID_IRQ, 1);
287			}
288
289			pci_add_child(dev, (struct pci_devinfo *)dinfo);
290		}
291	}
292}
293
294static int
295ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, char *buf,
296    size_t buflen)
297{
298	pci_child_pnpinfo_str_method(cbdev, child, buf, buflen);
299
300	if (ofw_bus_get_node(child) != -1)  {
301		strlcat(buf, " ", buflen); /* Separate info */
302		ofw_bus_gen_child_pnpinfo_str(cbdev, child, buf, buflen);
303	}
304
305	return (0);
306}
307
308static int
309ofw_pcibus_assign_interrupt(device_t dev, device_t child)
310{
311	ofw_pci_intr_t intr;
312	phandle_t node, iparent;
313	int isz;
314
315	node = ofw_bus_get_node(child);
316
317	if (node == -1) {
318		/* Non-firmware enumerated child, use standard routing */
319
320		/*
321		 * XXX: Right now we don't have anything sensible to do here,
322		 * since the ofw_imap stuff relies on nodes having a reg
323		 * property. There exist ways around this, so the ePAPR
324		 * spec will need to be studied.
325		 */
326
327		return (PCI_INVALID_IRQ);
328
329#ifdef NOTYET
330		intr = pci_get_intpin(child);
331		return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child,
332		    intr));
333#endif
334	}
335
336	/*
337	 * Try to determine the node's interrupt parent so we know which
338	 * PIC to use.
339	 */
340
341	iparent = -1;
342	if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) < 0)
343		iparent = -1;
344
345	/*
346	 * Any AAPL,interrupts property gets priority and is
347	 * fully specified (i.e. does not need routing)
348	 */
349
350	isz = OF_getprop(node, "AAPL,interrupts", &intr, sizeof(intr));
351	if (isz == sizeof(intr))
352		return ((iparent == -1) ? intr : MAP_IRQ(iparent, intr));
353
354	isz = OF_getprop(node, "interrupts", &intr, sizeof(intr));
355	if (isz == sizeof(intr)) {
356		if (iparent != -1)
357			intr = MAP_IRQ(iparent, intr);
358	} else {
359		/* No property: our best guess is the intpin. */
360		intr = pci_get_intpin(child);
361	}
362
363	/*
364	 * If we got intr from a property, it may or may not be an intpin.
365	 * For on-board devices, it frequently is not, and is completely out
366	 * of the valid intpin range.  For PCI slots, it hopefully is,
367	 * otherwise we will have trouble interfacing with non-OFW buses
368	 * such as cardbus.
369	 * Since we cannot tell which it is without violating layering, we
370	 * will always use the route_interrupt method, and treat exceptions
371	 * on the level they become apparent.
372	 */
373	return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr));
374}
375
376static const struct ofw_bus_devinfo *
377ofw_pcibus_get_devinfo(device_t bus, device_t dev)
378{
379	struct ofw_pcibus_devinfo *dinfo;
380
381	dinfo = device_get_ivars(dev);
382	return (&dinfo->opd_obdinfo);
383}
384
385