1194632Sraj/*-
2194632Sraj * Copyright (C) 2006-2008 Semihalf, Grzegorz Bernacki
3194632Sraj * All rights reserved.
4194632Sraj *
5194632Sraj * Redistribution and use in source and binary forms, with or without
6194632Sraj * modification, are permitted provided that the following conditions
7194632Sraj * are met:
8194632Sraj * 1. Redistributions of source code must retain the above copyright
9194632Sraj *    notice, this list of conditions and the following disclaimer.
10194632Sraj * 2. Redistributions in binary form must reproduce the above copyright
11194632Sraj *    notice, this list of conditions and the following disclaimer in the
12194632Sraj *    documentation and/or other materials provided with the distribution.
13194632Sraj *
14194632Sraj * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15194632Sraj * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16194632Sraj * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17194632Sraj * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18194632Sraj * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19194632Sraj * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20194632Sraj * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21194632Sraj * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22194632Sraj * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23194632Sraj * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24194632Sraj * SUCH DAMAGE.
25194632Sraj *
26194632Sraj * $FreeBSD$
27194632Sraj */
28194632Sraj
29194632Sraj#ifndef _DEV_RTC_DS1553_H_
30194632Sraj#define _DEV_RTC_DS1553_H_
31194632Sraj
32194632Sraj/* DS1553 registers */
33194632Sraj#define DS1553_NVRAM_SIZE		0x1ff0
34194632Sraj#define DS1553_OFF_FLAGS		0x1ff0
35194632Sraj#define DS1553_OFF_ALARM_SECONDS	0x1ff2
36194632Sraj#define DS1553_OFF_ALARM_MINUTES	0x1ff3
37194632Sraj#define DS1553_OFF_ALARM_HOURS		0x1ff4
38194632Sraj#define DS1553_OFF_ALARM_DATE		0x1ff5
39194632Sraj#define DS1553_OFF_INTERRUPTS		0x1ff6
40194632Sraj#define DS1553_OFF_WATCHDOG		0x1ff7
41194632Sraj#define DS1553_OFF_CONTROL		0x1ff8
42194632Sraj#define DS1553_OFF_SECONDS		0x1ff9
43194632Sraj#define DS1553_OFF_MINUTES		0x1ffa
44194632Sraj#define DS1553_OFF_HOURS		0x1ffb
45194632Sraj#define DS1553_OFF_DAYOFWEEK		0x1ffc
46194632Sraj#define DS1553_OFF_DATE			0x1ffd
47194632Sraj#define DS1553_OFF_MONTH		0x1ffe
48194632Sraj#define DS1553_OFF_YEAR			0x1fff
49194632Sraj
50194632Sraj/* dayofweek register's bits */
51194632Sraj#define DS1553_BIT_FREQ_TEST		0x40 /* frequency test bit */
52194632Sraj
53194632Sraj/* seconds register's bit */
54194632Sraj#define DS1553_BIT_OSC			0x80 /* oscillator start/stop bit */
55194632Sraj
56194632Sraj/* control register's bits */
57194632Sraj#define DS1553_BIT_WRITE		0x80 /* write */
58194632Sraj#define DS1553_BIT_READ			0x40 /* read */
59194632Sraj
60194632Sraj/* watchdog register's bits */
61194632Sraj#define DS1553_BIT_WATCHDOG		0x80 /* watchdog steering bit */
62194632Sraj#define DS1553_BIT_BMB4			0x40 /* watchdog multiplier bit4 */
63194632Sraj#define DS1553_BIT_BMB3			0x20 /* watchdog multiplier bit3 */
64194632Sraj#define DS1553_BIT_BMB2			0x10 /* watchdog multiplier bit2 */
65194632Sraj#define DS1553_BIT_BMB1			0x8  /* watchdog multiplier bit1 */
66194632Sraj#define DS1553_BIT_BMB0			0x4  /* watchdog multiplier bit0 */
67194632Sraj#define DS1553_BIT_RB1			0x2  /* watchdog resolution bit1 */
68194632Sraj#define DS1553_BIT_RB0			0x1  /* watchdog resolution bit0 */
69194632Sraj
70194632Sraj/* alarm seconds/minutes/hours/date register's bit */
71194632Sraj#define DS1553_BIT_AM			0x80 /* alarm mask bit */
72194632Sraj
73194632Sraj/* flag register's bits */
74194632Sraj#define DS1553_BIT_BLF			0x10 /* battery flag */
75194632Sraj#define DS1553_BIT_WF			0x80 /* watchdog flag */
76194632Sraj
77194632Sraj/* register's mask */
78194632Sraj#define DS1553_MASK_MONTH		0x1f
79194632Sraj#define DS1553_MASK_DATE		0x3f
80194632Sraj#define DS1553_MASK_DAYOFWEEK		0x7
81194632Sraj#define DS1553_MASK_HOUR		0x3f
82194632Sraj#define DS1553_MASK_MINUTES		0x7f
83194632Sraj#define DS1553_MASK_SECONDS		0x7f
84194632Sraj
85194632Srajstruct ds1553_softc {
86194632Sraj
87194632Sraj	bus_space_tag_t		sc_bst;	/* bus space tag */
88194632Sraj	bus_space_handle_t	sc_bsh;	/* bus space handle */
89194632Sraj
90194632Sraj	int			rid;	/* resource id */
91194632Sraj	struct resource		*res;
92194632Sraj	struct mtx		sc_mtx;	/* hardware mutex */
93194632Sraj
94194632Sraj	uint32_t		year_offset;
95194632Sraj	/* read/write functions */
96194632Sraj	uint8_t			(*sc_read)(device_t, bus_size_t);
97194632Sraj	void			(*sc_write)(device_t, bus_size_t, uint8_t);
98194632Sraj};
99194632Sraj
100194632Sraj/* device interface */
101194632Srajint ds1553_attach(device_t);
102194632Sraj
103194632Sraj/* clock interface */
104194632Srajint ds1553_gettime(device_t, struct timespec *);
105194632Srajint ds1553_settime(device_t, struct timespec *);
106194632Sraj
107194632Sraj#endif /* _DEV_RTC_DS1553_H_ */
108