mmu_oea.c revision 91456
11195Srgrimes/* 22779Srgrimes * Copyright (c) 2001 The NetBSD Foundation, Inc. 337Srgrimes * All rights reserved. 437Srgrimes * 537Srgrimes * This code is derived from software contributed to The NetBSD Foundation 6147Srgrimes * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc. 7147Srgrimes * 8147Srgrimes * Redistribution and use in source and binary forms, with or without 9207Snate * modification, are permitted provided that the following conditions 101734Sjkh * are met: 111518Sguido * 1. Redistributions of source code must retain the above copyright 121518Sguido * notice, this list of conditions and the following disclaimer. 131734Sjkh * 2. Redistributions in binary form must reproduce the above copyright 141734Sjkh * notice, this list of conditions and the following disclaimer in the 151734Sjkh * documentation and/or other materials provided with the distribution. 1637Srgrimes * 3. All advertising materials mentioning features or use of this software 1737Srgrimes * must display the following acknowledgement: 1837Srgrimes * This product includes software developed by the NetBSD 1937Srgrimes * Foundation, Inc. and its contributors. 201773Sjkh * 4. Neither the name of The NetBSD Foundation nor the names of its 21147Srgrimes * contributors may be used to endorse or promote products derived 22147Srgrimes * from this software without specific prior written permission. 232779Srgrimes * 242779Srgrimes * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 252779Srgrimes * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 261767Sjkh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 272570Srgrimes * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 282570Srgrimes * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 292570Srgrimes * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 302570Srgrimes * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 312570Srgrimes * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 322570Srgrimes * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 332570Srgrimes * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 342570Srgrimes * POSSIBILITY OF SUCH DAMAGE. 351782Sjkh */ 361782Sjkh/* 37491Srgrimes * Copyright (C) 1995, 1996 Wolfgang Solfrank. 3837Srgrimes * Copyright (C) 1995, 1996 TooLs GmbH. 3937Srgrimes * All rights reserved. 4037Srgrimes * 4137Srgrimes * Redistribution and use in source and binary forms, with or without 4237Srgrimes * modification, are permitted provided that the following conditions 43263Srgrimes * are met: 442779Srgrimes * 1. Redistributions of source code must retain the above copyright 452779Srgrimes * notice, this list of conditions and the following disclaimer. 46993Srgrimes * 2. Redistributions in binary form must reproduce the above copyright 47277Srgrimes * notice, this list of conditions and the following disclaimer in the 482779Srgrimes * documentation and/or other materials provided with the distribution. 49284Srgrimes * 3. All advertising materials mentioning features or use of this software 50463Srgrimes * must display the following acknowledgement: 511205Srgrimes * This product includes software developed by TooLs GmbH. 522779Srgrimes * 4. The name of TooLs GmbH may not be used to endorse or promote products 532779Srgrimes * derived from this software without specific prior written permission. 54284Srgrimes * 55284Srgrimes * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 56284Srgrimes * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 57284Srgrimes * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 58284Srgrimes * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 591285Srgrimes * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 60284Srgrimes * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 611767Sjkh * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 621285Srgrimes * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 632499Sgpalmer * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 641285Srgrimes * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 65284Srgrimes * 661371Srgrimes * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $ 671371Srgrimes */ 681194Srgrimes/* 69358Srgrimes * Copyright (C) 2001 Benno Rice. 70358Srgrimes * All rights reserved. 71412Salm * 72358Srgrimes * Redistribution and use in source and binary forms, with or without 73452Srgrimes * modification, are permitted provided that the following conditions 74358Srgrimes * are met: 751194Srgrimes * 1. Redistributions of source code must retain the above copyright 761767Sjkh * notice, this list of conditions and the following disclaimer. 771194Srgrimes * 2. Redistributions in binary form must reproduce the above copyright 782779Srgrimes * notice, this list of conditions and the following disclaimer in the 791194Srgrimes * documentation and/or other materials provided with the distribution. 801194Srgrimes * 811194Srgrimes * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 821194Srgrimes * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 831194Srgrimes * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 841194Srgrimes * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 851194Srgrimes * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 861194Srgrimes * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 871194Srgrimes * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 881194Srgrimes * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 891194Srgrimes * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 901194Srgrimes * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 911194Srgrimes */ 922779Srgrimes 931194Srgrimes#ifndef lint 941194Srgrimesstatic const char rcsid[] = 951243Srgrimes "$FreeBSD: head/sys/powerpc/aim/mmu_oea.c 91456 2002-02-28 02:54:16Z benno $"; 96263Srgrimes#endif /* not lint */ 97358Srgrimes 981194Srgrimes/* 991194Srgrimes * Manages physical address maps. 1001194Srgrimes * 1011773Sjkh * In addition to hardware address maps, this module is called upon to 1022499Sgpalmer * provide software-use-only maps which may or may not be stored in the 1031194Srgrimes * same form as hardware maps. These pseudo-maps are used to store 104452Srgrimes * intermediate results from copy operations to and from address spaces. 1051194Srgrimes * 1061194Srgrimes * Since the information managed by this module is also stored by the 107358Srgrimes * logical address mapping module, this module may throw away valid virtual 1081194Srgrimes * to physical mappings at almost any time. However, invalidations of 1092779Srgrimes * mappings must be done as requested. 1102779Srgrimes * 1112779Srgrimes * In order to cope with hardware architectures which make virtual to 1122779Srgrimes * physical map invalidates expensive, this module may delay invalidate 1132779Srgrimes * reduced protection operations until such time as they are actually 1142779Srgrimes * necessary. This module is given full information as to which processors 1151243Srgrimes * are currently using which maps, and to when physical maps must be made 1161194Srgrimes * correct. 1171194Srgrimes */ 1181243Srgrimes 1191243Srgrimes#include <sys/param.h> 120284Srgrimes#include <sys/kernel.h> 1212570Srgrimes#include <sys/ktr.h> 1222570Srgrimes#include <sys/lock.h> 123372Srgrimes#include <sys/msgbuf.h> 1242570Srgrimes#include <sys/mutex.h> 1252779Srgrimes#include <sys/proc.h> 1262779Srgrimes#include <sys/sysctl.h> 127347Srgrimes#include <sys/systm.h> 1281767Sjkh#include <sys/vmmeter.h> 12937Srgrimes 1302538Spst#include <dev/ofw/openfirm.h> 131347Srgrimes 1322538Spst#include <vm/vm.h> 133355Srgrimes#include <vm/vm_param.h> 134372Srgrimes#include <vm/vm_kern.h> 135347Srgrimes#include <vm/vm_page.h> 136355Srgrimes#include <vm/vm_map.h> 137347Srgrimes#include <vm/vm_object.h> 1382538Spst#include <vm/vm_extern.h> 1392538Spst#include <vm/vm_pageout.h> 1402538Spst#include <vm/vm_pager.h> 1412538Spst#include <vm/vm_zone.h> 1422538Spst 143372Srgrimes#include <machine/bat.h> 144347Srgrimes#include <machine/frame.h> 145355Srgrimes#include <machine/md_var.h> 146347Srgrimes#include <machine/psl.h> 147347Srgrimes#include <machine/pte.h> 1482538Spst#include <machine/sr.h> 149147Srgrimes 1501759Sjkh#define PMAP_DEBUG 1511759Sjkh 1521759Sjkh#define TODO panic("%s: not implemented", __func__); 1531759Sjkh 1541759Sjkh#define PMAP_LOCK(pm) 1551731Sjkh#define PMAP_UNLOCK(pm) 1561759Sjkh 1571731Sjkh#define TLBIE(va) __asm __volatile("tlbie %0" :: "r"(va)) 1581759Sjkh#define TLBSYNC() __asm __volatile("tlbsync"); 1591759Sjkh#define SYNC() __asm __volatile("sync"); 16037Srgrimes#define EIEIO() __asm __volatile("eieio"); 1611759Sjkh 162347Srgrimes#define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4)) 1631759Sjkh#define VSID_TO_SR(vsid) ((vsid) & 0xf) 164347Srgrimes#define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff) 1651731Sjkh 1661731Sjkh#define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 16737Srgrimes#define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 1681731Sjkh#define PVO_WIRED 0x0010 /* PVO entry is wired */ 16937Srgrimes#define PVO_MANAGED 0x0020 /* PVO entry is managed */ 1701731Sjkh#define PVO_EXECUTABLE 0x0040 /* PVO entry is executable */ 17137Srgrimes#define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 1721731Sjkh#define PVO_ISEXECUTABLE(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 17337Srgrimes#define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 17437Srgrimes#define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 17537Srgrimes#define PVO_PTEGIDX_CLR(pvo) \ 17637Srgrimes ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 1771731Sjkh#define PVO_PTEGIDX_SET(pvo, i) \ 1781731Sjkh ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 1791731Sjkh 1801731Sjkh#define PMAP_PVO_CHECK(pvo) 18137Srgrimes 18237Srgrimesstruct mem_region { 183147Srgrimes vm_offset_t mr_start; 184147Srgrimes vm_offset_t mr_size; 18537Srgrimes}; 186147Srgrimes 18737Srgrimesstruct ofw_map { 18837Srgrimes vm_offset_t om_va; 18937Srgrimes vm_size_t om_len; 190288Srgrimes vm_offset_t om_pa; 191288Srgrimes u_int om_mode; 192147Srgrimes}; 19337Srgrimes 194147Srgrimesint pmap_bootstrapped = 0; 195147Srgrimes 19637Srgrimes/* 1971759Sjkh * Virtual and physical address of message buffer. 1981759Sjkh */ 1991759Sjkhstruct msgbuf *msgbufp; 2001759Sjkhvm_offset_t msgbuf_phys; 201347Srgrimes 2022538Spst/* 2032538Spst * Physical addresses of first and last available physical page. 204347Srgrimes */ 2052538Spstvm_offset_t avail_start; 2061775Sjkhvm_offset_t avail_end; 207347Srgrimes 2081759Sjkh/* 209355Srgrimes * Map of physical memory regions. 210277Srgrimes */ 2111126Srgrimesvm_offset_t phys_avail[128]; 2121126Srgrimesu_int phys_avail_count; 2131731Sjkhstatic struct mem_region regions[128]; 214238Srootstatic struct ofw_map translations[128]; 2151759Sjkhstatic int translations_size; 2161731Sjkh 2171759Sjkh/* 218333Srgrimes * First and last available kernel virtual addresses. 2191759Sjkh */ 2201759Sjkhvm_offset_t virtual_avail; 221168Srgrimesvm_offset_t virtual_end; 222333Srgrimesvm_offset_t kernel_vm_end; 2231759Sjkh 2241759Sjkh/* 225333Srgrimes * Kernel pmap. 22637Srgrimes */ 2271731Sjkhstruct pmap kernel_pmap_store; 2282619Srgrimesextern struct pmap ofw_pmap; 2291782Sjkh 2302619Srgrimes/* 2311782Sjkh * PTEG data. 2321731Sjkh */ 2331731Sjkhstatic struct pteg *pmap_pteg_table; 2341731Sjkhu_int pmap_pteg_count; 2352570Srgrimesu_int pmap_pteg_mask; 2362570Srgrimes 2371731Sjkh/* 2382570Srgrimes * PVO data. 2392570Srgrimes */ 2401731Sjkhstruct pvo_head *pmap_pvo_table; /* pvo entries by pteg index */ 2412570Srgrimesstruct pvo_head pmap_pvo_kunmanaged = 2422570Srgrimes LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 2431731Sjkhstruct pvo_head pmap_pvo_unmanaged = 24437Srgrimes LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 2451759Sjkh 2461759Sjkhvm_zone_t pmap_upvo_zone; /* zone for pvo entries for unmanaged pages */ 24737Srgrimesvm_zone_t pmap_mpvo_zone; /* zone for pvo entries for managed pages */ 2481759Sjkhstruct vm_zone pmap_upvo_zone_store; 2491759Sjkhstruct vm_zone pmap_mpvo_zone_store; 2501759Sjkhstruct vm_object pmap_upvo_zone_obj; 2511759Sjkhstruct vm_object pmap_mpvo_zone_obj; 2522779Srgrimes 2532779Srgrimes#define PMAP_PVO_SIZE 1024 2541759Sjkhstruct pvo_entry pmap_upvo_pool[PMAP_PVO_SIZE]; 2552779Srgrimes 2562779Srgrimes#define VSID_NBPW (sizeof(u_int32_t) * 8) 257320Srgrimesstatic u_int pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 258358Srgrimes 2592779Srgrimesstatic boolean_t pmap_initialized = FALSE; 2602779Srgrimes 2611762Sjkh/* 2621027Sache * Statistics. 2631027Sache */ 2641731Sjkhu_int pmap_pte_valid = 0; 265333Srgrimesu_int pmap_pte_overflow = 0; 266284Srgrimesu_int pmap_pte_replacements = 0; 267320Srgrimesu_int pmap_pvo_entries = 0; 2682570Srgrimesu_int pmap_pvo_enter_calls = 0; 269284Srgrimesu_int pmap_pvo_remove_calls = 0; 270320Srgrimesu_int pmap_pte_spills = 0; 2711731SjkhSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_valid, CTLFLAG_RD, &pmap_pte_valid, 2721731Sjkh 0, ""); 2731731SjkhSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_overflow, CTLFLAG_RD, 2741762Sjkh &pmap_pte_overflow, 0, ""); 2751194SrgrimesSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_replacements, CTLFLAG_RD, 2761194Srgrimes &pmap_pte_replacements, 0, ""); 2771194SrgrimesSYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_entries, CTLFLAG_RD, &pmap_pvo_entries, 2781194Srgrimes 0, ""); 279320SrgrimesSYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_enter_calls, CTLFLAG_RD, 2801205Srgrimes &pmap_pvo_enter_calls, 0, ""); 2812570SrgrimesSYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_remove_calls, CTLFLAG_RD, 2821759Sjkh &pmap_pvo_remove_calls, 0, ""); 2832779SrgrimesSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_spills, CTLFLAG_RD, 284277Srgrimes &pmap_pte_spills, 0, ""); 2852779Srgrimes 2862779Srgrimesstruct pvo_entry *pmap_pvo_zeropage; 2871027Sache 2881205Srgrimesvm_offset_t pmap_rkva_start = VM_MIN_KERNEL_ADDRESS; 2892779Srgrimesu_int pmap_rkva_count = 4; 2901205Srgrimes 2911782Sjkh/* 292277Srgrimes * Allocate physical memory for use in pmap_bootstrap. 2931205Srgrimes */ 2942570Srgrimesstatic vm_offset_t pmap_bootstrap_alloc(vm_size_t, u_int); 2951759Sjkh 2962779Srgrimes/* 297320Srgrimes * PTE calls. 2982779Srgrimes */ 2992779Srgrimesstatic int pmap_pte_insert(u_int, struct pte *); 3001027Sache 3011205Srgrimes/* 3022779Srgrimes * PVO calls. 3031205Srgrimes */ 3041782Sjkhstatic int pmap_pvo_enter(pmap_t, vm_zone_t, struct pvo_head *, 305320Srgrimes vm_offset_t, vm_offset_t, u_int, int); 3061285Srgrimesstatic void pmap_pvo_remove(struct pvo_entry *, int); 3072570Srgrimesstatic struct pvo_entry *pmap_pvo_find_va(pmap_t, vm_offset_t, int *); 3081371Srgrimesstatic struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 3091371Srgrimes 3101371Srgrimes/* 3111371Srgrimes * Utility routines. 3121371Srgrimes */ 3131285Srgrimesstatic struct pvo_entry *pmap_rkva_alloc(void); 3141731Sjkhstatic void pmap_pa_map(struct pvo_entry *, vm_offset_t, 3151285Srgrimes struct pte *, int *); 3161731Sjkhstatic void pmap_pa_unmap(struct pvo_entry *, struct pte *, int *); 3171731Sjkhstatic void pmap_syncicache(vm_offset_t, vm_size_t); 3181731Sjkhstatic boolean_t pmap_query_bit(vm_page_t, int); 3191731Sjkhstatic boolean_t pmap_clear_bit(vm_page_t, int); 3201285Srgrimesstatic void tlbia(void); 3211285Srgrimes 3222570Srgrimesstatic __inline int 3231759Sjkhva_to_sr(u_int *sr, vm_offset_t va) 3242779Srgrimes{ 3251285Srgrimes return (sr[(uintptr_t)va >> ADDR_SR_SHFT]); 3262779Srgrimes} 3272779Srgrimes 3281285Srgrimesstatic __inline u_int 3291285Srgrimesva_to_pteg(u_int sr, vm_offset_t addr) 3302779Srgrimes{ 3311285Srgrimes u_int hash; 3321782Sjkh 3331285Srgrimes hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >> 3341285Srgrimes ADDR_PIDX_SHFT); 3352570Srgrimes return (hash & pmap_pteg_mask); 3361759Sjkh} 3372779Srgrimes 3381285Srgrimesstatic __inline struct pvo_head * 3392779Srgrimespa_to_pvoh(vm_offset_t pa) 3402779Srgrimes{ 3411285Srgrimes struct vm_page *pg; 3421285Srgrimes 3432779Srgrimes pg = PHYS_TO_VM_PAGE(pa); 3441285Srgrimes 3451782Sjkh if (pg == NULL) 3461285Srgrimes return (&pmap_pvo_unmanaged); 3471205Srgrimes 3482779Srgrimes return (&pg->md.mdpg_pvoh); 3492779Srgrimes} 350568Srgrimes 3511027Sachestatic __inline struct pvo_head * 3521027Sachevm_page_to_pvoh(vm_page_t m) 3531731Sjkh{ 354333Srgrimes 355284Srgrimes return (&m->md.mdpg_pvoh); 356358Srgrimes} 3572570Srgrimes 358284Srgrimesstatic __inline void 3591194Srgrimespmap_attr_clear(vm_page_t m, int ptebit) 3601243Srgrimes{ 3611194Srgrimes 3621194Srgrimes m->md.mdpg_attrs &= ~ptebit; 3631731Sjkh} 3641731Sjkh 3651731Sjkhstatic __inline int 3661731Sjkhpmap_attr_fetch(vm_page_t m) 3671731Sjkh{ 3681762Sjkh 369284Srgrimes return (m->md.mdpg_attrs); 3701194Srgrimes} 3711194Srgrimes 3721194Srgrimesstatic __inline void 3731194Srgrimespmap_attr_save(vm_page_t m, int ptebit) 374358Srgrimes{ 3751194Srgrimes 376358Srgrimes m->md.mdpg_attrs |= ptebit; 377358Srgrimes} 3781243Srgrimes 379333Srgrimesstatic __inline int 380284Srgrimespmap_pte_compare(const struct pte *pt, const struct pte *pvo_pt) 3812779Srgrimes{ 3822779Srgrimes if (pt->pte_hi == pvo_pt->pte_hi) 3831027Sache return (1); 3841205Srgrimes 3852779Srgrimes return (0); 3861205Srgrimes} 3871782Sjkh 388284Srgrimesstatic __inline int 3891205Srgrimespmap_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which) 3902779Srgrimes{ 3912779Srgrimes return (pt->pte_hi & ~PTE_VALID) == 392568Srgrimes (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 3931027Sache ((va >> ADDR_API_SHFT) & PTE_API) | which); 3941027Sache} 3951731Sjkh 396333Srgrimesstatic __inline void 397284Srgrimespmap_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo) 398358Srgrimes{ 3992779Srgrimes /* 4002779Srgrimes * Construct a PTE. Default to IMB initially. Valid bit only gets 4011769Sjkh * set when the real pte is set in memory. 4021769Sjkh * 4032779Srgrimes * Note: Don't set the valid bit for correct operation of tlb update. 4042779Srgrimes */ 4051769Sjkh pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 4061769Sjkh (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API); 4071769Sjkh pt->pte_lo = pte_lo; 408284Srgrimes} 409444Srgrimes 4101194Srgrimesstatic __inline void 4111194Srgrimespmap_pte_synch(struct pte *pt, struct pte *pvo_pt) 4122779Srgrimes{ 4131769Sjkh 4141731Sjkh pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG); 4151731Sjkh} 4161731Sjkh 4171731Sjkhstatic __inline void 4181731Sjkhpmap_pte_clear(struct pte *pt, vm_offset_t va, int ptebit) 4191731Sjkh{ 420284Srgrimes 4212779Srgrimes /* 4222779Srgrimes * As shown in Section 7.6.3.2.3 4231027Sache */ 4241205Srgrimes pt->pte_lo &= ~ptebit; 4252779Srgrimes TLBIE(va); 4261205Srgrimes EIEIO(); 4271782Sjkh TLBSYNC(); 428284Srgrimes SYNC(); 429372Srgrimes} 430372Srgrimes 431538Srgrimesstatic __inline void 4321782Sjkhpmap_pte_set(struct pte *pt, struct pte *pvo_pt) 433372Srgrimes{ 4341782Sjkh 4352570Srgrimes pvo_pt->pte_hi |= PTE_VALID; 4361782Sjkh 4372570Srgrimes /* 4381782Sjkh * Update the PTE as defined in section 7.6.3.1. 4391782Sjkh * Note that the REF/CHG bits are from pvo_pt and thus should havce 4401782Sjkh * been saved so this routine can restore them (if desired). 441538Srgrimes */ 442376Srgrimes pt->pte_lo = pvo_pt->pte_lo; 4431782Sjkh EIEIO(); 4441782Sjkh pt->pte_hi = pvo_pt->pte_hi; 445376Srgrimes SYNC(); 446538Srgrimes pmap_pte_valid++; 447376Srgrimes} 4481782Sjkh 4492570Srgrimesstatic __inline void 450376Srgrimespmap_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 451538Srgrimes{ 452538Srgrimes 4531782Sjkh pvo_pt->pte_hi &= ~PTE_VALID; 4541782Sjkh 455538Srgrimes /* 456538Srgrimes * Force the reg & chg bits back into the PTEs. 457538Srgrimes */ 4581782Sjkh SYNC(); 4591782Sjkh 460538Srgrimes /* 461538Srgrimes * Invalidate the pte. 462538Srgrimes */ 4631782Sjkh pt->pte_hi &= ~PTE_VALID; 4641782Sjkh 465538Srgrimes SYNC(); 466538Srgrimes TLBIE(va); 467538Srgrimes EIEIO(); 4681782Sjkh TLBSYNC(); 4691782Sjkh SYNC(); 470538Srgrimes 471538Srgrimes /* 472538Srgrimes * Save the reg & chg bits. 4731782Sjkh */ 4741782Sjkh pmap_pte_synch(pt, pvo_pt); 4751782Sjkh pmap_pte_valid--; 476538Srgrimes} 477538Srgrimes 478538Srgrimesstatic __inline void 4791782Sjkhpmap_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 4801782Sjkh{ 481538Srgrimes 482538Srgrimes /* 483538Srgrimes * Invalidate the PTE 4841782Sjkh */ 4851782Sjkh pmap_pte_unset(pt, pvo_pt, va); 486538Srgrimes pmap_pte_set(pt, pvo_pt); 487538Srgrimes} 488538Srgrimes 4891782Sjkh/* 4901782Sjkh * Quick sort callout for comparing memory regions. 491538Srgrimes */ 492538Srgrimesstatic int mr_cmp(const void *a, const void *b); 493538Srgrimesstatic int om_cmp(const void *a, const void *b); 4941782Sjkh 4951782Sjkhstatic int 496538Srgrimesmr_cmp(const void *a, const void *b) 497538Srgrimes{ 498538Srgrimes const struct mem_region *regiona; 4991782Sjkh const struct mem_region *regionb; 5001782Sjkh 501538Srgrimes regiona = a; 502538Srgrimes regionb = b; 503538Srgrimes if (regiona->mr_start < regionb->mr_start) 5041782Sjkh return (-1); 5051782Sjkh else if (regiona->mr_start > regionb->mr_start) 506538Srgrimes return (1); 507538Srgrimes else 508538Srgrimes return (0); 5091782Sjkh} 5101782Sjkh 511538Srgrimesstatic int 5122619Srgrimesom_cmp(const void *a, const void *b) 5131782Sjkh{ 5141782Sjkh const struct ofw_map *mapa; 5151782Sjkh const struct ofw_map *mapb; 516538Srgrimes 517372Srgrimes mapa = a; 518372Srgrimes mapb = b; 519372Srgrimes if (mapa->om_pa < mapb->om_pa) 520372Srgrimes return (-1); 521372Srgrimes else if (mapa->om_pa > mapb->om_pa) 522372Srgrimes return (1); 523372Srgrimes else 524372Srgrimes return (0); 525372Srgrimes} 526372Srgrimes 527372Srgrimesvoid 528372Srgrimespmap_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) 529372Srgrimes{ 530372Srgrimes ihandle_t pmem, mmui; 531372Srgrimes phandle_t chosen, mmu; 532372Srgrimes int sz; 533372Srgrimes int i, j; 534372Srgrimes vm_size_t size; 535372Srgrimes vm_offset_t pa, va, off; 536372Srgrimes u_int batl, batu; 537372Srgrimes 538372Srgrimes /* 539372Srgrimes * Use an IBAT and a DBAT to map the bottom segment of memory 540372Srgrimes * where we are. 541372Srgrimes */ 542372Srgrimes batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 543372Srgrimes batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 544538Srgrimes __asm ("mtibatu 0,%0; mtibatl 0,%1; mtdbatu 0,%0; mtdbatl 0,%1" 5451782Sjkh :: "r"(batu), "r"(batl)); 546372Srgrimes#if 0 547372Srgrimes batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 548147Srgrimes batl = BATL(0x80000000, BAT_M, BAT_PP_RW); 5492779Srgrimes __asm ("mtibatu 1,%0; mtibatl 1,%1; mtdbatu 1,%0; mtdbatl 1,%1" 5502779Srgrimes :: "r"(batu), "r"(batl)); 5512779Srgrimes#endif 5522779Srgrimes 5532779Srgrimes /* 5542779Srgrimes * Set the start and end of kva. 5552779Srgrimes */ 556372Srgrimes virtual_avail = VM_MIN_KERNEL_ADDRESS; 5572779Srgrimes virtual_end = VM_MAX_KERNEL_ADDRESS; 558372Srgrimes 559410Srgrimes if ((pmem = OF_finddevice("/memory")) == -1) 560147Srgrimes panic("pmap_bootstrap: can't locate memory device"); 5611285Srgrimes if ((sz = OF_getproplen(pmem, "available")) == -1) 5621285Srgrimes panic("pmap_bootstrap: can't get length of available memory"); 563372Srgrimes if (sizeof(phys_avail) < sz) 5641731Sjkh panic("pmap_bootstrap: phys_avail too small"); 5651769Sjkh if (sizeof(regions) < sz) 5661731Sjkh panic("pmap_bootstrap: regions too small"); 567372Srgrimes bzero(regions, sz); 5682779Srgrimes if (OF_getprop(pmem, "available", regions, sz) == -1) 5692611Srgrimes panic("pmap_bootstrap: can't get available memory"); 5702779Srgrimes sz /= sizeof(*regions); 571372Srgrimes CTR0(KTR_PMAP, "pmap_bootstrap: physical memory"); 57237Srgrimes qsort(regions, sz, sizeof(*regions), mr_cmp); 573 phys_avail_count = 0; 574 for (i = 0, j = 0; i < sz; i++, j += 2) { 575 CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start, 576 regions[i].mr_start + regions[i].mr_size, 577 regions[i].mr_size); 578 phys_avail[j] = regions[i].mr_start; 579 phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; 580 phys_avail_count++; 581 } 582 583 /* 584 * Allocate PTEG table. 585 */ 586#ifdef PTEGCOUNT 587 pmap_pteg_count = PTEGCOUNT; 588#else 589 pmap_pteg_count = 0x1000; 590 591 while (pmap_pteg_count < physmem) 592 pmap_pteg_count <<= 1; 593 594 pmap_pteg_count >>= 1; 595#endif /* PTEGCOUNT */ 596 597 size = pmap_pteg_count * sizeof(struct pteg); 598 CTR2(KTR_PMAP, "pmap_bootstrap: %d PTEGs, %d bytes", pmap_pteg_count, 599 size); 600 pmap_pteg_table = (struct pteg *)pmap_bootstrap_alloc(size, size); 601 CTR1(KTR_PMAP, "pmap_bootstrap: PTEG table at %p", pmap_pteg_table); 602 bzero((void *)pmap_pteg_table, pmap_pteg_count * sizeof(struct pteg)); 603 pmap_pteg_mask = pmap_pteg_count - 1; 604 605 /* 606 * Allocate PTE overflow lists. 607 */ 608 size = sizeof(struct pvo_head) * pmap_pteg_count; 609 pmap_pvo_table = (struct pvo_head *)pmap_bootstrap_alloc(size, 610 PAGE_SIZE); 611 CTR1(KTR_PMAP, "pmap_bootstrap: PVO table at %p", pmap_pvo_table); 612 for (i = 0; i < pmap_pteg_count; i++) 613 LIST_INIT(&pmap_pvo_table[i]); 614 615 /* 616 * Allocate the message buffer. 617 */ 618 msgbuf_phys = pmap_bootstrap_alloc(MSGBUF_SIZE, 0); 619 620 /* 621 * Initialise the unmanaged pvo pool. 622 */ 623 pmap_upvo_zone = &pmap_upvo_zone_store; 624 zbootinit(pmap_upvo_zone, "unmanaged pvo", sizeof (struct pvo_entry), 625 pmap_upvo_pool, PMAP_PVO_SIZE); 626 627 /* 628 * Make sure kernel vsid is allocated as well as VSID 0. 629 */ 630 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW] 631 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 632 pmap_vsid_bitmap[0] |= 1; 633 634 /* 635 * Set up the OpenFirmware pmap and add it's mappings. 636 */ 637 pmap_pinit(&ofw_pmap); 638 ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 639 if ((chosen = OF_finddevice("/chosen")) == -1) 640 panic("pmap_bootstrap: can't find /chosen"); 641 OF_getprop(chosen, "mmu", &mmui, 4); 642 if ((mmu = OF_instance_to_package(mmui)) == -1) 643 panic("pmap_bootstrap: can't get mmu package"); 644 if ((sz = OF_getproplen(mmu, "translations")) == -1) 645 panic("pmap_bootstrap: can't get ofw translation count"); 646 if (sizeof(translations) < sz) 647 panic("pmap_bootstrap: translations too small"); 648 bzero(translations, sz); 649 if (OF_getprop(mmu, "translations", translations, sz) == -1) 650 panic("pmap_bootstrap: can't get ofw translations"); 651 CTR0(KTR_PMAP, "pmap_bootstrap: translations"); 652 qsort(translations, sz, sizeof (*translations), om_cmp); 653 for (i = 0; i < sz; i++) { 654 CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x", 655 translations[i].om_pa, translations[i].om_va, 656 translations[i].om_len); 657 658 /* Drop stuff below something? */ 659 660 /* Enter the pages? */ 661 for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) { 662 struct vm_page m; 663 664 m.phys_addr = translations[i].om_pa + off; 665 pmap_enter(&ofw_pmap, translations[i].om_va + off, &m, 666 VM_PROT_ALL, 1); 667 } 668 } 669#ifdef SMP 670 TLBSYNC(); 671#endif 672 673 /* 674 * Initialize the kernel pmap (which is statically allocated). 675 */ 676 for (i = 0; i < 16; i++) { 677 kernel_pmap->pm_sr[i] = EMPTY_SEGMENT; 678 } 679 kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 680 kernel_pmap->pm_active = ~0; 681 kernel_pmap->pm_count = 1; 682 683 /* 684 * Allocate a kernel stack with a guard page for thread0 and map it 685 * into the kernel page map. 686 */ 687 pa = pmap_bootstrap_alloc(KSTACK_PAGES * PAGE_SIZE, 0); 688 kstack0_phys = pa; 689 kstack0 = virtual_avail + (KSTACK_GUARD_PAGES * PAGE_SIZE); 690 CTR2(KTR_PMAP, "pmap_bootstrap: kstack0 at %#x (%#x)", kstack0_phys, 691 kstack0); 692 virtual_avail += (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE; 693 for (i = 0; i < KSTACK_PAGES; i++) { 694 pa = kstack0_phys + i * PAGE_SIZE; 695 va = kstack0 + i * PAGE_SIZE; 696 pmap_kenter(va, pa); 697 TLBIE(va); 698 } 699 700 /* 701 * Calculate the first and last available physical addresses. 702 */ 703 avail_start = phys_avail[0]; 704 for (i = 0; phys_avail[i + 2] != 0; i += 2) 705 ; 706 avail_end = phys_avail[i + 1]; 707 Maxmem = powerpc_btop(avail_end); 708 709 /* 710 * Allocate virtual address space for the message buffer. 711 */ 712 msgbufp = (struct msgbuf *)virtual_avail; 713 virtual_avail += round_page(MSGBUF_SIZE); 714 715 /* 716 * Initialize hardware. 717 */ 718 for (i = 0; i < 16; i++) { 719 __asm __volatile("mtsrin %0,%1" 720 :: "r"(EMPTY_SEGMENT), "r"(i << ADDR_SR_SHFT)); 721 } 722 __asm __volatile ("mtsr %0,%1" 723 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 724 __asm __volatile ("sync; mtsdr1 %0; isync" 725 :: "r"((u_int)pmap_pteg_table | (pmap_pteg_mask >> 10))); 726 tlbia(); 727 728 pmap_bootstrapped++; 729} 730 731/* 732 * Activate a user pmap. The pmap must be activated before it's address 733 * space can be accessed in any way. 734 */ 735void 736pmap_activate(struct thread *td) 737{ 738 pmap_t pm; 739 int i; 740 741 /* 742 * Load all the data we need up front to encourasge the compiler to 743 * not issue any loads while we have interrupts disabled below. 744 */ 745 pm = &td->td_proc->p_vmspace->vm_pmap; 746 747 KASSERT(pm->pm_active == 0, ("pmap_activate: pmap already active?")); 748 749 pm->pm_active |= PCPU_GET(cpumask); 750 751 /* 752 * XXX: Address this again later? 753 */ 754 critical_enter(); 755 756 for (i = 0; i < 16; i++) { 757 __asm __volatile("mtsr %0,%1" :: "r"(i), "r"(pm->pm_sr[i])); 758 } 759 __asm __volatile("sync; isync"); 760 761 critical_exit(); 762} 763 764vm_offset_t 765pmap_addr_hint(vm_object_t object, vm_offset_t va, vm_size_t size) 766{ 767 TODO; 768 return (0); 769} 770 771void 772pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 773{ 774 TODO; 775} 776 777void 778pmap_clear_modify(vm_page_t m) 779{ 780 781 if (m->flags * PG_FICTITIOUS) 782 return; 783 pmap_clear_bit(m, PTE_CHG); 784} 785 786void 787pmap_collect(void) 788{ 789 TODO; 790} 791 792void 793pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, 794 vm_size_t len, vm_offset_t src_addr) 795{ 796 TODO; 797} 798 799void 800pmap_copy_page(vm_offset_t src, vm_offset_t dst) 801{ 802 TODO; 803} 804 805/* 806 * Zero a page of physical memory by temporarily mapping it into the tlb. 807 */ 808void 809pmap_zero_page(vm_offset_t pa) 810{ 811 caddr_t va; 812 int i; 813 814 if (pa < SEGMENT_LENGTH) { 815 va = (caddr_t) pa; 816 } else if (pmap_initialized) { 817 if (pmap_pvo_zeropage == NULL) 818 pmap_pvo_zeropage = pmap_rkva_alloc(); 819 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 820 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 821 } else { 822 panic("pmap_zero_page: can't zero pa %#x", pa); 823 } 824 825 bzero(va, PAGE_SIZE); 826 827 for (i = PAGE_SIZE / CACHELINESIZE; i > 0; i--) { 828 __asm __volatile("dcbz 0,%0" :: "r"(va)); 829 va += CACHELINESIZE; 830 } 831 832 if (pa >= SEGMENT_LENGTH) 833 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 834} 835 836void 837pmap_zero_page_area(vm_offset_t pa, int off, int size) 838{ 839 TODO; 840} 841 842/* 843 * Map the given physical page at the specified virtual address in the 844 * target pmap with the protection requested. If specified the page 845 * will be wired down. 846 */ 847void 848pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 849 boolean_t wired) 850{ 851 struct pvo_head *pvo_head; 852 vm_zone_t zone; 853 u_int pte_lo, pvo_flags; 854 int error; 855 856 if (!pmap_initialized) { 857 pvo_head = &pmap_pvo_kunmanaged; 858 zone = pmap_upvo_zone; 859 pvo_flags = 0; 860 } else { 861 pvo_head = pa_to_pvoh(m->phys_addr); 862 zone = pmap_mpvo_zone; 863 pvo_flags = PVO_MANAGED; 864 } 865 866 pte_lo = PTE_I | PTE_G; 867 868 if (prot & VM_PROT_WRITE) 869 pte_lo |= PTE_BW; 870 else 871 pte_lo |= PTE_BR; 872 873 if (prot & VM_PROT_EXECUTE) 874 pvo_flags |= PVO_EXECUTABLE; 875 876 if (wired) 877 pvo_flags |= PVO_WIRED; 878 879 error = pmap_pvo_enter(pmap, zone, pvo_head, va, m->phys_addr, pte_lo, 880 pvo_flags); 881 882 if (error == ENOENT) { 883 /* 884 * Flush the real memory from the cache. 885 */ 886 if ((pvo_flags & PVO_EXECUTABLE) && (pte_lo & PTE_I) == 0) { 887 pmap_syncicache(m->phys_addr, PAGE_SIZE); 888 } 889 } 890} 891 892vm_offset_t 893pmap_extract(pmap_t pmap, vm_offset_t va) 894{ 895 TODO; 896 return (0); 897} 898 899/* 900 * Grow the number of kernel page table entries. Unneeded. 901 */ 902void 903pmap_growkernel(vm_offset_t addr) 904{ 905} 906 907void 908pmap_init(vm_offset_t phys_start, vm_offset_t phys_end) 909{ 910 911 CTR(KTR_PMAP, "pmap_init"); 912} 913 914void 915pmap_init2(void) 916{ 917 918 CTR(KTR_PMAP, "pmap_init2"); 919 zinitna(pmap_upvo_zone, &pmap_upvo_zone_obj, NULL, 0, PMAP_PVO_SIZE, 920 ZONE_INTERRUPT, 1); 921 pmap_mpvo_zone = zinit("managed pvo", sizeof(struct pvo_entry), 922 PMAP_PVO_SIZE, ZONE_INTERRUPT, 1); 923 pmap_initialized = TRUE; 924} 925 926boolean_t 927pmap_is_modified(vm_page_t m) 928{ 929 TODO; 930 return (0); 931} 932 933void 934pmap_clear_reference(vm_page_t m) 935{ 936 TODO; 937} 938 939/* 940 * pmap_ts_referenced: 941 * 942 * Return a count of reference bits for a page, clearing those bits. 943 * It is not necessary for every reference bit to be cleared, but it 944 * is necessary that 0 only be returned when there are truly no 945 * reference bits set. 946 * 947 * XXX: The exact number of bits to check and clear is a matter that 948 * should be tested and standardized at some point in the future for 949 * optimal aging of shared pages. 950 */ 951 952int 953pmap_ts_referenced(vm_page_t m) 954{ 955 TODO; 956 return (0); 957} 958 959/* 960 * Map a wired page into kernel virtual address space. 961 */ 962void 963pmap_kenter(vm_offset_t va, vm_offset_t pa) 964{ 965 u_int pte_lo; 966 int error; 967 int i; 968 969#if 0 970 if (va < VM_MIN_KERNEL_ADDRESS) 971 panic("pmap_kenter: attempt to enter non-kernel address %#x", 972 va); 973#endif 974 975 pte_lo = PTE_I | PTE_G | PTE_BW; 976 for (i = 0; phys_avail[i + 2] != 0; i += 2) { 977 if (pa >= phys_avail[i] && pa < phys_avail[i + 1]) { 978 pte_lo &= ~(PTE_I | PTE_G); 979 break; 980 } 981 } 982 983 error = pmap_pvo_enter(kernel_pmap, pmap_upvo_zone, 984 &pmap_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED); 985 986 if (error != 0 && error != ENOENT) 987 panic("pmap_kenter: failed to enter va %#x pa %#x: %d", va, 988 pa, error); 989 990 /* 991 * Flush the real memory from the instruction cache. 992 */ 993 if ((pte_lo & (PTE_I | PTE_G)) == 0) { 994 pmap_syncicache(pa, PAGE_SIZE); 995 } 996} 997 998vm_offset_t 999pmap_kextract(vm_offset_t va) 1000{ 1001 TODO; 1002 return (0); 1003} 1004 1005/* 1006 * Remove a wired page from kernel virtual address space. 1007 */ 1008void 1009pmap_kremove(vm_offset_t va) 1010{ 1011 1012 pmap_remove(kernel_pmap, va, roundup(va, PAGE_SIZE)); 1013} 1014 1015/* 1016 * Map a range of physical addresses into kernel virtual address space. 1017 * 1018 * The value passed in *virt is a suggested virtual address for the mapping. 1019 * Architectures which can support a direct-mapped physical to virtual region 1020 * can return the appropriate address within that region, leaving '*virt' 1021 * unchanged. We cannot and therefore do not; *virt is updated with the 1022 * first usable address after the mapped region. 1023 */ 1024vm_offset_t 1025pmap_map(vm_offset_t *virt, vm_offset_t pa_start, vm_offset_t pa_end, int prot) 1026{ 1027 vm_offset_t sva, va; 1028 1029 sva = *virt; 1030 va = sva; 1031 for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE) 1032 pmap_kenter(va, pa_start); 1033 *virt = va; 1034 return (sva); 1035} 1036 1037int 1038pmap_mincore(pmap_t pmap, vm_offset_t addr) 1039{ 1040 TODO; 1041 return (0); 1042} 1043 1044/* 1045 * Create the uarea for a new process. 1046 * This routine directly affects the fork perf for a process. 1047 */ 1048void 1049pmap_new_proc(struct proc *p) 1050{ 1051 vm_object_t upobj; 1052 vm_offset_t up; 1053 vm_page_t m; 1054 u_int i; 1055 1056 /* 1057 * Allocate the object for the upages. 1058 */ 1059 upobj = p->p_upages_obj; 1060 if (upobj == NULL) { 1061 upobj = vm_object_allocate(OBJT_DEFAULT, UAREA_PAGES); 1062 p->p_upages_obj = upobj; 1063 } 1064 1065 /* 1066 * Get a kernel virtual address for the uarea for this process. 1067 */ 1068 up = (vm_offset_t)p->p_uarea; 1069 if (up == 0) { 1070 up = kmem_alloc_nofault(kernel_map, UAREA_PAGES * PAGE_SIZE); 1071 if (up == 0) 1072 panic("pmap_new_proc: upage allocation failed"); 1073 p->p_uarea = (struct user *)up; 1074 } 1075 1076 for (i = 0; i < UAREA_PAGES; i++) { 1077 /* 1078 * Get a uarea page. 1079 */ 1080 m = vm_page_grab(upobj, i, VM_ALLOC_NORMAL | VM_ALLOC_RETRY); 1081 1082 /* 1083 * Wire the page. 1084 */ 1085 m->wire_count++; 1086 1087 /* 1088 * Enter the page into the kernel address space. 1089 */ 1090 pmap_kenter(up + i * PAGE_SIZE, VM_PAGE_TO_PHYS(m)); 1091 1092 vm_page_wakeup(m); 1093 vm_page_flag_clear(m, PG_ZERO); 1094 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE); 1095 m->valid = VM_PAGE_BITS_ALL; 1096 } 1097} 1098 1099void 1100pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object, 1101 vm_pindex_t pindex, vm_size_t size, int limit) 1102{ 1103 TODO; 1104} 1105 1106/* 1107 * Lower the permission for all mappings to a given page. 1108 */ 1109void 1110pmap_page_protect(vm_page_t m, vm_prot_t prot) 1111{ 1112 struct pvo_head *pvo_head; 1113 struct pvo_entry *pvo, *next_pvo; 1114 struct pte *pt; 1115 1116 /* 1117 * Since the routine only downgrades protection, if the 1118 * maximal protection is desired, there isn't any change 1119 * to be made. 1120 */ 1121 if ((prot & (VM_PROT_READ|VM_PROT_WRITE)) == 1122 (VM_PROT_READ|VM_PROT_WRITE)) 1123 return; 1124 1125 pvo_head = vm_page_to_pvoh(m); 1126 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 1127 next_pvo = LIST_NEXT(pvo, pvo_vlink); 1128 PMAP_PVO_CHECK(pvo); /* sanity check */ 1129 1130 /* 1131 * Downgrading to no mapping at all, we just remove the entry. 1132 */ 1133 if ((prot & VM_PROT_READ) == 0) { 1134 pmap_pvo_remove(pvo, -1); 1135 continue; 1136 } 1137 1138 /* 1139 * If EXEC permission is being revoked, just clear the flag 1140 * in the PVO. 1141 */ 1142 if ((prot & VM_PROT_EXECUTE) == 0) 1143 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1144 1145 /* 1146 * If this entry is already RO, don't diddle with the page 1147 * table. 1148 */ 1149 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 1150 PMAP_PVO_CHECK(pvo); 1151 continue; 1152 } 1153 1154 /* 1155 * Grab the PTE before we diddle the bits so pvo_to_pte can 1156 * verify the pte contents are as expected. 1157 */ 1158 pt = pmap_pvo_to_pte(pvo, -1); 1159 pvo->pvo_pte.pte_lo &= ~PTE_PP; 1160 pvo->pvo_pte.pte_lo |= PTE_BR; 1161 if (pt != NULL) 1162 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1163 PMAP_PVO_CHECK(pvo); /* sanity check */ 1164 } 1165} 1166 1167/* 1168 * Make the specified page pageable (or not). Unneeded. 1169 */ 1170void 1171pmap_pageable(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, 1172 boolean_t pageable) 1173{ 1174} 1175 1176/* 1177 * Returns true if the pmap's pv is one of the first 1178 * 16 pvs linked to from this page. This count may 1179 * be changed upwards or downwards in the future; it 1180 * is only necessary that true be returned for a small 1181 * subset of pmaps for proper page aging. 1182 */ 1183boolean_t 1184pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 1185{ 1186 TODO; 1187 return (0); 1188} 1189 1190static u_int pmap_vsidcontext; 1191 1192void 1193pmap_pinit(pmap_t pmap) 1194{ 1195 int i, mask; 1196 u_int entropy; 1197 1198 entropy = 0; 1199 __asm __volatile("mftb %0" : "=r"(entropy)); 1200 1201 /* 1202 * Allocate some segment registers for this pmap. 1203 */ 1204 pmap->pm_count = 1; 1205 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1206 u_int hash, n; 1207 1208 /* 1209 * Create a new value by mutiplying by a prime and adding in 1210 * entropy from the timebase register. This is to make the 1211 * VSID more random so that the PT hash function collides 1212 * less often. (Note that the prime casues gcc to do shifts 1213 * instead of a multiply.) 1214 */ 1215 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1216 hash = pmap_vsidcontext & (NPMAPS - 1); 1217 if (hash == 0) /* 0 is special, avoid it */ 1218 continue; 1219 n = hash >> 5; 1220 mask = 1 << (hash & (VSID_NBPW - 1)); 1221 hash = (pmap_vsidcontext & 0xfffff); 1222 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1223 /* anything free in this bucket? */ 1224 if (pmap_vsid_bitmap[n] == 0xffffffff) { 1225 entropy = (pmap_vsidcontext >> 20); 1226 continue; 1227 } 1228 i = ffs(~pmap_vsid_bitmap[i]) - 1; 1229 mask = 1 << i; 1230 hash &= 0xfffff & ~(VSID_NBPW - 1); 1231 hash |= i; 1232 } 1233 pmap_vsid_bitmap[n] |= mask; 1234 for (i = 0; i < 16; i++) 1235 pmap->pm_sr[i] = VSID_MAKE(i, hash); 1236 return; 1237 } 1238 1239 panic("pmap_pinit: out of segments"); 1240} 1241 1242/* 1243 * Initialize the pmap associated with process 0. 1244 */ 1245void 1246pmap_pinit0(pmap_t pm) 1247{ 1248 1249 pmap_pinit(pm); 1250 bzero(&pm->pm_stats, sizeof(pm->pm_stats)); 1251} 1252 1253void 1254pmap_pinit2(pmap_t pmap) 1255{ 1256 /* XXX: Remove this stub when no longer called */ 1257} 1258 1259void 1260pmap_prefault(pmap_t pmap, vm_offset_t va, vm_map_entry_t entry) 1261{ 1262 TODO; 1263} 1264 1265void 1266pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 1267{ 1268 TODO; 1269} 1270 1271vm_offset_t 1272pmap_phys_address(int ppn) 1273{ 1274 TODO; 1275 return (0); 1276} 1277 1278/* 1279 * Map a list of wired pages into kernel virtual address space. This is 1280 * intended for temporary mappings which do not need page modification or 1281 * references recorded. Existing mappings in the region are overwritten. 1282 */ 1283void 1284pmap_qenter(vm_offset_t va, vm_page_t *m, int count) 1285{ 1286 int i; 1287 1288 for (i = 0; i < count; i++, va += PAGE_SIZE) 1289 pmap_kenter(va, VM_PAGE_TO_PHYS(m[i])); 1290} 1291 1292/* 1293 * Remove page mappings from kernel virtual address space. Intended for 1294 * temporary mappings entered by pmap_qenter. 1295 */ 1296void 1297pmap_qremove(vm_offset_t va, int count) 1298{ 1299 int i; 1300 1301 for (i = 0; i < count; i++, va += PAGE_SIZE) 1302 pmap_kremove(va); 1303} 1304 1305/* 1306 * Add a reference to the specified pmap. 1307 */ 1308void 1309pmap_reference(pmap_t pm) 1310{ 1311 1312 if (pm != NULL) 1313 pm->pm_count++; 1314} 1315 1316void 1317pmap_release(pmap_t pmap) 1318{ 1319 TODO; 1320} 1321 1322/* 1323 * Remove the given range of addresses from the specified map. 1324 */ 1325void 1326pmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 1327{ 1328 struct pvo_entry *pvo; 1329 int pteidx; 1330 1331 for (; sva < eva; sva += PAGE_SIZE) { 1332 pvo = pmap_pvo_find_va(pm, sva, &pteidx); 1333 if (pvo != NULL) { 1334 pmap_pvo_remove(pvo, pteidx); 1335 } 1336 } 1337} 1338 1339void 1340pmap_remove_pages(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 1341{ 1342 TODO; 1343} 1344 1345void 1346pmap_swapin_proc(struct proc *p) 1347{ 1348 TODO; 1349} 1350 1351void 1352pmap_swapout_proc(struct proc *p) 1353{ 1354 TODO; 1355} 1356 1357/* 1358 * Create the kernel stack and pcb for a new thread. 1359 * This routine directly affects the fork perf for a process and 1360 * create performance for a thread. 1361 */ 1362void 1363pmap_new_thread(struct thread *td) 1364{ 1365 vm_object_t ksobj; 1366 vm_offset_t ks; 1367 vm_page_t m; 1368 u_int i; 1369 1370 /* 1371 * Allocate object for the kstack. 1372 */ 1373 ksobj = td->td_kstack_obj; 1374 if (ksobj == NULL) { 1375 ksobj = vm_object_allocate(OBJT_DEFAULT, KSTACK_PAGES); 1376 td->td_kstack_obj = ksobj; 1377 } 1378 1379 /* 1380 * Get a kernel virtual address for the kstack for this thread. 1381 */ 1382 ks = td->td_kstack; 1383 if (ks == 0) { 1384 ks = kmem_alloc_nofault(kernel_map, 1385 (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE); 1386 if (ks == 0) 1387 panic("pmap_new_thread: kstack allocation failed"); 1388 TLBIE(ks); 1389 ks += KSTACK_GUARD_PAGES * PAGE_SIZE; 1390 td->td_kstack = ks; 1391 } 1392 1393 for (i = 0; i < KSTACK_PAGES; i++) { 1394 /* 1395 * Get a kernel stack page. 1396 */ 1397 m = vm_page_grab(ksobj, i, VM_ALLOC_NORMAL | VM_ALLOC_RETRY); 1398 1399 /* 1400 * Wire the page. 1401 */ 1402 m->wire_count++; 1403 1404 /* 1405 * Enter the page into the kernel address space. 1406 */ 1407 pmap_kenter(ks + i * PAGE_SIZE, VM_PAGE_TO_PHYS(m)); 1408 1409 vm_page_wakeup(m); 1410 vm_page_flag_clear(m, PG_ZERO); 1411 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE); 1412 m->valid = VM_PAGE_BITS_ALL; 1413 } 1414} 1415 1416void 1417pmap_dispose_proc(struct proc *p) 1418{ 1419 TODO; 1420} 1421 1422void 1423pmap_dispose_thread(struct thread *td) 1424{ 1425 TODO; 1426} 1427 1428void 1429pmap_swapin_thread(struct thread *td) 1430{ 1431 TODO; 1432} 1433 1434void 1435pmap_swapout_thread(struct thread *td) 1436{ 1437 TODO; 1438} 1439 1440/* 1441 * Allocate a physical page of memory directly from the phys_avail map. 1442 * Can only be called from pmap_bootstrap before avail start and end are 1443 * calculated. 1444 */ 1445static vm_offset_t 1446pmap_bootstrap_alloc(vm_size_t size, u_int align) 1447{ 1448 vm_offset_t s, e; 1449 int i, j; 1450 1451 size = round_page(size); 1452 for (i = 0; phys_avail[i + 1] != 0; i += 2) { 1453 if (align != 0) 1454 s = (phys_avail[i] + align - 1) & ~(align - 1); 1455 else 1456 s = phys_avail[i]; 1457 e = s + size; 1458 1459 if (s < phys_avail[i] || e > phys_avail[i + 1]) 1460 continue; 1461 1462 if (s == phys_avail[i]) { 1463 phys_avail[i] += size; 1464 } else if (e == phys_avail[i + 1]) { 1465 phys_avail[i + 1] -= size; 1466 } else { 1467 for (j = phys_avail_count * 2; j > i; j -= 2) { 1468 phys_avail[j] = phys_avail[j - 2]; 1469 phys_avail[j + 1] = phys_avail[j - 1]; 1470 } 1471 1472 phys_avail[i + 3] = phys_avail[i + 1]; 1473 phys_avail[i + 1] = s; 1474 phys_avail[i + 2] = e; 1475 phys_avail_count++; 1476 } 1477 1478 return (s); 1479 } 1480 panic("pmap_bootstrap_alloc: could not allocate memory"); 1481} 1482 1483/* 1484 * Return an unmapped pvo for a kernel virtual address. 1485 * Used by pmap functions that operate on physical pages. 1486 */ 1487static struct pvo_entry * 1488pmap_rkva_alloc(void) 1489{ 1490 struct pvo_entry *pvo; 1491 struct pte *pt; 1492 vm_offset_t kva; 1493 int pteidx; 1494 1495 if (pmap_rkva_count == 0) 1496 panic("pmap_rkva_alloc: no more reserved KVAs"); 1497 1498 kva = pmap_rkva_start + (PAGE_SIZE * --pmap_rkva_count); 1499 pmap_kenter(kva, 0); 1500 1501 pvo = pmap_pvo_find_va(kernel_pmap, kva, &pteidx); 1502 1503 if (pvo == NULL) 1504 panic("pmap_kva_alloc: pmap_pvo_find_va failed"); 1505 1506 pt = pmap_pvo_to_pte(pvo, pteidx); 1507 1508 if (pt == NULL) 1509 panic("pmap_kva_alloc: pmap_pvo_to_pte failed"); 1510 1511 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1512 PVO_PTEGIDX_CLR(pvo); 1513 1514 pmap_pte_overflow++; 1515 1516 return (pvo); 1517} 1518 1519static void 1520pmap_pa_map(struct pvo_entry *pvo, vm_offset_t pa, struct pte *saved_pt, 1521 int *depth_p) 1522{ 1523 struct pte *pt; 1524 1525 /* 1526 * If this pvo already has a valid pte, we need to save it so it can 1527 * be restored later. We then just reload the new PTE over the old 1528 * slot. 1529 */ 1530 if (saved_pt != NULL) { 1531 pt = pmap_pvo_to_pte(pvo, -1); 1532 1533 if (pt != NULL) { 1534 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1535 PVO_PTEGIDX_CLR(pvo); 1536 pmap_pte_overflow++; 1537 } 1538 1539 *saved_pt = pvo->pvo_pte; 1540 1541 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1542 } 1543 1544 pvo->pvo_pte.pte_lo |= pa; 1545 1546 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1547 panic("pmap_pa_map: could not spill pvo %p", pvo); 1548 1549 if (depth_p != NULL) 1550 (*depth_p)++; 1551} 1552 1553static void 1554pmap_pa_unmap(struct pvo_entry *pvo, struct pte *saved_pt, int *depth_p) 1555{ 1556 struct pte *pt; 1557 1558 pt = pmap_pvo_to_pte(pvo, -1); 1559 1560 if (pt != NULL) { 1561 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1562 PVO_PTEGIDX_CLR(pvo); 1563 pmap_pte_overflow++; 1564 } 1565 1566 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1567 1568 /* 1569 * If there is a saved PTE and it's valid, restore it and return. 1570 */ 1571 if (saved_pt != NULL && (saved_pt->pte_lo & PTE_RPGN) != 0) { 1572 if (depth_p != NULL && --(*depth_p) == 0) 1573 panic("pmap_pa_unmap: restoring but depth == 0"); 1574 1575 pvo->pvo_pte = *saved_pt; 1576 1577 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1578 panic("pmap_pa_unmap: could not spill pvo %p", pvo); 1579 } 1580} 1581 1582static void 1583pmap_syncicache(vm_offset_t pa, vm_size_t len) 1584{ 1585 __syncicache((void *)pa, len); 1586} 1587 1588static void 1589tlbia(void) 1590{ 1591 caddr_t i; 1592 1593 SYNC(); 1594 for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) { 1595 TLBIE(i); 1596 EIEIO(); 1597 } 1598 TLBSYNC(); 1599 SYNC(); 1600} 1601 1602static int 1603pmap_pvo_enter(pmap_t pm, vm_zone_t zone, struct pvo_head *pvo_head, 1604 vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags) 1605{ 1606 struct pvo_entry *pvo; 1607 u_int sr; 1608 int first; 1609 u_int ptegidx; 1610 int i; 1611 1612 pmap_pvo_enter_calls++; 1613 1614 /* 1615 * Compute the PTE Group index. 1616 */ 1617 va &= ~ADDR_POFF; 1618 sr = va_to_sr(pm->pm_sr, va); 1619 ptegidx = va_to_pteg(sr, va); 1620 1621 /* 1622 * Remove any existing mapping for this page. Reuse the pvo entry if 1623 * there is a mapping. 1624 */ 1625 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1626 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1627 pmap_pvo_remove(pvo, -1); 1628 break; 1629 } 1630 } 1631 1632 /* 1633 * If we aren't overwriting a mapping, try to allocate. 1634 */ 1635 pvo = zalloc(zone); 1636 1637 if (pvo == NULL) { 1638 return (ENOMEM); 1639 } 1640 1641 pmap_pvo_entries++; 1642 pvo->pvo_vaddr = va; 1643 pvo->pvo_pmap = pm; 1644 LIST_INSERT_HEAD(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1645 pvo->pvo_vaddr &= ~ADDR_POFF; 1646 if (flags & VM_PROT_EXECUTE) 1647 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1648 if (flags & PVO_WIRED) 1649 pvo->pvo_vaddr |= PVO_WIRED; 1650 if (pvo_head != &pmap_pvo_kunmanaged) 1651 pvo->pvo_vaddr |= PVO_MANAGED; 1652 pmap_pte_create(&pvo->pvo_pte, sr, va, pa | pte_lo); 1653 1654 /* 1655 * Remember if the list was empty and therefore will be the first 1656 * item. 1657 */ 1658 first = LIST_FIRST(pvo_head) == NULL; 1659 1660 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1661 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1662 pvo->pvo_pmap->pm_stats.wired_count++; 1663 pvo->pvo_pmap->pm_stats.resident_count++; 1664 1665 /* 1666 * We hope this succeeds but it isn't required. 1667 */ 1668 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1669 if (i >= 0) { 1670 PVO_PTEGIDX_SET(pvo, i); 1671 } else { 1672 panic("pmap_pvo_enter: overflow"); 1673 pmap_pte_overflow++; 1674 } 1675 1676 return (first ? ENOENT : 0); 1677} 1678 1679static void 1680pmap_pvo_remove(struct pvo_entry *pvo, int pteidx) 1681{ 1682 struct pte *pt; 1683 1684 /* 1685 * If there is an active pte entry, we need to deactivate it (and 1686 * save the ref & cfg bits). 1687 */ 1688 pt = pmap_pvo_to_pte(pvo, pteidx); 1689 if (pt != NULL) { 1690 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1691 PVO_PTEGIDX_CLR(pvo); 1692 } else { 1693 pmap_pte_overflow--; 1694 } 1695 1696 /* 1697 * Update our statistics. 1698 */ 1699 pvo->pvo_pmap->pm_stats.resident_count--; 1700 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1701 pvo->pvo_pmap->pm_stats.wired_count--; 1702 1703 /* 1704 * Save the REF/CHG bits into their cache if the page is managed. 1705 */ 1706 if (pvo->pvo_vaddr & PVO_MANAGED) { 1707 struct vm_page *pg; 1708 1709 pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo * PTE_RPGN); 1710 if (pg != NULL) { 1711 pmap_attr_save(pg, pvo->pvo_pte.pte_lo & 1712 (PTE_REF | PTE_CHG)); 1713 } 1714 } 1715 1716 /* 1717 * Remove this PVO from the PV list. 1718 */ 1719 LIST_REMOVE(pvo, pvo_vlink); 1720 1721 /* 1722 * Remove this from the overflow list and return it to the pool 1723 * if we aren't going to reuse it. 1724 */ 1725 LIST_REMOVE(pvo, pvo_olink); 1726 zfree(pvo->pvo_vaddr & PVO_MANAGED ? pmap_mpvo_zone : pmap_upvo_zone, 1727 pvo); 1728 pmap_pvo_entries--; 1729 pmap_pvo_remove_calls++; 1730} 1731 1732static __inline int 1733pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1734{ 1735 int pteidx; 1736 1737 /* 1738 * We can find the actual pte entry without searching by grabbing 1739 * the PTEG index from 3 unused bits in pte_lo[11:9] and by 1740 * noticing the HID bit. 1741 */ 1742 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1743 if (pvo->pvo_pte.pte_hi & PTE_HID) 1744 pteidx ^= pmap_pteg_mask * 8; 1745 1746 return (pteidx); 1747} 1748 1749static struct pvo_entry * 1750pmap_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p) 1751{ 1752 struct pvo_entry *pvo; 1753 int ptegidx; 1754 u_int sr; 1755 1756 va &= ~ADDR_POFF; 1757 sr = va_to_sr(pm->pm_sr, va); 1758 ptegidx = va_to_pteg(sr, va); 1759 1760 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1761 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1762 if (pteidx_p) 1763 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1764 return (pvo); 1765 } 1766 } 1767 1768 return (NULL); 1769} 1770 1771static struct pte * 1772pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1773{ 1774 struct pte *pt; 1775 1776 /* 1777 * If we haven't been supplied the ptegidx, calculate it. 1778 */ 1779 if (pteidx == -1) { 1780 int ptegidx; 1781 u_int sr; 1782 1783 sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr); 1784 ptegidx = va_to_pteg(sr, pvo->pvo_vaddr); 1785 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1786 } 1787 1788 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1789 1790 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1791 panic("pmap_pvo_to_pte: pvo %p has valid pte in pvo but no " 1792 "valid pte index", pvo); 1793 } 1794 1795 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1796 panic("pmap_pvo_to_pte: pvo %p has valid pte index in pvo " 1797 "pvo but no valid pte", pvo); 1798 } 1799 1800 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1801 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1802 panic("pmap_pvo_to_pte: pvo %p has valid pte in " 1803 "pmap_pteg_table %p but invalid in pvo", pvo, pt); 1804 } 1805 1806 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) 1807 != 0) { 1808 panic("pmap_pvo_to_pte: pvo %p pte does not match " 1809 "pte %p in pmap_pteg_table", pvo, pt); 1810 } 1811 1812 return (pt); 1813 } 1814 1815 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1816 panic("pmap_pvo_to_pte: pvo %p has invalid pte %p in " 1817 "pmap_pteg_table but valid in pvo", pvo, pt); 1818 } 1819 1820 return (NULL); 1821} 1822 1823/* 1824 * XXX: THIS STUFF SHOULD BE IN pte.c? 1825 */ 1826int 1827pmap_pte_spill(vm_offset_t addr) 1828{ 1829 struct pvo_entry *source_pvo, *victim_pvo; 1830 struct pvo_entry *pvo; 1831 int ptegidx, i, j; 1832 u_int sr; 1833 struct pteg *pteg; 1834 struct pte *pt; 1835 1836 pmap_pte_spills++; 1837 1838 __asm __volatile("mfsrin %0,%1" : "=r"(sr) : "r"(addr)); 1839 ptegidx = va_to_pteg(sr, addr); 1840 1841 /* 1842 * Have to substitute some entry. Use the primary hash for this. 1843 * Use low bits of timebase as random generator. 1844 */ 1845 pteg = &pmap_pteg_table[ptegidx]; 1846 __asm __volatile("mftb %0" : "=r"(i)); 1847 i &= 7; 1848 pt = &pteg->pt[i]; 1849 1850 source_pvo = NULL; 1851 victim_pvo = NULL; 1852 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1853 /* 1854 * We need to find a pvo entry for this address. 1855 */ 1856 PMAP_PVO_CHECK(pvo); 1857 if (source_pvo == NULL && 1858 pmap_pte_match(&pvo->pvo_pte, sr, addr, 1859 pvo->pvo_pte.pte_hi & PTE_HID)) { 1860 /* 1861 * Now found an entry to be spilled into the pteg. 1862 * The PTE is now valid, so we know it's active. 1863 */ 1864 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1865 1866 if (j >= 0) { 1867 PVO_PTEGIDX_SET(pvo, j); 1868 pmap_pte_overflow--; 1869 PMAP_PVO_CHECK(pvo); 1870 return (1); 1871 } 1872 1873 source_pvo = pvo; 1874 1875 if (victim_pvo != NULL) 1876 break; 1877 } 1878 1879 /* 1880 * We also need the pvo entry of the victim we are replacing 1881 * so save the R & C bits of the PTE. 1882 */ 1883 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1884 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1885 victim_pvo = pvo; 1886 if (source_pvo != NULL) 1887 break; 1888 } 1889 } 1890 1891 if (source_pvo == NULL) 1892 return (0); 1893 1894 if (victim_pvo == NULL) { 1895 if ((pt->pte_hi & PTE_HID) == 0) 1896 panic("pmap_pte_spill: victim p-pte (%p) has no pvo" 1897 "entry", pt); 1898 1899 /* 1900 * If this is a secondary PTE, we need to search it's primary 1901 * pvo bucket for the matching PVO. 1902 */ 1903 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx ^ pmap_pteg_mask], 1904 pvo_olink) { 1905 PMAP_PVO_CHECK(pvo); 1906 /* 1907 * We also need the pvo entry of the victim we are 1908 * replacing so save the R & C bits of the PTE. 1909 */ 1910 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1911 victim_pvo = pvo; 1912 break; 1913 } 1914 } 1915 1916 if (victim_pvo == NULL) 1917 panic("pmap_pte_spill: victim s-pte (%p) has no pvo" 1918 "entry", pt); 1919 } 1920 1921 /* 1922 * We are invalidating the TLB entry for the EA we are replacing even 1923 * though it's valid. If we don't, we lose any ref/chg bit changes 1924 * contained in the TLB entry. 1925 */ 1926 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1927 1928 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1929 pmap_pte_set(pt, &source_pvo->pvo_pte); 1930 1931 PVO_PTEGIDX_CLR(victim_pvo); 1932 PVO_PTEGIDX_SET(source_pvo, i); 1933 pmap_pte_replacements++; 1934 1935 PMAP_PVO_CHECK(victim_pvo); 1936 PMAP_PVO_CHECK(source_pvo); 1937 1938 return (1); 1939} 1940 1941static int 1942pmap_pte_insert(u_int ptegidx, struct pte *pvo_pt) 1943{ 1944 struct pte *pt; 1945 int i; 1946 1947 /* 1948 * First try primary hash. 1949 */ 1950 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 1951 if ((pt->pte_hi & PTE_VALID) == 0) { 1952 pvo_pt->pte_hi &= ~PTE_HID; 1953 pmap_pte_set(pt, pvo_pt); 1954 return (i); 1955 } 1956 } 1957 1958 /* 1959 * Now try secondary hash. 1960 */ 1961 ptegidx ^= pmap_pteg_mask; 1962 ptegidx++; 1963 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 1964 if ((pt->pte_hi & PTE_VALID) == 0) { 1965 pvo_pt->pte_hi |= PTE_HID; 1966 pmap_pte_set(pt, pvo_pt); 1967 return (i); 1968 } 1969 } 1970 1971 panic("pmap_pte_insert: overflow"); 1972 return (-1); 1973} 1974 1975static boolean_t 1976pmap_query_bit(vm_page_t m, int ptebit) 1977{ 1978 struct pvo_entry *pvo; 1979 struct pte *pt; 1980 1981 if (pmap_attr_fetch(m) & ptebit) 1982 return (TRUE); 1983 1984 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 1985 PMAP_PVO_CHECK(pvo); /* sanity check */ 1986 1987 /* 1988 * See if we saved the bit off. If so, cache it and return 1989 * success. 1990 */ 1991 if (pvo->pvo_pte.pte_lo & ptebit) { 1992 pmap_attr_save(m, ptebit); 1993 PMAP_PVO_CHECK(pvo); /* sanity check */ 1994 return (TRUE); 1995 } 1996 } 1997 1998 /* 1999 * No luck, now go through the hard part of looking at the PTEs 2000 * themselves. Sync so that any pending REF/CHG bits are flushed to 2001 * the PTEs. 2002 */ 2003 SYNC(); 2004 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2005 PMAP_PVO_CHECK(pvo); /* sanity check */ 2006 2007 /* 2008 * See if this pvo has a valid PTE. if so, fetch the 2009 * REF/CHG bits from the valid PTE. If the appropriate 2010 * ptebit is set, cache it and return success. 2011 */ 2012 pt = pmap_pvo_to_pte(pvo, -1); 2013 if (pt != NULL) { 2014 pmap_pte_synch(pt, &pvo->pvo_pte); 2015 if (pvo->pvo_pte.pte_lo & ptebit) { 2016 pmap_attr_save(m, ptebit); 2017 PMAP_PVO_CHECK(pvo); /* sanity check */ 2018 return (TRUE); 2019 } 2020 } 2021 } 2022 2023 return (TRUE); 2024} 2025 2026static boolean_t 2027pmap_clear_bit(vm_page_t m, int ptebit) 2028{ 2029 struct pvo_entry *pvo; 2030 struct pte *pt; 2031 int rv; 2032 2033 /* 2034 * Clear the cached value. 2035 */ 2036 rv = pmap_attr_fetch(m); 2037 pmap_attr_clear(m, ptebit); 2038 2039 /* 2040 * Sync so that any pending REF/CHG bits are flushed to the PTEs (so 2041 * we can reset the right ones). note that since the pvo entries and 2042 * list heads are accessed via BAT0 and are never placed in the page 2043 * table, we don't have to worry about further accesses setting the 2044 * REF/CHG bits. 2045 */ 2046 SYNC(); 2047 2048 /* 2049 * For each pvo entry, clear the pvo's ptebit. If this pvo has a 2050 * valid pte clear the ptebit from the valid pte. 2051 */ 2052 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2053 PMAP_PVO_CHECK(pvo); /* sanity check */ 2054 pt = pmap_pvo_to_pte(pvo, -1); 2055 if (pt != NULL) { 2056 pmap_pte_synch(pt, &pvo->pvo_pte); 2057 if (pvo->pvo_pte.pte_lo & ptebit) 2058 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2059 } 2060 rv |= pvo->pvo_pte.pte_lo; 2061 pvo->pvo_pte.pte_lo &= ~ptebit; 2062 PMAP_PVO_CHECK(pvo); /* sanity check */ 2063 } 2064 2065 return ((rv & ptebit) != 0); 2066} 2067