mmu_oea.c revision 118239
177957Sbenno/* 290643Sbenno * Copyright (c) 2001 The NetBSD Foundation, Inc. 390643Sbenno * All rights reserved. 490643Sbenno * 590643Sbenno * This code is derived from software contributed to The NetBSD Foundation 690643Sbenno * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc. 790643Sbenno * 890643Sbenno * Redistribution and use in source and binary forms, with or without 990643Sbenno * modification, are permitted provided that the following conditions 1090643Sbenno * are met: 1190643Sbenno * 1. Redistributions of source code must retain the above copyright 1290643Sbenno * notice, this list of conditions and the following disclaimer. 1390643Sbenno * 2. Redistributions in binary form must reproduce the above copyright 1490643Sbenno * notice, this list of conditions and the following disclaimer in the 1590643Sbenno * documentation and/or other materials provided with the distribution. 1690643Sbenno * 3. All advertising materials mentioning features or use of this software 1790643Sbenno * must display the following acknowledgement: 1890643Sbenno * This product includes software developed by the NetBSD 1990643Sbenno * Foundation, Inc. and its contributors. 2090643Sbenno * 4. Neither the name of The NetBSD Foundation nor the names of its 2190643Sbenno * contributors may be used to endorse or promote products derived 2290643Sbenno * from this software without specific prior written permission. 2390643Sbenno * 2490643Sbenno * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 2590643Sbenno * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 2690643Sbenno * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 2790643Sbenno * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 2890643Sbenno * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2990643Sbenno * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 3090643Sbenno * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 3190643Sbenno * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 3290643Sbenno * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3390643Sbenno * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3490643Sbenno * POSSIBILITY OF SUCH DAMAGE. 3590643Sbenno */ 3690643Sbenno/* 3777957Sbenno * Copyright (C) 1995, 1996 Wolfgang Solfrank. 3877957Sbenno * Copyright (C) 1995, 1996 TooLs GmbH. 3977957Sbenno * All rights reserved. 4077957Sbenno * 4177957Sbenno * Redistribution and use in source and binary forms, with or without 4277957Sbenno * modification, are permitted provided that the following conditions 4377957Sbenno * are met: 4477957Sbenno * 1. Redistributions of source code must retain the above copyright 4577957Sbenno * notice, this list of conditions and the following disclaimer. 4677957Sbenno * 2. Redistributions in binary form must reproduce the above copyright 4777957Sbenno * notice, this list of conditions and the following disclaimer in the 4877957Sbenno * documentation and/or other materials provided with the distribution. 4977957Sbenno * 3. All advertising materials mentioning features or use of this software 5077957Sbenno * must display the following acknowledgement: 5177957Sbenno * This product includes software developed by TooLs GmbH. 5277957Sbenno * 4. The name of TooLs GmbH may not be used to endorse or promote products 5377957Sbenno * derived from this software without specific prior written permission. 5477957Sbenno * 5577957Sbenno * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 5677957Sbenno * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 5777957Sbenno * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 5877957Sbenno * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 5977957Sbenno * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 6077957Sbenno * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 6177957Sbenno * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 6277957Sbenno * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 6377957Sbenno * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 6477957Sbenno * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 6577957Sbenno * 6678880Sbenno * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $ 6777957Sbenno */ 6877957Sbenno/* 6977957Sbenno * Copyright (C) 2001 Benno Rice. 7077957Sbenno * All rights reserved. 7177957Sbenno * 7277957Sbenno * Redistribution and use in source and binary forms, with or without 7377957Sbenno * modification, are permitted provided that the following conditions 7477957Sbenno * are met: 7577957Sbenno * 1. Redistributions of source code must retain the above copyright 7677957Sbenno * notice, this list of conditions and the following disclaimer. 7777957Sbenno * 2. Redistributions in binary form must reproduce the above copyright 7877957Sbenno * notice, this list of conditions and the following disclaimer in the 7977957Sbenno * documentation and/or other materials provided with the distribution. 8077957Sbenno * 8177957Sbenno * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 8277957Sbenno * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8377957Sbenno * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 8477957Sbenno * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 8577957Sbenno * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 8677957Sbenno * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 8777957Sbenno * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 8877957Sbenno * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 8977957Sbenno * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 9077957Sbenno * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 9177957Sbenno */ 9277957Sbenno 93113038Sobrien#include <sys/cdefs.h> 94113038Sobrien__FBSDID("$FreeBSD: head/sys/powerpc/aim/mmu_oea.c 118239 2003-07-31 01:31:32Z peter $"); 9577957Sbenno 9690643Sbenno/* 9790643Sbenno * Manages physical address maps. 9890643Sbenno * 9990643Sbenno * In addition to hardware address maps, this module is called upon to 10090643Sbenno * provide software-use-only maps which may or may not be stored in the 10190643Sbenno * same form as hardware maps. These pseudo-maps are used to store 10290643Sbenno * intermediate results from copy operations to and from address spaces. 10390643Sbenno * 10490643Sbenno * Since the information managed by this module is also stored by the 10590643Sbenno * logical address mapping module, this module may throw away valid virtual 10690643Sbenno * to physical mappings at almost any time. However, invalidations of 10790643Sbenno * mappings must be done as requested. 10890643Sbenno * 10990643Sbenno * In order to cope with hardware architectures which make virtual to 11090643Sbenno * physical map invalidates expensive, this module may delay invalidate 11190643Sbenno * reduced protection operations until such time as they are actually 11290643Sbenno * necessary. This module is given full information as to which processors 11390643Sbenno * are currently using which maps, and to when physical maps must be made 11490643Sbenno * correct. 11590643Sbenno */ 11690643Sbenno 117118239Speter#include "opt_kstack_pages.h" 118118239Speter 11977957Sbenno#include <sys/param.h> 12080431Speter#include <sys/kernel.h> 12190643Sbenno#include <sys/ktr.h> 12290643Sbenno#include <sys/lock.h> 12390643Sbenno#include <sys/msgbuf.h> 12490643Sbenno#include <sys/mutex.h> 12577957Sbenno#include <sys/proc.h> 12690643Sbenno#include <sys/sysctl.h> 12790643Sbenno#include <sys/systm.h> 12877957Sbenno#include <sys/vmmeter.h> 12977957Sbenno 13090643Sbenno#include <dev/ofw/openfirm.h> 13190643Sbenno 13290643Sbenno#include <vm/vm.h> 13377957Sbenno#include <vm/vm_param.h> 13477957Sbenno#include <vm/vm_kern.h> 13577957Sbenno#include <vm/vm_page.h> 13677957Sbenno#include <vm/vm_map.h> 13777957Sbenno#include <vm/vm_object.h> 13877957Sbenno#include <vm/vm_extern.h> 13977957Sbenno#include <vm/vm_pageout.h> 14077957Sbenno#include <vm/vm_pager.h> 14192847Sjeff#include <vm/uma.h> 14277957Sbenno 14397346Sbenno#include <machine/powerpc.h> 14483730Smp#include <machine/bat.h> 14590643Sbenno#include <machine/frame.h> 14690643Sbenno#include <machine/md_var.h> 14790643Sbenno#include <machine/psl.h> 14877957Sbenno#include <machine/pte.h> 14990643Sbenno#include <machine/sr.h> 15077957Sbenno 15190643Sbenno#define PMAP_DEBUG 15277957Sbenno 15390643Sbenno#define TODO panic("%s: not implemented", __func__); 15477957Sbenno 15590643Sbenno#define PMAP_LOCK(pm) 15690643Sbenno#define PMAP_UNLOCK(pm) 15790643Sbenno 15890643Sbenno#define TLBIE(va) __asm __volatile("tlbie %0" :: "r"(va)) 15990643Sbenno#define TLBSYNC() __asm __volatile("tlbsync"); 16090643Sbenno#define SYNC() __asm __volatile("sync"); 16190643Sbenno#define EIEIO() __asm __volatile("eieio"); 16290643Sbenno 16390643Sbenno#define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4)) 16490643Sbenno#define VSID_TO_SR(vsid) ((vsid) & 0xf) 16590643Sbenno#define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff) 16690643Sbenno 16790643Sbenno#define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 16890643Sbenno#define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 16990643Sbenno#define PVO_WIRED 0x0010 /* PVO entry is wired */ 17090643Sbenno#define PVO_MANAGED 0x0020 /* PVO entry is managed */ 17190643Sbenno#define PVO_EXECUTABLE 0x0040 /* PVO entry is executable */ 17294835Sbenno#define PVO_BOOTSTRAP 0x0080 /* PVO entry allocated during 17392521Sbenno bootstrap */ 17490643Sbenno#define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 17590643Sbenno#define PVO_ISEXECUTABLE(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 17690643Sbenno#define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 17790643Sbenno#define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 17890643Sbenno#define PVO_PTEGIDX_CLR(pvo) \ 17990643Sbenno ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 18090643Sbenno#define PVO_PTEGIDX_SET(pvo, i) \ 18190643Sbenno ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 18290643Sbenno 18390643Sbenno#define PMAP_PVO_CHECK(pvo) 18490643Sbenno 18590643Sbennostruct ofw_map { 18690643Sbenno vm_offset_t om_va; 18790643Sbenno vm_size_t om_len; 18890643Sbenno vm_offset_t om_pa; 18990643Sbenno u_int om_mode; 19090643Sbenno}; 19177957Sbenno 19290643Sbennoint pmap_bootstrapped = 0; 19377957Sbenno 19490643Sbenno/* 19590643Sbenno * Virtual and physical address of message buffer. 19690643Sbenno */ 19790643Sbennostruct msgbuf *msgbufp; 19890643Sbennovm_offset_t msgbuf_phys; 19977957Sbenno 20090643Sbenno/* 20190643Sbenno * Physical addresses of first and last available physical page. 20290643Sbenno */ 20390643Sbennovm_offset_t avail_start; 20490643Sbennovm_offset_t avail_end; 20577957Sbenno 206110172Sgrehanint pmap_pagedaemon_waken; 207110172Sgrehan 20890643Sbenno/* 20990643Sbenno * Map of physical memory regions. 21090643Sbenno */ 21190643Sbennovm_offset_t phys_avail[128]; 21290643Sbennou_int phys_avail_count; 21397346Sbennostatic struct mem_region *regions; 21497346Sbennostatic struct mem_region *pregions; 21597346Sbennoint regions_sz, pregions_sz; 216100319Sbennostatic struct ofw_map *translations; 21777957Sbenno 21890643Sbenno/* 21990643Sbenno * First and last available kernel virtual addresses. 22090643Sbenno */ 22190643Sbennovm_offset_t virtual_avail; 22290643Sbennovm_offset_t virtual_end; 22390643Sbennovm_offset_t kernel_vm_end; 22477957Sbenno 22590643Sbenno/* 22690643Sbenno * Kernel pmap. 22790643Sbenno */ 22890643Sbennostruct pmap kernel_pmap_store; 22990643Sbennoextern struct pmap ofw_pmap; 23077957Sbenno 23190643Sbenno/* 23290643Sbenno * PTEG data. 23390643Sbenno */ 23490643Sbennostatic struct pteg *pmap_pteg_table; 23590643Sbennou_int pmap_pteg_count; 23690643Sbennou_int pmap_pteg_mask; 23777957Sbenno 23890643Sbenno/* 23990643Sbenno * PVO data. 24090643Sbenno */ 24190643Sbennostruct pvo_head *pmap_pvo_table; /* pvo entries by pteg index */ 24290643Sbennostruct pvo_head pmap_pvo_kunmanaged = 24390643Sbenno LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 24490643Sbennostruct pvo_head pmap_pvo_unmanaged = 24590643Sbenno LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 24677957Sbenno 24792847Sjeffuma_zone_t pmap_upvo_zone; /* zone for pvo entries for unmanaged pages */ 24892847Sjeffuma_zone_t pmap_mpvo_zone; /* zone for pvo entries for managed pages */ 24990643Sbennostruct vm_object pmap_upvo_zone_obj; 25090643Sbennostruct vm_object pmap_mpvo_zone_obj; 25177957Sbenno 25299037Sbenno#define BPVO_POOL_SIZE 32768 25392521Sbennostatic struct pvo_entry *pmap_bpvo_pool; 25499037Sbennostatic int pmap_bpvo_pool_index = 0; 25577957Sbenno 25690643Sbenno#define VSID_NBPW (sizeof(u_int32_t) * 8) 25790643Sbennostatic u_int pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 25877957Sbenno 25990643Sbennostatic boolean_t pmap_initialized = FALSE; 26077957Sbenno 26190643Sbenno/* 26290643Sbenno * Statistics. 26390643Sbenno */ 26490643Sbennou_int pmap_pte_valid = 0; 26590643Sbennou_int pmap_pte_overflow = 0; 26690643Sbennou_int pmap_pte_replacements = 0; 26790643Sbennou_int pmap_pvo_entries = 0; 26890643Sbennou_int pmap_pvo_enter_calls = 0; 26990643Sbennou_int pmap_pvo_remove_calls = 0; 27090643Sbennou_int pmap_pte_spills = 0; 27190643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_valid, CTLFLAG_RD, &pmap_pte_valid, 27290643Sbenno 0, ""); 27390643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_overflow, CTLFLAG_RD, 27490643Sbenno &pmap_pte_overflow, 0, ""); 27590643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_replacements, CTLFLAG_RD, 27690643Sbenno &pmap_pte_replacements, 0, ""); 27790643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_entries, CTLFLAG_RD, &pmap_pvo_entries, 27890643Sbenno 0, ""); 27990643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_enter_calls, CTLFLAG_RD, 28090643Sbenno &pmap_pvo_enter_calls, 0, ""); 28190643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_remove_calls, CTLFLAG_RD, 28290643Sbenno &pmap_pvo_remove_calls, 0, ""); 28390643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_spills, CTLFLAG_RD, 28490643Sbenno &pmap_pte_spills, 0, ""); 28577957Sbenno 28690643Sbennostruct pvo_entry *pmap_pvo_zeropage; 28777957Sbenno 28890643Sbennovm_offset_t pmap_rkva_start = VM_MIN_KERNEL_ADDRESS; 28990643Sbennou_int pmap_rkva_count = 4; 29077957Sbenno 29190643Sbenno/* 29290643Sbenno * Allocate physical memory for use in pmap_bootstrap. 29390643Sbenno */ 29490643Sbennostatic vm_offset_t pmap_bootstrap_alloc(vm_size_t, u_int); 29577957Sbenno 29690643Sbenno/* 29790643Sbenno * PTE calls. 29890643Sbenno */ 29990643Sbennostatic int pmap_pte_insert(u_int, struct pte *); 30077957Sbenno 30177957Sbenno/* 30290643Sbenno * PVO calls. 30377957Sbenno */ 30492847Sjeffstatic int pmap_pvo_enter(pmap_t, uma_zone_t, struct pvo_head *, 30590643Sbenno vm_offset_t, vm_offset_t, u_int, int); 30690643Sbennostatic void pmap_pvo_remove(struct pvo_entry *, int); 30790643Sbennostatic struct pvo_entry *pmap_pvo_find_va(pmap_t, vm_offset_t, int *); 30890643Sbennostatic struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 30990643Sbenno 31090643Sbenno/* 31190643Sbenno * Utility routines. 31290643Sbenno */ 31392654Sjeffstatic void * pmap_pvo_allocf(uma_zone_t, int, u_int8_t *, int); 31490643Sbennostatic struct pvo_entry *pmap_rkva_alloc(void); 31590643Sbennostatic void pmap_pa_map(struct pvo_entry *, vm_offset_t, 31690643Sbenno struct pte *, int *); 31790643Sbennostatic void pmap_pa_unmap(struct pvo_entry *, struct pte *, int *); 31890643Sbennostatic void pmap_syncicache(vm_offset_t, vm_size_t); 31990643Sbennostatic boolean_t pmap_query_bit(vm_page_t, int); 320110172Sgrehanstatic u_int pmap_clear_bit(vm_page_t, int, int *); 32190643Sbennostatic void tlbia(void); 32290643Sbenno 32390643Sbennostatic __inline int 32490643Sbennova_to_sr(u_int *sr, vm_offset_t va) 32577957Sbenno{ 32690643Sbenno return (sr[(uintptr_t)va >> ADDR_SR_SHFT]); 32790643Sbenno} 32877957Sbenno 32990643Sbennostatic __inline u_int 33090643Sbennova_to_pteg(u_int sr, vm_offset_t addr) 33190643Sbenno{ 33290643Sbenno u_int hash; 33390643Sbenno 33490643Sbenno hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >> 33590643Sbenno ADDR_PIDX_SHFT); 33690643Sbenno return (hash & pmap_pteg_mask); 33777957Sbenno} 33877957Sbenno 33990643Sbennostatic __inline struct pvo_head * 34096250Sbennopa_to_pvoh(vm_offset_t pa, vm_page_t *pg_p) 34177957Sbenno{ 34290643Sbenno struct vm_page *pg; 34377957Sbenno 34490643Sbenno pg = PHYS_TO_VM_PAGE(pa); 34590643Sbenno 34696250Sbenno if (pg_p != NULL) 34796250Sbenno *pg_p = pg; 34896250Sbenno 34990643Sbenno if (pg == NULL) 35090643Sbenno return (&pmap_pvo_unmanaged); 35190643Sbenno 35290643Sbenno return (&pg->md.mdpg_pvoh); 35377957Sbenno} 35477957Sbenno 35590643Sbennostatic __inline struct pvo_head * 35690643Sbennovm_page_to_pvoh(vm_page_t m) 35790643Sbenno{ 35890643Sbenno 35990643Sbenno return (&m->md.mdpg_pvoh); 36090643Sbenno} 36190643Sbenno 36277957Sbennostatic __inline void 36390643Sbennopmap_attr_clear(vm_page_t m, int ptebit) 36477957Sbenno{ 36590643Sbenno 36690643Sbenno m->md.mdpg_attrs &= ~ptebit; 36777957Sbenno} 36877957Sbenno 36977957Sbennostatic __inline int 37090643Sbennopmap_attr_fetch(vm_page_t m) 37177957Sbenno{ 37277957Sbenno 37390643Sbenno return (m->md.mdpg_attrs); 37477957Sbenno} 37577957Sbenno 37690643Sbennostatic __inline void 37790643Sbennopmap_attr_save(vm_page_t m, int ptebit) 37890643Sbenno{ 37990643Sbenno 38090643Sbenno m->md.mdpg_attrs |= ptebit; 38190643Sbenno} 38290643Sbenno 38377957Sbennostatic __inline int 38490643Sbennopmap_pte_compare(const struct pte *pt, const struct pte *pvo_pt) 38577957Sbenno{ 38690643Sbenno if (pt->pte_hi == pvo_pt->pte_hi) 38790643Sbenno return (1); 38890643Sbenno 38990643Sbenno return (0); 39077957Sbenno} 39177957Sbenno 39277957Sbennostatic __inline int 39390643Sbennopmap_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which) 39477957Sbenno{ 39590643Sbenno return (pt->pte_hi & ~PTE_VALID) == 39690643Sbenno (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 39790643Sbenno ((va >> ADDR_API_SHFT) & PTE_API) | which); 39890643Sbenno} 39977957Sbenno 40090643Sbennostatic __inline void 40190643Sbennopmap_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo) 40290643Sbenno{ 40390643Sbenno /* 40490643Sbenno * Construct a PTE. Default to IMB initially. Valid bit only gets 40590643Sbenno * set when the real pte is set in memory. 40690643Sbenno * 40790643Sbenno * Note: Don't set the valid bit for correct operation of tlb update. 40890643Sbenno */ 40990643Sbenno pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 41090643Sbenno (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API); 41190643Sbenno pt->pte_lo = pte_lo; 41277957Sbenno} 41377957Sbenno 41490643Sbennostatic __inline void 41590643Sbennopmap_pte_synch(struct pte *pt, struct pte *pvo_pt) 41677957Sbenno{ 41777957Sbenno 41890643Sbenno pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG); 41977957Sbenno} 42077957Sbenno 42190643Sbennostatic __inline void 42290643Sbennopmap_pte_clear(struct pte *pt, vm_offset_t va, int ptebit) 42377957Sbenno{ 42477957Sbenno 42590643Sbenno /* 42690643Sbenno * As shown in Section 7.6.3.2.3 42790643Sbenno */ 42890643Sbenno pt->pte_lo &= ~ptebit; 42990643Sbenno TLBIE(va); 43090643Sbenno EIEIO(); 43190643Sbenno TLBSYNC(); 43290643Sbenno SYNC(); 43377957Sbenno} 43477957Sbenno 43590643Sbennostatic __inline void 43690643Sbennopmap_pte_set(struct pte *pt, struct pte *pvo_pt) 43777957Sbenno{ 43877957Sbenno 43990643Sbenno pvo_pt->pte_hi |= PTE_VALID; 44090643Sbenno 44177957Sbenno /* 44290643Sbenno * Update the PTE as defined in section 7.6.3.1. 44390643Sbenno * Note that the REF/CHG bits are from pvo_pt and thus should havce 44490643Sbenno * been saved so this routine can restore them (if desired). 44577957Sbenno */ 44690643Sbenno pt->pte_lo = pvo_pt->pte_lo; 44790643Sbenno EIEIO(); 44890643Sbenno pt->pte_hi = pvo_pt->pte_hi; 44990643Sbenno SYNC(); 45090643Sbenno pmap_pte_valid++; 45190643Sbenno} 45277957Sbenno 45390643Sbennostatic __inline void 45490643Sbennopmap_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 45590643Sbenno{ 45690643Sbenno 45790643Sbenno pvo_pt->pte_hi &= ~PTE_VALID; 45890643Sbenno 45977957Sbenno /* 46090643Sbenno * Force the reg & chg bits back into the PTEs. 46177957Sbenno */ 46290643Sbenno SYNC(); 46377957Sbenno 46490643Sbenno /* 46590643Sbenno * Invalidate the pte. 46690643Sbenno */ 46790643Sbenno pt->pte_hi &= ~PTE_VALID; 46877957Sbenno 46990643Sbenno SYNC(); 47090643Sbenno TLBIE(va); 47190643Sbenno EIEIO(); 47290643Sbenno TLBSYNC(); 47390643Sbenno SYNC(); 47477957Sbenno 47590643Sbenno /* 47690643Sbenno * Save the reg & chg bits. 47790643Sbenno */ 47890643Sbenno pmap_pte_synch(pt, pvo_pt); 47990643Sbenno pmap_pte_valid--; 48077957Sbenno} 48177957Sbenno 48290643Sbennostatic __inline void 48390643Sbennopmap_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 48490643Sbenno{ 48590643Sbenno 48690643Sbenno /* 48790643Sbenno * Invalidate the PTE 48890643Sbenno */ 48990643Sbenno pmap_pte_unset(pt, pvo_pt, va); 49090643Sbenno pmap_pte_set(pt, pvo_pt); 49190643Sbenno} 49290643Sbenno 49377957Sbenno/* 49490643Sbenno * Quick sort callout for comparing memory regions. 49577957Sbenno */ 49690643Sbennostatic int mr_cmp(const void *a, const void *b); 49790643Sbennostatic int om_cmp(const void *a, const void *b); 49890643Sbenno 49990643Sbennostatic int 50090643Sbennomr_cmp(const void *a, const void *b) 50177957Sbenno{ 50290643Sbenno const struct mem_region *regiona; 50390643Sbenno const struct mem_region *regionb; 50477957Sbenno 50590643Sbenno regiona = a; 50690643Sbenno regionb = b; 50790643Sbenno if (regiona->mr_start < regionb->mr_start) 50890643Sbenno return (-1); 50990643Sbenno else if (regiona->mr_start > regionb->mr_start) 51090643Sbenno return (1); 51190643Sbenno else 51290643Sbenno return (0); 51390643Sbenno} 51477957Sbenno 51590643Sbennostatic int 51690643Sbennoom_cmp(const void *a, const void *b) 51790643Sbenno{ 51890643Sbenno const struct ofw_map *mapa; 51990643Sbenno const struct ofw_map *mapb; 52090643Sbenno 52190643Sbenno mapa = a; 52290643Sbenno mapb = b; 52390643Sbenno if (mapa->om_pa < mapb->om_pa) 52490643Sbenno return (-1); 52590643Sbenno else if (mapa->om_pa > mapb->om_pa) 52690643Sbenno return (1); 52790643Sbenno else 52890643Sbenno return (0); 52977957Sbenno} 53077957Sbenno 53177957Sbennovoid 53290643Sbennopmap_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) 53377957Sbenno{ 53497346Sbenno ihandle_t mmui; 53590643Sbenno phandle_t chosen, mmu; 53690643Sbenno int sz; 53790643Sbenno int i, j; 538103604Sgrehan int ofw_mappings; 53991793Sbenno vm_size_t size, physsz; 54090643Sbenno vm_offset_t pa, va, off; 54190643Sbenno u_int batl, batu; 54277957Sbenno 54399037Sbenno /* 544103604Sgrehan * Set up BAT0 to map the lowest 256 MB area 54599037Sbenno */ 54699037Sbenno battable[0x0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 54799037Sbenno battable[0x0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 54899037Sbenno 54999037Sbenno /* 55099037Sbenno * Map PCI memory space. 55199037Sbenno */ 55299037Sbenno battable[0x8].batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 55399037Sbenno battable[0x8].batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 55499037Sbenno 55599037Sbenno battable[0x9].batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 55699037Sbenno battable[0x9].batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 55799037Sbenno 55899037Sbenno battable[0xa].batl = BATL(0xa0000000, BAT_I|BAT_G, BAT_PP_RW); 55999037Sbenno battable[0xa].batu = BATU(0xa0000000, BAT_BL_256M, BAT_Vs); 56099037Sbenno 56199037Sbenno battable[0xb].batl = BATL(0xb0000000, BAT_I|BAT_G, BAT_PP_RW); 56299037Sbenno battable[0xb].batu = BATU(0xb0000000, BAT_BL_256M, BAT_Vs); 56399037Sbenno 56499037Sbenno /* 56599037Sbenno * Map obio devices. 56699037Sbenno */ 56799037Sbenno battable[0xf].batl = BATL(0xf0000000, BAT_I|BAT_G, BAT_PP_RW); 56899037Sbenno battable[0xf].batu = BATU(0xf0000000, BAT_BL_256M, BAT_Vs); 56999037Sbenno 57077957Sbenno /* 57190643Sbenno * Use an IBAT and a DBAT to map the bottom segment of memory 57290643Sbenno * where we are. 57377957Sbenno */ 57490643Sbenno batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 57590643Sbenno batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 57690643Sbenno __asm ("mtibatu 0,%0; mtibatl 0,%1; mtdbatu 0,%0; mtdbatl 0,%1" 57790643Sbenno :: "r"(batu), "r"(batl)); 57899037Sbenno 57990643Sbenno#if 0 58099037Sbenno /* map frame buffer */ 58199037Sbenno batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 58299037Sbenno batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 58399037Sbenno __asm ("mtdbatu 1,%0; mtdbatl 1,%1" 58499037Sbenno :: "r"(batu), "r"(batl)); 58599037Sbenno#endif 58699037Sbenno 58799037Sbenno#if 1 58899037Sbenno /* map pci space */ 58990643Sbenno batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 59099037Sbenno batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 59199037Sbenno __asm ("mtdbatu 1,%0; mtdbatl 1,%1" 59290643Sbenno :: "r"(batu), "r"(batl)); 59390643Sbenno#endif 59477957Sbenno 59577957Sbenno /* 59690643Sbenno * Set the start and end of kva. 59777957Sbenno */ 59890643Sbenno virtual_avail = VM_MIN_KERNEL_ADDRESS; 59990643Sbenno virtual_end = VM_MAX_KERNEL_ADDRESS; 60090643Sbenno 60197346Sbenno mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); 60297346Sbenno CTR0(KTR_PMAP, "pmap_bootstrap: physical memory"); 60397346Sbenno 60497346Sbenno qsort(pregions, pregions_sz, sizeof(*pregions), mr_cmp); 60597346Sbenno for (i = 0; i < pregions_sz; i++) { 606103604Sgrehan vm_offset_t pa; 607103604Sgrehan vm_offset_t end; 608103604Sgrehan 60997346Sbenno CTR3(KTR_PMAP, "physregion: %#x - %#x (%#x)", 61097346Sbenno pregions[i].mr_start, 61197346Sbenno pregions[i].mr_start + pregions[i].mr_size, 61297346Sbenno pregions[i].mr_size); 613103604Sgrehan /* 614103604Sgrehan * Install entries into the BAT table to allow all 615103604Sgrehan * of physmem to be convered by on-demand BAT entries. 616103604Sgrehan * The loop will sometimes set the same battable element 617103604Sgrehan * twice, but that's fine since they won't be used for 618103604Sgrehan * a while yet. 619103604Sgrehan */ 620103604Sgrehan pa = pregions[i].mr_start & 0xf0000000; 621103604Sgrehan end = pregions[i].mr_start + pregions[i].mr_size; 622103604Sgrehan do { 623103604Sgrehan u_int n = pa >> ADDR_SR_SHFT; 624103604Sgrehan 625103604Sgrehan battable[n].batl = BATL(pa, BAT_M, BAT_PP_RW); 626103604Sgrehan battable[n].batu = BATU(pa, BAT_BL_256M, BAT_Vs); 627103604Sgrehan pa += SEGMENT_LENGTH; 628103604Sgrehan } while (pa < end); 62997346Sbenno } 63097346Sbenno 63197346Sbenno if (sizeof(phys_avail)/sizeof(phys_avail[0]) < regions_sz) 63290643Sbenno panic("pmap_bootstrap: phys_avail too small"); 63397346Sbenno qsort(regions, regions_sz, sizeof(*regions), mr_cmp); 63490643Sbenno phys_avail_count = 0; 63591793Sbenno physsz = 0; 63697346Sbenno for (i = 0, j = 0; i < regions_sz; i++, j += 2) { 63790643Sbenno CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start, 63890643Sbenno regions[i].mr_start + regions[i].mr_size, 63990643Sbenno regions[i].mr_size); 64090643Sbenno phys_avail[j] = regions[i].mr_start; 64190643Sbenno phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; 64290643Sbenno phys_avail_count++; 64391793Sbenno physsz += regions[i].mr_size; 64477957Sbenno } 64591793Sbenno physmem = btoc(physsz); 64677957Sbenno 64777957Sbenno /* 64890643Sbenno * Allocate PTEG table. 64977957Sbenno */ 65090643Sbenno#ifdef PTEGCOUNT 65190643Sbenno pmap_pteg_count = PTEGCOUNT; 65290643Sbenno#else 65390643Sbenno pmap_pteg_count = 0x1000; 65477957Sbenno 65590643Sbenno while (pmap_pteg_count < physmem) 65690643Sbenno pmap_pteg_count <<= 1; 65777957Sbenno 65890643Sbenno pmap_pteg_count >>= 1; 65990643Sbenno#endif /* PTEGCOUNT */ 66077957Sbenno 66190643Sbenno size = pmap_pteg_count * sizeof(struct pteg); 66290643Sbenno CTR2(KTR_PMAP, "pmap_bootstrap: %d PTEGs, %d bytes", pmap_pteg_count, 66390643Sbenno size); 66490643Sbenno pmap_pteg_table = (struct pteg *)pmap_bootstrap_alloc(size, size); 66590643Sbenno CTR1(KTR_PMAP, "pmap_bootstrap: PTEG table at %p", pmap_pteg_table); 66690643Sbenno bzero((void *)pmap_pteg_table, pmap_pteg_count * sizeof(struct pteg)); 66790643Sbenno pmap_pteg_mask = pmap_pteg_count - 1; 66877957Sbenno 66990643Sbenno /* 67094839Sbenno * Allocate pv/overflow lists. 67190643Sbenno */ 67290643Sbenno size = sizeof(struct pvo_head) * pmap_pteg_count; 67390643Sbenno pmap_pvo_table = (struct pvo_head *)pmap_bootstrap_alloc(size, 67490643Sbenno PAGE_SIZE); 67590643Sbenno CTR1(KTR_PMAP, "pmap_bootstrap: PVO table at %p", pmap_pvo_table); 67690643Sbenno for (i = 0; i < pmap_pteg_count; i++) 67790643Sbenno LIST_INIT(&pmap_pvo_table[i]); 67877957Sbenno 67990643Sbenno /* 68090643Sbenno * Allocate the message buffer. 68190643Sbenno */ 68290643Sbenno msgbuf_phys = pmap_bootstrap_alloc(MSGBUF_SIZE, 0); 68377957Sbenno 68490643Sbenno /* 68590643Sbenno * Initialise the unmanaged pvo pool. 68690643Sbenno */ 68799037Sbenno pmap_bpvo_pool = (struct pvo_entry *)pmap_bootstrap_alloc( 68899037Sbenno BPVO_POOL_SIZE*sizeof(struct pvo_entry), 0); 68992521Sbenno pmap_bpvo_pool_index = 0; 69077957Sbenno 69177957Sbenno /* 69290643Sbenno * Make sure kernel vsid is allocated as well as VSID 0. 69377957Sbenno */ 69490643Sbenno pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW] 69590643Sbenno |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 69690643Sbenno pmap_vsid_bitmap[0] |= 1; 69777957Sbenno 69890643Sbenno /* 69990643Sbenno * Set up the OpenFirmware pmap and add it's mappings. 70090643Sbenno */ 70190643Sbenno pmap_pinit(&ofw_pmap); 70290643Sbenno ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 70390643Sbenno if ((chosen = OF_finddevice("/chosen")) == -1) 70490643Sbenno panic("pmap_bootstrap: can't find /chosen"); 70590643Sbenno OF_getprop(chosen, "mmu", &mmui, 4); 70690643Sbenno if ((mmu = OF_instance_to_package(mmui)) == -1) 70790643Sbenno panic("pmap_bootstrap: can't get mmu package"); 70890643Sbenno if ((sz = OF_getproplen(mmu, "translations")) == -1) 70990643Sbenno panic("pmap_bootstrap: can't get ofw translation count"); 710100319Sbenno translations = NULL; 711100319Sbenno for (i = 0; phys_avail[i + 2] != 0; i += 2) { 712100319Sbenno if (phys_avail[i + 1] >= sz) 713100319Sbenno translations = (struct ofw_map *)phys_avail[i]; 714100319Sbenno } 715100319Sbenno if (translations == NULL) 716100319Sbenno panic("pmap_bootstrap: no space to copy translations"); 71790643Sbenno bzero(translations, sz); 71890643Sbenno if (OF_getprop(mmu, "translations", translations, sz) == -1) 71990643Sbenno panic("pmap_bootstrap: can't get ofw translations"); 72090643Sbenno CTR0(KTR_PMAP, "pmap_bootstrap: translations"); 72197346Sbenno sz /= sizeof(*translations); 72290643Sbenno qsort(translations, sz, sizeof (*translations), om_cmp); 723103604Sgrehan for (i = 0, ofw_mappings = 0; i < sz; i++) { 72490643Sbenno CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x", 72590643Sbenno translations[i].om_pa, translations[i].om_va, 72690643Sbenno translations[i].om_len); 72777957Sbenno 728103604Sgrehan /* 729103604Sgrehan * If the mapping is 1:1, let the RAM and device on-demand 730103604Sgrehan * BAT tables take care of the translation. 731103604Sgrehan */ 732103604Sgrehan if (translations[i].om_va == translations[i].om_pa) 733103604Sgrehan continue; 73477957Sbenno 735103604Sgrehan /* Enter the pages */ 73690643Sbenno for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) { 73790643Sbenno struct vm_page m; 73877957Sbenno 73990643Sbenno m.phys_addr = translations[i].om_pa + off; 74090643Sbenno pmap_enter(&ofw_pmap, translations[i].om_va + off, &m, 741103604Sgrehan VM_PROT_ALL, 1); 742103604Sgrehan ofw_mappings++; 74377957Sbenno } 74477957Sbenno } 74590643Sbenno#ifdef SMP 74690643Sbenno TLBSYNC(); 74790643Sbenno#endif 74877957Sbenno 74990643Sbenno /* 75090643Sbenno * Initialize the kernel pmap (which is statically allocated). 75190643Sbenno */ 75290643Sbenno for (i = 0; i < 16; i++) { 75390643Sbenno kernel_pmap->pm_sr[i] = EMPTY_SEGMENT; 75477957Sbenno } 75590643Sbenno kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 75690643Sbenno kernel_pmap->pm_active = ~0; 75777957Sbenno 75877957Sbenno /* 75990643Sbenno * Allocate a kernel stack with a guard page for thread0 and map it 76090643Sbenno * into the kernel page map. 76177957Sbenno */ 76290643Sbenno pa = pmap_bootstrap_alloc(KSTACK_PAGES * PAGE_SIZE, 0); 76390643Sbenno kstack0_phys = pa; 76490643Sbenno kstack0 = virtual_avail + (KSTACK_GUARD_PAGES * PAGE_SIZE); 76590643Sbenno CTR2(KTR_PMAP, "pmap_bootstrap: kstack0 at %#x (%#x)", kstack0_phys, 76690643Sbenno kstack0); 76790643Sbenno virtual_avail += (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE; 76890643Sbenno for (i = 0; i < KSTACK_PAGES; i++) { 76990643Sbenno pa = kstack0_phys + i * PAGE_SIZE; 77090643Sbenno va = kstack0 + i * PAGE_SIZE; 77190643Sbenno pmap_kenter(va, pa); 77290643Sbenno TLBIE(va); 77377957Sbenno } 77477957Sbenno 77590643Sbenno /* 77690643Sbenno * Calculate the first and last available physical addresses. 77790643Sbenno */ 77890643Sbenno avail_start = phys_avail[0]; 77990643Sbenno for (i = 0; phys_avail[i + 2] != 0; i += 2) 78090643Sbenno ; 78190643Sbenno avail_end = phys_avail[i + 1]; 78290643Sbenno Maxmem = powerpc_btop(avail_end); 78377957Sbenno 78477957Sbenno /* 78590643Sbenno * Allocate virtual address space for the message buffer. 78677957Sbenno */ 78790643Sbenno msgbufp = (struct msgbuf *)virtual_avail; 78890643Sbenno virtual_avail += round_page(MSGBUF_SIZE); 78977957Sbenno 79077957Sbenno /* 79190643Sbenno * Initialize hardware. 79277957Sbenno */ 79377957Sbenno for (i = 0; i < 16; i++) { 79494836Sbenno mtsrin(i << ADDR_SR_SHFT, EMPTY_SEGMENT); 79577957Sbenno } 79677957Sbenno __asm __volatile ("mtsr %0,%1" 79790643Sbenno :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 79877957Sbenno __asm __volatile ("sync; mtsdr1 %0; isync" 79990643Sbenno :: "r"((u_int)pmap_pteg_table | (pmap_pteg_mask >> 10))); 80077957Sbenno tlbia(); 80177957Sbenno 80290643Sbenno pmap_bootstrapped++; 80377957Sbenno} 80477957Sbenno 80577957Sbenno/* 80690643Sbenno * Activate a user pmap. The pmap must be activated before it's address 80790643Sbenno * space can be accessed in any way. 80877957Sbenno */ 80977957Sbennovoid 81090643Sbennopmap_activate(struct thread *td) 81177957Sbenno{ 81296250Sbenno pmap_t pm, pmr; 81377957Sbenno 81477957Sbenno /* 815103604Sgrehan * Load all the data we need up front to encourage the compiler to 81690643Sbenno * not issue any loads while we have interrupts disabled below. 81777957Sbenno */ 81890643Sbenno pm = &td->td_proc->p_vmspace->vm_pmap; 81977957Sbenno 82096250Sbenno if ((pmr = (pmap_t)pmap_kextract((vm_offset_t)pm)) == NULL) 82196250Sbenno pmr = pm; 82296250Sbenno 82390643Sbenno pm->pm_active |= PCPU_GET(cpumask); 82496250Sbenno PCPU_SET(curpmap, pmr); 82577957Sbenno} 82677957Sbenno 82791483Sbennovoid 82891483Sbennopmap_deactivate(struct thread *td) 82991483Sbenno{ 83091483Sbenno pmap_t pm; 83191483Sbenno 83291483Sbenno pm = &td->td_proc->p_vmspace->vm_pmap; 83391483Sbenno pm->pm_active &= ~(PCPU_GET(cpumask)); 83496250Sbenno PCPU_SET(curpmap, NULL); 83591483Sbenno} 83691483Sbenno 83790643Sbennovm_offset_t 83890643Sbennopmap_addr_hint(vm_object_t object, vm_offset_t va, vm_size_t size) 83977957Sbenno{ 84096353Sbenno 84196353Sbenno return (va); 84277957Sbenno} 84377957Sbenno 84477957Sbennovoid 84596353Sbennopmap_change_wiring(pmap_t pm, vm_offset_t va, boolean_t wired) 84677957Sbenno{ 84796353Sbenno struct pvo_entry *pvo; 84896353Sbenno 84996353Sbenno pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 85096353Sbenno 85196353Sbenno if (pvo != NULL) { 85296353Sbenno if (wired) { 85396353Sbenno if ((pvo->pvo_vaddr & PVO_WIRED) == 0) 85496353Sbenno pm->pm_stats.wired_count++; 85596353Sbenno pvo->pvo_vaddr |= PVO_WIRED; 85696353Sbenno } else { 85796353Sbenno if ((pvo->pvo_vaddr & PVO_WIRED) != 0) 85896353Sbenno pm->pm_stats.wired_count--; 85996353Sbenno pvo->pvo_vaddr &= ~PVO_WIRED; 86096353Sbenno } 86196353Sbenno } 86277957Sbenno} 86377957Sbenno 86477957Sbennovoid 86590643Sbennopmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, 86690643Sbenno vm_size_t len, vm_offset_t src_addr) 86777957Sbenno{ 86897385Sbenno 86997385Sbenno /* 87097385Sbenno * This is not needed as it's mainly an optimisation. 87197385Sbenno * It may want to be implemented later though. 87297385Sbenno */ 87377957Sbenno} 87477957Sbenno 87577957Sbennovoid 87697385Sbennopmap_copy_page(vm_page_t msrc, vm_page_t mdst) 87777957Sbenno{ 87897385Sbenno vm_offset_t dst; 87997385Sbenno vm_offset_t src; 88097385Sbenno 88197385Sbenno dst = VM_PAGE_TO_PHYS(mdst); 88297385Sbenno src = VM_PAGE_TO_PHYS(msrc); 88397385Sbenno 88497385Sbenno kcopy((void *)src, (void *)dst, PAGE_SIZE); 88577957Sbenno} 88677957Sbenno 88777957Sbenno/* 88890643Sbenno * Zero a page of physical memory by temporarily mapping it into the tlb. 88977957Sbenno */ 89077957Sbennovoid 89194777Speterpmap_zero_page(vm_page_t m) 89277957Sbenno{ 89394777Speter vm_offset_t pa = VM_PAGE_TO_PHYS(m); 894110172Sgrehan caddr_t va; 89577957Sbenno 89690643Sbenno if (pa < SEGMENT_LENGTH) { 89790643Sbenno va = (caddr_t) pa; 89890643Sbenno } else if (pmap_initialized) { 89990643Sbenno if (pmap_pvo_zeropage == NULL) 90090643Sbenno pmap_pvo_zeropage = pmap_rkva_alloc(); 90190643Sbenno pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 90290643Sbenno va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 90390643Sbenno } else { 90490643Sbenno panic("pmap_zero_page: can't zero pa %#x", pa); 90577957Sbenno } 90690643Sbenno 90790643Sbenno bzero(va, PAGE_SIZE); 90890643Sbenno 90990643Sbenno if (pa >= SEGMENT_LENGTH) 91090643Sbenno pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 91177957Sbenno} 91277957Sbenno 91377957Sbennovoid 91494777Speterpmap_zero_page_area(vm_page_t m, int off, int size) 91577957Sbenno{ 91699666Sbenno vm_offset_t pa = VM_PAGE_TO_PHYS(m); 917103604Sgrehan caddr_t va; 91899666Sbenno 91999666Sbenno if (pa < SEGMENT_LENGTH) { 92099666Sbenno va = (caddr_t) pa; 92199666Sbenno } else if (pmap_initialized) { 92299666Sbenno if (pmap_pvo_zeropage == NULL) 92399666Sbenno pmap_pvo_zeropage = pmap_rkva_alloc(); 92499666Sbenno pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 92599666Sbenno va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 92699666Sbenno } else { 92799666Sbenno panic("pmap_zero_page: can't zero pa %#x", pa); 92899666Sbenno } 92999666Sbenno 930103604Sgrehan bzero(va + off, size); 93199666Sbenno 93299666Sbenno if (pa >= SEGMENT_LENGTH) 93399666Sbenno pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 93477957Sbenno} 93577957Sbenno 93699571Spetervoid 93799571Speterpmap_zero_page_idle(vm_page_t m) 93899571Speter{ 93999571Speter 94099571Speter /* XXX this is called outside of Giant, is pmap_zero_page safe? */ 94199571Speter /* XXX maybe have a dedicated mapping for this to avoid the problem? */ 94299571Speter mtx_lock(&Giant); 94399571Speter pmap_zero_page(m); 94499571Speter mtx_unlock(&Giant); 94599571Speter} 94699571Speter 94777957Sbenno/* 94890643Sbenno * Map the given physical page at the specified virtual address in the 94990643Sbenno * target pmap with the protection requested. If specified the page 95090643Sbenno * will be wired down. 95177957Sbenno */ 95277957Sbennovoid 95390643Sbennopmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 95490643Sbenno boolean_t wired) 95577957Sbenno{ 95690643Sbenno struct pvo_head *pvo_head; 95792847Sjeff uma_zone_t zone; 95896250Sbenno vm_page_t pg; 95996250Sbenno u_int pte_lo, pvo_flags, was_exec, i; 96090643Sbenno int error; 96177957Sbenno 96290643Sbenno if (!pmap_initialized) { 96390643Sbenno pvo_head = &pmap_pvo_kunmanaged; 96490643Sbenno zone = pmap_upvo_zone; 96590643Sbenno pvo_flags = 0; 96696250Sbenno pg = NULL; 96796250Sbenno was_exec = PTE_EXEC; 96890643Sbenno } else { 969110172Sgrehan pvo_head = vm_page_to_pvoh(m); 970110172Sgrehan pg = m; 97190643Sbenno zone = pmap_mpvo_zone; 97290643Sbenno pvo_flags = PVO_MANAGED; 97396250Sbenno was_exec = 0; 97490643Sbenno } 97577957Sbenno 97696250Sbenno /* 97796250Sbenno * If this is a managed page, and it's the first reference to the page, 97896250Sbenno * clear the execness of the page. Otherwise fetch the execness. 97996250Sbenno */ 98096250Sbenno if (pg != NULL) { 98196250Sbenno if (LIST_EMPTY(pvo_head)) { 98296250Sbenno pmap_attr_clear(pg, PTE_EXEC); 98396250Sbenno } else { 98496250Sbenno was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 98596250Sbenno } 98696250Sbenno } 98796250Sbenno 98896250Sbenno 98996250Sbenno /* 99096250Sbenno * Assume the page is cache inhibited and access is guarded unless 99196250Sbenno * it's in our available memory array. 99296250Sbenno */ 99390643Sbenno pte_lo = PTE_I | PTE_G; 99497346Sbenno for (i = 0; i < pregions_sz; i++) { 99597346Sbenno if ((VM_PAGE_TO_PHYS(m) >= pregions[i].mr_start) && 99697346Sbenno (VM_PAGE_TO_PHYS(m) < 99797346Sbenno (pregions[i].mr_start + pregions[i].mr_size))) { 99896250Sbenno pte_lo &= ~(PTE_I | PTE_G); 99996250Sbenno break; 100096250Sbenno } 100196250Sbenno } 100277957Sbenno 100390643Sbenno if (prot & VM_PROT_WRITE) 100490643Sbenno pte_lo |= PTE_BW; 100590643Sbenno else 100690643Sbenno pte_lo |= PTE_BR; 100777957Sbenno 100896250Sbenno pvo_flags |= (prot & VM_PROT_EXECUTE); 100977957Sbenno 101090643Sbenno if (wired) 101190643Sbenno pvo_flags |= PVO_WIRED; 101277957Sbenno 101396250Sbenno error = pmap_pvo_enter(pmap, zone, pvo_head, va, VM_PAGE_TO_PHYS(m), 101496250Sbenno pte_lo, pvo_flags); 101590643Sbenno 101696250Sbenno /* 101796250Sbenno * Flush the real page from the instruction cache if this page is 101896250Sbenno * mapped executable and cacheable and was not previously mapped (or 101996250Sbenno * was not mapped executable). 102096250Sbenno */ 102196250Sbenno if (error == 0 && (pvo_flags & PVO_EXECUTABLE) && 102296250Sbenno (pte_lo & PTE_I) == 0 && was_exec == 0) { 102377957Sbenno /* 102490643Sbenno * Flush the real memory from the cache. 102577957Sbenno */ 102696250Sbenno pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 102796250Sbenno if (pg != NULL) 102896250Sbenno pmap_attr_save(pg, PTE_EXEC); 102977957Sbenno } 1030103604Sgrehan 1031103604Sgrehan /* XXX syncicache always until problems are sorted */ 1032103604Sgrehan pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 103377957Sbenno} 103477957Sbenno 1035117045Salcvm_page_t 1036117045Salcpmap_enter_quick(pmap_t pm, vm_offset_t va, vm_page_t m, vm_page_t mpte) 1037117045Salc{ 1038117045Salc 1039117045Salc pmap_enter(pm, va, m, VM_PROT_READ | VM_PROT_EXECUTE, FALSE); 1040117045Salc return (NULL); 1041117045Salc} 1042117045Salc 104390643Sbennovm_offset_t 104496353Sbennopmap_extract(pmap_t pm, vm_offset_t va) 104577957Sbenno{ 104696353Sbenno struct pvo_entry *pvo; 104796353Sbenno 104896353Sbenno pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 104996353Sbenno 105096353Sbenno if (pvo != NULL) { 105196353Sbenno return ((pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF)); 105296353Sbenno } 105396353Sbenno 105490643Sbenno return (0); 105577957Sbenno} 105677957Sbenno 105777957Sbenno/* 105890643Sbenno * Grow the number of kernel page table entries. Unneeded. 105977957Sbenno */ 106090643Sbennovoid 106190643Sbennopmap_growkernel(vm_offset_t addr) 106277957Sbenno{ 106390643Sbenno} 106477957Sbenno 106590643Sbennovoid 106690643Sbennopmap_init(vm_offset_t phys_start, vm_offset_t phys_end) 106790643Sbenno{ 106877957Sbenno 106994753Sbenno CTR0(KTR_PMAP, "pmap_init"); 107077957Sbenno 107192847Sjeff pmap_upvo_zone = uma_zcreate("UPVO entry", sizeof (struct pvo_entry), 107299037Sbenno NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM); 107392654Sjeff uma_zone_set_allocf(pmap_upvo_zone, pmap_pvo_allocf); 107492847Sjeff pmap_mpvo_zone = uma_zcreate("MPVO entry", sizeof(struct pvo_entry), 107599037Sbenno NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM); 107692654Sjeff uma_zone_set_allocf(pmap_mpvo_zone, pmap_pvo_allocf); 107790643Sbenno pmap_initialized = TRUE; 107877957Sbenno} 107977957Sbenno 108099037Sbennovoid 108199037Sbennopmap_init2(void) 108299037Sbenno{ 108399037Sbenno 108499037Sbenno CTR0(KTR_PMAP, "pmap_init2"); 108599037Sbenno} 108699037Sbenno 108790643Sbennoboolean_t 108890643Sbennopmap_is_modified(vm_page_t m) 108990643Sbenno{ 109096353Sbenno 1091110172Sgrehan if ((m->flags & (PG_FICTITIOUS |PG_UNMANAGED)) != 0) 109296353Sbenno return (FALSE); 109396353Sbenno 109496353Sbenno return (pmap_query_bit(m, PTE_CHG)); 109590643Sbenno} 109690643Sbenno 109790643Sbennovoid 109890643Sbennopmap_clear_reference(vm_page_t m) 109990643Sbenno{ 1100110172Sgrehan 1101110172Sgrehan if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 1102110172Sgrehan return; 1103110172Sgrehan pmap_clear_bit(m, PTE_REF, NULL); 110490643Sbenno} 110590643Sbenno 1106110172Sgrehanvoid 1107110172Sgrehanpmap_clear_modify(vm_page_t m) 1108110172Sgrehan{ 1109110172Sgrehan 1110110172Sgrehan if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 1111110172Sgrehan return; 1112110172Sgrehan pmap_clear_bit(m, PTE_CHG, NULL); 1113110172Sgrehan} 1114110172Sgrehan 111591403Ssilby/* 111691403Ssilby * pmap_ts_referenced: 111791403Ssilby * 111891403Ssilby * Return a count of reference bits for a page, clearing those bits. 111991403Ssilby * It is not necessary for every reference bit to be cleared, but it 112091403Ssilby * is necessary that 0 only be returned when there are truly no 112191403Ssilby * reference bits set. 112291403Ssilby * 112391403Ssilby * XXX: The exact number of bits to check and clear is a matter that 112491403Ssilby * should be tested and standardized at some point in the future for 112591403Ssilby * optimal aging of shared pages. 112691403Ssilby */ 112790643Sbennoint 112890643Sbennopmap_ts_referenced(vm_page_t m) 112990643Sbenno{ 1130110172Sgrehan int count; 1131110172Sgrehan 1132110172Sgrehan if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 1133110172Sgrehan return (0); 1134110172Sgrehan 1135110172Sgrehan count = pmap_clear_bit(m, PTE_REF, NULL); 1136110172Sgrehan 1137110172Sgrehan return (count); 113890643Sbenno} 113990643Sbenno 114077957Sbenno/* 114190643Sbenno * Map a wired page into kernel virtual address space. 114277957Sbenno */ 114377957Sbennovoid 114490643Sbennopmap_kenter(vm_offset_t va, vm_offset_t pa) 114577957Sbenno{ 114690643Sbenno u_int pte_lo; 114790643Sbenno int error; 114890643Sbenno int i; 114977957Sbenno 115090643Sbenno#if 0 115190643Sbenno if (va < VM_MIN_KERNEL_ADDRESS) 115290643Sbenno panic("pmap_kenter: attempt to enter non-kernel address %#x", 115390643Sbenno va); 115490643Sbenno#endif 115577957Sbenno 1156103604Sgrehan pte_lo = PTE_I | PTE_G; 1157103604Sgrehan for (i = 0; i < pregions_sz; i++) { 1158103604Sgrehan if ((pa >= pregions[i].mr_start) && 1159103604Sgrehan (pa < (pregions[i].mr_start + pregions[i].mr_size))) { 116090643Sbenno pte_lo &= ~(PTE_I | PTE_G); 116177957Sbenno break; 116277957Sbenno } 1163103604Sgrehan } 116477957Sbenno 116590643Sbenno error = pmap_pvo_enter(kernel_pmap, pmap_upvo_zone, 116690643Sbenno &pmap_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED); 116790643Sbenno 116890643Sbenno if (error != 0 && error != ENOENT) 116990643Sbenno panic("pmap_kenter: failed to enter va %#x pa %#x: %d", va, 117090643Sbenno pa, error); 117190643Sbenno 117277957Sbenno /* 117390643Sbenno * Flush the real memory from the instruction cache. 117477957Sbenno */ 117590643Sbenno if ((pte_lo & (PTE_I | PTE_G)) == 0) { 117690643Sbenno pmap_syncicache(pa, PAGE_SIZE); 117777957Sbenno } 117877957Sbenno} 117977957Sbenno 118094838Sbenno/* 118194838Sbenno * Extract the physical page address associated with the given kernel virtual 118294838Sbenno * address. 118394838Sbenno */ 118490643Sbennovm_offset_t 118590643Sbennopmap_kextract(vm_offset_t va) 118677957Sbenno{ 118794838Sbenno struct pvo_entry *pvo; 118894838Sbenno 118994838Sbenno pvo = pmap_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, NULL); 119094838Sbenno if (pvo == NULL) { 119194838Sbenno return (0); 119294838Sbenno } 119394838Sbenno 119494838Sbenno return ((pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF)); 119577957Sbenno} 119677957Sbenno 119791456Sbenno/* 119891456Sbenno * Remove a wired page from kernel virtual address space. 119991456Sbenno */ 120077957Sbennovoid 120177957Sbennopmap_kremove(vm_offset_t va) 120277957Sbenno{ 120391456Sbenno 1204103604Sgrehan pmap_remove(kernel_pmap, va, va + PAGE_SIZE); 120577957Sbenno} 120677957Sbenno 120777957Sbenno/* 120890643Sbenno * Map a range of physical addresses into kernel virtual address space. 120990643Sbenno * 121090643Sbenno * The value passed in *virt is a suggested virtual address for the mapping. 121190643Sbenno * Architectures which can support a direct-mapped physical to virtual region 121290643Sbenno * can return the appropriate address within that region, leaving '*virt' 121390643Sbenno * unchanged. We cannot and therefore do not; *virt is updated with the 121490643Sbenno * first usable address after the mapped region. 121577957Sbenno */ 121690643Sbennovm_offset_t 121790643Sbennopmap_map(vm_offset_t *virt, vm_offset_t pa_start, vm_offset_t pa_end, int prot) 121877957Sbenno{ 121990643Sbenno vm_offset_t sva, va; 122077957Sbenno 122190643Sbenno sva = *virt; 122290643Sbenno va = sva; 122390643Sbenno for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE) 122490643Sbenno pmap_kenter(va, pa_start); 122590643Sbenno *virt = va; 122690643Sbenno return (sva); 122777957Sbenno} 122877957Sbenno 122990643Sbennoint 123090643Sbennopmap_mincore(pmap_t pmap, vm_offset_t addr) 123177957Sbenno{ 123290643Sbenno TODO; 123390643Sbenno return (0); 123477957Sbenno} 123577957Sbenno 123677957Sbennovoid 123794838Sbennopmap_object_init_pt(pmap_t pm, vm_offset_t addr, vm_object_t object, 1238117206Salc vm_pindex_t pindex, vm_size_t size) 123990643Sbenno{ 124094838Sbenno 1241117206Salc VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 1242117206Salc KASSERT(object->type == OBJT_DEVICE, 1243117206Salc ("pmap_object_init_pt: non-device object")); 124494838Sbenno KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1245117206Salc ("pmap_object_init_pt: non current pmap")); 124677957Sbenno} 124777957Sbenno 124877957Sbenno/* 124990643Sbenno * Lower the permission for all mappings to a given page. 125077957Sbenno */ 125177957Sbennovoid 125277957Sbennopmap_page_protect(vm_page_t m, vm_prot_t prot) 125377957Sbenno{ 125490643Sbenno struct pvo_head *pvo_head; 125590643Sbenno struct pvo_entry *pvo, *next_pvo; 125690643Sbenno struct pte *pt; 125777957Sbenno 125890643Sbenno /* 125990643Sbenno * Since the routine only downgrades protection, if the 126090643Sbenno * maximal protection is desired, there isn't any change 126190643Sbenno * to be made. 126290643Sbenno */ 126390643Sbenno if ((prot & (VM_PROT_READ|VM_PROT_WRITE)) == 126490643Sbenno (VM_PROT_READ|VM_PROT_WRITE)) 126577957Sbenno return; 126677957Sbenno 126790643Sbenno pvo_head = vm_page_to_pvoh(m); 126890643Sbenno for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 126990643Sbenno next_pvo = LIST_NEXT(pvo, pvo_vlink); 127090643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 127190643Sbenno 127290643Sbenno /* 127390643Sbenno * Downgrading to no mapping at all, we just remove the entry. 127490643Sbenno */ 127590643Sbenno if ((prot & VM_PROT_READ) == 0) { 127690643Sbenno pmap_pvo_remove(pvo, -1); 127790643Sbenno continue; 127877957Sbenno } 127990643Sbenno 128090643Sbenno /* 128190643Sbenno * If EXEC permission is being revoked, just clear the flag 128290643Sbenno * in the PVO. 128390643Sbenno */ 128490643Sbenno if ((prot & VM_PROT_EXECUTE) == 0) 128590643Sbenno pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 128690643Sbenno 128790643Sbenno /* 128890643Sbenno * If this entry is already RO, don't diddle with the page 128990643Sbenno * table. 129090643Sbenno */ 129190643Sbenno if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 129290643Sbenno PMAP_PVO_CHECK(pvo); 129390643Sbenno continue; 129477957Sbenno } 129590643Sbenno 129690643Sbenno /* 129790643Sbenno * Grab the PTE before we diddle the bits so pvo_to_pte can 129890643Sbenno * verify the pte contents are as expected. 129990643Sbenno */ 130090643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 130190643Sbenno pvo->pvo_pte.pte_lo &= ~PTE_PP; 130290643Sbenno pvo->pvo_pte.pte_lo |= PTE_BR; 130390643Sbenno if (pt != NULL) 130490643Sbenno pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 130590643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 130677957Sbenno } 130777957Sbenno} 130877957Sbenno 130977957Sbenno/* 131091403Ssilby * Returns true if the pmap's pv is one of the first 131191403Ssilby * 16 pvs linked to from this page. This count may 131291403Ssilby * be changed upwards or downwards in the future; it 131391403Ssilby * is only necessary that true be returned for a small 131491403Ssilby * subset of pmaps for proper page aging. 131591403Ssilby */ 131690643Sbennoboolean_t 131791403Ssilbypmap_page_exists_quick(pmap_t pmap, vm_page_t m) 131890643Sbenno{ 1319110172Sgrehan int loops; 1320110172Sgrehan struct pvo_entry *pvo; 1321110172Sgrehan 1322110172Sgrehan if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 1323110172Sgrehan return FALSE; 1324110172Sgrehan 1325110172Sgrehan loops = 0; 1326110172Sgrehan LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 1327110172Sgrehan if (pvo->pvo_pmap == pmap) 1328110172Sgrehan return (TRUE); 1329110172Sgrehan if (++loops >= 16) 1330110172Sgrehan break; 1331110172Sgrehan } 1332110172Sgrehan 1333110172Sgrehan return (FALSE); 133490643Sbenno} 133577957Sbenno 133690643Sbennostatic u_int pmap_vsidcontext; 133777957Sbenno 133890643Sbennovoid 133990643Sbennopmap_pinit(pmap_t pmap) 134090643Sbenno{ 134190643Sbenno int i, mask; 134290643Sbenno u_int entropy; 134377957Sbenno 134490643Sbenno entropy = 0; 134590643Sbenno __asm __volatile("mftb %0" : "=r"(entropy)); 134677957Sbenno 134790643Sbenno /* 134890643Sbenno * Allocate some segment registers for this pmap. 134990643Sbenno */ 135090643Sbenno for (i = 0; i < NPMAPS; i += VSID_NBPW) { 135190643Sbenno u_int hash, n; 135277957Sbenno 135377957Sbenno /* 135490643Sbenno * Create a new value by mutiplying by a prime and adding in 135590643Sbenno * entropy from the timebase register. This is to make the 135690643Sbenno * VSID more random so that the PT hash function collides 135790643Sbenno * less often. (Note that the prime casues gcc to do shifts 135890643Sbenno * instead of a multiply.) 135977957Sbenno */ 136090643Sbenno pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 136190643Sbenno hash = pmap_vsidcontext & (NPMAPS - 1); 136290643Sbenno if (hash == 0) /* 0 is special, avoid it */ 136390643Sbenno continue; 136490643Sbenno n = hash >> 5; 136590643Sbenno mask = 1 << (hash & (VSID_NBPW - 1)); 136690643Sbenno hash = (pmap_vsidcontext & 0xfffff); 136790643Sbenno if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 136890643Sbenno /* anything free in this bucket? */ 136990643Sbenno if (pmap_vsid_bitmap[n] == 0xffffffff) { 137090643Sbenno entropy = (pmap_vsidcontext >> 20); 137190643Sbenno continue; 137290643Sbenno } 137390643Sbenno i = ffs(~pmap_vsid_bitmap[i]) - 1; 137490643Sbenno mask = 1 << i; 137590643Sbenno hash &= 0xfffff & ~(VSID_NBPW - 1); 137690643Sbenno hash |= i; 137777957Sbenno } 137890643Sbenno pmap_vsid_bitmap[n] |= mask; 137990643Sbenno for (i = 0; i < 16; i++) 138090643Sbenno pmap->pm_sr[i] = VSID_MAKE(i, hash); 138190643Sbenno return; 138290643Sbenno } 138377957Sbenno 138490643Sbenno panic("pmap_pinit: out of segments"); 138577957Sbenno} 138677957Sbenno 138777957Sbenno/* 138890643Sbenno * Initialize the pmap associated with process 0. 138977957Sbenno */ 139077957Sbennovoid 139190643Sbennopmap_pinit0(pmap_t pm) 139277957Sbenno{ 139377957Sbenno 139490643Sbenno pmap_pinit(pm); 139590643Sbenno bzero(&pm->pm_stats, sizeof(pm->pm_stats)); 139677957Sbenno} 139777957Sbenno 139877957Sbennovoid 139990643Sbennopmap_pinit2(pmap_t pmap) 140077957Sbenno{ 140190643Sbenno /* XXX: Remove this stub when no longer called */ 140290643Sbenno} 140377957Sbenno 140490643Sbennovoid 140591802Sbennopmap_prefault(pmap_t pm, vm_offset_t va, vm_map_entry_t entry) 140690643Sbenno{ 140791802Sbenno KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 140891802Sbenno ("pmap_prefault: non current pmap")); 140991802Sbenno /* XXX */ 141090643Sbenno} 141177957Sbenno 141294838Sbenno/* 141394838Sbenno * Set the physical protection on the specified range of this map as requested. 141494838Sbenno */ 141590643Sbennovoid 141694838Sbennopmap_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 141790643Sbenno{ 141894838Sbenno struct pvo_entry *pvo; 141994838Sbenno struct pte *pt; 142094838Sbenno int pteidx; 142194838Sbenno 142294838Sbenno CTR4(KTR_PMAP, "pmap_protect: pm=%p sva=%#x eva=%#x prot=%#x", pm, sva, 142394838Sbenno eva, prot); 142494838Sbenno 142594838Sbenno 142694838Sbenno KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 142794838Sbenno ("pmap_protect: non current pmap")); 142894838Sbenno 142994838Sbenno if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 143094838Sbenno pmap_remove(pm, sva, eva); 143194838Sbenno return; 143294838Sbenno } 143394838Sbenno 143494838Sbenno for (; sva < eva; sva += PAGE_SIZE) { 143594838Sbenno pvo = pmap_pvo_find_va(pm, sva, &pteidx); 143694838Sbenno if (pvo == NULL) 143794838Sbenno continue; 143894838Sbenno 143994838Sbenno if ((prot & VM_PROT_EXECUTE) == 0) 144094838Sbenno pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 144194838Sbenno 144294838Sbenno /* 144394838Sbenno * Grab the PTE pointer before we diddle with the cached PTE 144494838Sbenno * copy. 144594838Sbenno */ 144694838Sbenno pt = pmap_pvo_to_pte(pvo, pteidx); 144794838Sbenno /* 144894838Sbenno * Change the protection of the page. 144994838Sbenno */ 145094838Sbenno pvo->pvo_pte.pte_lo &= ~PTE_PP; 145194838Sbenno pvo->pvo_pte.pte_lo |= PTE_BR; 145294838Sbenno 145394838Sbenno /* 145494838Sbenno * If the PVO is in the page table, update that pte as well. 145594838Sbenno */ 145694838Sbenno if (pt != NULL) 145794838Sbenno pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 145894838Sbenno } 145977957Sbenno} 146077957Sbenno 146191456Sbenno/* 146291456Sbenno * Map a list of wired pages into kernel virtual address space. This is 146391456Sbenno * intended for temporary mappings which do not need page modification or 146491456Sbenno * references recorded. Existing mappings in the region are overwritten. 146591456Sbenno */ 146690643Sbennovoid 1467110172Sgrehanpmap_qenter(vm_offset_t sva, vm_page_t *m, int count) 146877957Sbenno{ 1469110172Sgrehan vm_offset_t va; 147077957Sbenno 1471110172Sgrehan va = sva; 1472110172Sgrehan while (count-- > 0) { 1473110172Sgrehan pmap_kenter(va, VM_PAGE_TO_PHYS(*m)); 1474110172Sgrehan va += PAGE_SIZE; 1475110172Sgrehan m++; 1476110172Sgrehan } 147790643Sbenno} 147877957Sbenno 147991456Sbenno/* 148091456Sbenno * Remove page mappings from kernel virtual address space. Intended for 148191456Sbenno * temporary mappings entered by pmap_qenter. 148291456Sbenno */ 148390643Sbennovoid 1484110172Sgrehanpmap_qremove(vm_offset_t sva, int count) 148590643Sbenno{ 1486110172Sgrehan vm_offset_t va; 148791456Sbenno 1488110172Sgrehan va = sva; 1489110172Sgrehan while (count-- > 0) { 149091456Sbenno pmap_kremove(va); 1491110172Sgrehan va += PAGE_SIZE; 1492110172Sgrehan } 149377957Sbenno} 149477957Sbenno 149590643Sbennovoid 149690643Sbennopmap_release(pmap_t pmap) 149790643Sbenno{ 1498103604Sgrehan int idx, mask; 1499103604Sgrehan 1500103604Sgrehan /* 1501103604Sgrehan * Free segment register's VSID 1502103604Sgrehan */ 1503103604Sgrehan if (pmap->pm_sr[0] == 0) 1504103604Sgrehan panic("pmap_release"); 1505103604Sgrehan 1506103604Sgrehan idx = VSID_TO_HASH(pmap->pm_sr[0]) & (NPMAPS-1); 1507103604Sgrehan mask = 1 << (idx % VSID_NBPW); 1508103604Sgrehan idx /= VSID_NBPW; 1509103604Sgrehan pmap_vsid_bitmap[idx] &= ~mask; 151077957Sbenno} 151177957Sbenno 151291456Sbenno/* 151391456Sbenno * Remove the given range of addresses from the specified map. 151491456Sbenno */ 151590643Sbennovoid 151691456Sbennopmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 151777957Sbenno{ 151891456Sbenno struct pvo_entry *pvo; 151991456Sbenno int pteidx; 152091456Sbenno 152191456Sbenno for (; sva < eva; sva += PAGE_SIZE) { 152291456Sbenno pvo = pmap_pvo_find_va(pm, sva, &pteidx); 152391456Sbenno if (pvo != NULL) { 152491456Sbenno pmap_pvo_remove(pvo, pteidx); 152591456Sbenno } 152691456Sbenno } 152777957Sbenno} 152877957Sbenno 152994838Sbenno/* 1530110172Sgrehan * Remove physical page from all pmaps in which it resides. pmap_pvo_remove() 1531110172Sgrehan * will reflect changes in pte's back to the vm_page. 1532110172Sgrehan */ 1533110172Sgrehanvoid 1534110172Sgrehanpmap_remove_all(vm_page_t m) 1535110172Sgrehan{ 1536110172Sgrehan struct pvo_head *pvo_head; 1537110172Sgrehan struct pvo_entry *pvo, *next_pvo; 1538110172Sgrehan 1539110172Sgrehan KASSERT((m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0, 1540110172Sgrehan ("pv_remove_all: illegal for unmanaged page %#x", 1541110172Sgrehan VM_PAGE_TO_PHYS(m))); 1542110172Sgrehan 1543110172Sgrehan pvo_head = vm_page_to_pvoh(m); 1544110172Sgrehan for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 1545110172Sgrehan next_pvo = LIST_NEXT(pvo, pvo_vlink); 1546110172Sgrehan 1547110172Sgrehan PMAP_PVO_CHECK(pvo); /* sanity check */ 1548110172Sgrehan pmap_pvo_remove(pvo, -1); 1549110172Sgrehan } 1550110172Sgrehan vm_page_flag_clear(m, PG_WRITEABLE); 1551110172Sgrehan} 1552110172Sgrehan 1553110172Sgrehan/* 155494838Sbenno * Remove all pages from specified address space, this aids process exit 155594838Sbenno * speeds. This is much faster than pmap_remove in the case of running down 155694838Sbenno * an entire address space. Only works for the current pmap. 155794838Sbenno */ 155890643Sbennovoid 155994838Sbennopmap_remove_pages(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 156077957Sbenno{ 156194838Sbenno 156294838Sbenno KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 156394838Sbenno ("pmap_remove_pages: non current pmap")); 156494838Sbenno pmap_remove(pm, sva, eva); 156577957Sbenno} 156677957Sbenno 156777957Sbenno/* 156890643Sbenno * Allocate a physical page of memory directly from the phys_avail map. 156990643Sbenno * Can only be called from pmap_bootstrap before avail start and end are 157090643Sbenno * calculated. 157183682Smp */ 157290643Sbennostatic vm_offset_t 157390643Sbennopmap_bootstrap_alloc(vm_size_t size, u_int align) 157483682Smp{ 157590643Sbenno vm_offset_t s, e; 157690643Sbenno int i, j; 157783682Smp 157890643Sbenno size = round_page(size); 157990643Sbenno for (i = 0; phys_avail[i + 1] != 0; i += 2) { 158090643Sbenno if (align != 0) 158190643Sbenno s = (phys_avail[i] + align - 1) & ~(align - 1); 158290643Sbenno else 158390643Sbenno s = phys_avail[i]; 158490643Sbenno e = s + size; 158590643Sbenno 158690643Sbenno if (s < phys_avail[i] || e > phys_avail[i + 1]) 158790643Sbenno continue; 158890643Sbenno 158990643Sbenno if (s == phys_avail[i]) { 159090643Sbenno phys_avail[i] += size; 159190643Sbenno } else if (e == phys_avail[i + 1]) { 159290643Sbenno phys_avail[i + 1] -= size; 159390643Sbenno } else { 159490643Sbenno for (j = phys_avail_count * 2; j > i; j -= 2) { 159590643Sbenno phys_avail[j] = phys_avail[j - 2]; 159690643Sbenno phys_avail[j + 1] = phys_avail[j - 1]; 159790643Sbenno } 159890643Sbenno 159990643Sbenno phys_avail[i + 3] = phys_avail[i + 1]; 160090643Sbenno phys_avail[i + 1] = s; 160190643Sbenno phys_avail[i + 2] = e; 160290643Sbenno phys_avail_count++; 160390643Sbenno } 160490643Sbenno 160590643Sbenno return (s); 160683682Smp } 160790643Sbenno panic("pmap_bootstrap_alloc: could not allocate memory"); 160883682Smp} 160983682Smp 161083682Smp/* 161190643Sbenno * Return an unmapped pvo for a kernel virtual address. 161290643Sbenno * Used by pmap functions that operate on physical pages. 161383682Smp */ 161490643Sbennostatic struct pvo_entry * 161590643Sbennopmap_rkva_alloc(void) 161683682Smp{ 161790643Sbenno struct pvo_entry *pvo; 161890643Sbenno struct pte *pt; 161990643Sbenno vm_offset_t kva; 162090643Sbenno int pteidx; 162183682Smp 162290643Sbenno if (pmap_rkva_count == 0) 162390643Sbenno panic("pmap_rkva_alloc: no more reserved KVAs"); 162490643Sbenno 162590643Sbenno kva = pmap_rkva_start + (PAGE_SIZE * --pmap_rkva_count); 162690643Sbenno pmap_kenter(kva, 0); 162790643Sbenno 162890643Sbenno pvo = pmap_pvo_find_va(kernel_pmap, kva, &pteidx); 162990643Sbenno 163090643Sbenno if (pvo == NULL) 163190643Sbenno panic("pmap_kva_alloc: pmap_pvo_find_va failed"); 163290643Sbenno 163390643Sbenno pt = pmap_pvo_to_pte(pvo, pteidx); 163490643Sbenno 163590643Sbenno if (pt == NULL) 163690643Sbenno panic("pmap_kva_alloc: pmap_pvo_to_pte failed"); 163790643Sbenno 163890643Sbenno pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 163990643Sbenno PVO_PTEGIDX_CLR(pvo); 164090643Sbenno 164190643Sbenno pmap_pte_overflow++; 164290643Sbenno 164390643Sbenno return (pvo); 164490643Sbenno} 164590643Sbenno 164690643Sbennostatic void 164790643Sbennopmap_pa_map(struct pvo_entry *pvo, vm_offset_t pa, struct pte *saved_pt, 164890643Sbenno int *depth_p) 164990643Sbenno{ 165090643Sbenno struct pte *pt; 165190643Sbenno 165290643Sbenno /* 165390643Sbenno * If this pvo already has a valid pte, we need to save it so it can 165490643Sbenno * be restored later. We then just reload the new PTE over the old 165590643Sbenno * slot. 165690643Sbenno */ 165790643Sbenno if (saved_pt != NULL) { 165890643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 165990643Sbenno 166090643Sbenno if (pt != NULL) { 166190643Sbenno pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 166290643Sbenno PVO_PTEGIDX_CLR(pvo); 166390643Sbenno pmap_pte_overflow++; 166483682Smp } 166590643Sbenno 166690643Sbenno *saved_pt = pvo->pvo_pte; 166790643Sbenno 166890643Sbenno pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 166983682Smp } 167090643Sbenno 167190643Sbenno pvo->pvo_pte.pte_lo |= pa; 167290643Sbenno 167390643Sbenno if (!pmap_pte_spill(pvo->pvo_vaddr)) 167490643Sbenno panic("pmap_pa_map: could not spill pvo %p", pvo); 167590643Sbenno 167690643Sbenno if (depth_p != NULL) 167790643Sbenno (*depth_p)++; 167883682Smp} 167983682Smp 168090643Sbennostatic void 168190643Sbennopmap_pa_unmap(struct pvo_entry *pvo, struct pte *saved_pt, int *depth_p) 168277957Sbenno{ 168390643Sbenno struct pte *pt; 168477957Sbenno 168590643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 168690643Sbenno 168790643Sbenno if (pt != NULL) { 168890643Sbenno pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 168990643Sbenno PVO_PTEGIDX_CLR(pvo); 169090643Sbenno pmap_pte_overflow++; 169190643Sbenno } 169290643Sbenno 169390643Sbenno pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 169490643Sbenno 169590643Sbenno /* 169690643Sbenno * If there is a saved PTE and it's valid, restore it and return. 169790643Sbenno */ 169890643Sbenno if (saved_pt != NULL && (saved_pt->pte_lo & PTE_RPGN) != 0) { 169990643Sbenno if (depth_p != NULL && --(*depth_p) == 0) 170090643Sbenno panic("pmap_pa_unmap: restoring but depth == 0"); 170190643Sbenno 170290643Sbenno pvo->pvo_pte = *saved_pt; 170390643Sbenno 170490643Sbenno if (!pmap_pte_spill(pvo->pvo_vaddr)) 170590643Sbenno panic("pmap_pa_unmap: could not spill pvo %p", pvo); 170690643Sbenno } 170777957Sbenno} 170877957Sbenno 170990643Sbennostatic void 171090643Sbennopmap_syncicache(vm_offset_t pa, vm_size_t len) 171177957Sbenno{ 171290643Sbenno __syncicache((void *)pa, len); 171390643Sbenno} 171477957Sbenno 171590643Sbennostatic void 171690643Sbennotlbia(void) 171790643Sbenno{ 171890643Sbenno caddr_t i; 171990643Sbenno 172090643Sbenno SYNC(); 172190643Sbenno for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) { 172290643Sbenno TLBIE(i); 172390643Sbenno EIEIO(); 172490643Sbenno } 172590643Sbenno TLBSYNC(); 172690643Sbenno SYNC(); 172777957Sbenno} 172877957Sbenno 172990643Sbennostatic int 173092847Sjeffpmap_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_head *pvo_head, 173190643Sbenno vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags) 173277957Sbenno{ 173390643Sbenno struct pvo_entry *pvo; 173490643Sbenno u_int sr; 173590643Sbenno int first; 173690643Sbenno u_int ptegidx; 173790643Sbenno int i; 1738103604Sgrehan int bootstrap; 173977957Sbenno 174090643Sbenno pmap_pvo_enter_calls++; 174196250Sbenno first = 0; 1742103604Sgrehan 1743103604Sgrehan bootstrap = 0; 174490643Sbenno 174590643Sbenno /* 174690643Sbenno * Compute the PTE Group index. 174790643Sbenno */ 174890643Sbenno va &= ~ADDR_POFF; 174990643Sbenno sr = va_to_sr(pm->pm_sr, va); 175090643Sbenno ptegidx = va_to_pteg(sr, va); 175190643Sbenno 175290643Sbenno /* 175390643Sbenno * Remove any existing mapping for this page. Reuse the pvo entry if 175490643Sbenno * there is a mapping. 175590643Sbenno */ 175690643Sbenno LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 175790643Sbenno if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 175896334Sbenno if ((pvo->pvo_pte.pte_lo & PTE_RPGN) == pa && 175996334Sbenno (pvo->pvo_pte.pte_lo & PTE_PP) == 176096334Sbenno (pte_lo & PTE_PP)) { 176192521Sbenno return (0); 176296334Sbenno } 176390643Sbenno pmap_pvo_remove(pvo, -1); 176490643Sbenno break; 176590643Sbenno } 176690643Sbenno } 176790643Sbenno 176890643Sbenno /* 176990643Sbenno * If we aren't overwriting a mapping, try to allocate. 177090643Sbenno */ 177192521Sbenno if (pmap_initialized) { 177292847Sjeff pvo = uma_zalloc(zone, M_NOWAIT); 177392521Sbenno } else { 177499037Sbenno if (pmap_bpvo_pool_index >= BPVO_POOL_SIZE) { 177599037Sbenno panic("pmap_enter: bpvo pool exhausted, %d, %d, %d", 177699037Sbenno pmap_bpvo_pool_index, BPVO_POOL_SIZE, 177799037Sbenno BPVO_POOL_SIZE * sizeof(struct pvo_entry)); 177892521Sbenno } 177992521Sbenno pvo = &pmap_bpvo_pool[pmap_bpvo_pool_index]; 178092521Sbenno pmap_bpvo_pool_index++; 1781103604Sgrehan bootstrap = 1; 178292521Sbenno } 178390643Sbenno 178490643Sbenno if (pvo == NULL) { 178590643Sbenno return (ENOMEM); 178690643Sbenno } 178790643Sbenno 178890643Sbenno pmap_pvo_entries++; 178990643Sbenno pvo->pvo_vaddr = va; 179090643Sbenno pvo->pvo_pmap = pm; 179190643Sbenno LIST_INSERT_HEAD(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 179290643Sbenno pvo->pvo_vaddr &= ~ADDR_POFF; 179390643Sbenno if (flags & VM_PROT_EXECUTE) 179490643Sbenno pvo->pvo_vaddr |= PVO_EXECUTABLE; 179590643Sbenno if (flags & PVO_WIRED) 179690643Sbenno pvo->pvo_vaddr |= PVO_WIRED; 179790643Sbenno if (pvo_head != &pmap_pvo_kunmanaged) 179890643Sbenno pvo->pvo_vaddr |= PVO_MANAGED; 1799103604Sgrehan if (bootstrap) 1800103604Sgrehan pvo->pvo_vaddr |= PVO_BOOTSTRAP; 180190643Sbenno pmap_pte_create(&pvo->pvo_pte, sr, va, pa | pte_lo); 180290643Sbenno 180390643Sbenno /* 180490643Sbenno * Remember if the list was empty and therefore will be the first 180590643Sbenno * item. 180690643Sbenno */ 180796250Sbenno if (LIST_FIRST(pvo_head) == NULL) 180896250Sbenno first = 1; 180990643Sbenno 181090643Sbenno LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 181190643Sbenno if (pvo->pvo_pte.pte_lo & PVO_WIRED) 181290643Sbenno pvo->pvo_pmap->pm_stats.wired_count++; 181390643Sbenno pvo->pvo_pmap->pm_stats.resident_count++; 181490643Sbenno 181590643Sbenno /* 181690643Sbenno * We hope this succeeds but it isn't required. 181790643Sbenno */ 181890643Sbenno i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 181990643Sbenno if (i >= 0) { 182090643Sbenno PVO_PTEGIDX_SET(pvo, i); 182190643Sbenno } else { 182290643Sbenno panic("pmap_pvo_enter: overflow"); 182390643Sbenno pmap_pte_overflow++; 182490643Sbenno } 182590643Sbenno 182690643Sbenno return (first ? ENOENT : 0); 182777957Sbenno} 182877957Sbenno 182990643Sbennostatic void 183090643Sbennopmap_pvo_remove(struct pvo_entry *pvo, int pteidx) 183177957Sbenno{ 183290643Sbenno struct pte *pt; 183377957Sbenno 183490643Sbenno /* 183590643Sbenno * If there is an active pte entry, we need to deactivate it (and 183690643Sbenno * save the ref & cfg bits). 183790643Sbenno */ 183890643Sbenno pt = pmap_pvo_to_pte(pvo, pteidx); 183990643Sbenno if (pt != NULL) { 184090643Sbenno pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 184190643Sbenno PVO_PTEGIDX_CLR(pvo); 184290643Sbenno } else { 184390643Sbenno pmap_pte_overflow--; 1844110172Sgrehan } 184590643Sbenno 184690643Sbenno /* 184790643Sbenno * Update our statistics. 184890643Sbenno */ 184990643Sbenno pvo->pvo_pmap->pm_stats.resident_count--; 185090643Sbenno if (pvo->pvo_pte.pte_lo & PVO_WIRED) 185190643Sbenno pvo->pvo_pmap->pm_stats.wired_count--; 185290643Sbenno 185390643Sbenno /* 185490643Sbenno * Save the REF/CHG bits into their cache if the page is managed. 185590643Sbenno */ 185690643Sbenno if (pvo->pvo_vaddr & PVO_MANAGED) { 185790643Sbenno struct vm_page *pg; 185890643Sbenno 185992067Sbenno pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo & PTE_RPGN); 186090643Sbenno if (pg != NULL) { 186190643Sbenno pmap_attr_save(pg, pvo->pvo_pte.pte_lo & 186290643Sbenno (PTE_REF | PTE_CHG)); 186390643Sbenno } 186490643Sbenno } 186590643Sbenno 186690643Sbenno /* 186790643Sbenno * Remove this PVO from the PV list. 186890643Sbenno */ 186990643Sbenno LIST_REMOVE(pvo, pvo_vlink); 187090643Sbenno 187190643Sbenno /* 187290643Sbenno * Remove this from the overflow list and return it to the pool 187390643Sbenno * if we aren't going to reuse it. 187490643Sbenno */ 187590643Sbenno LIST_REMOVE(pvo, pvo_olink); 187692521Sbenno if (!(pvo->pvo_vaddr & PVO_BOOTSTRAP)) 187792847Sjeff uma_zfree(pvo->pvo_vaddr & PVO_MANAGED ? pmap_mpvo_zone : 187892521Sbenno pmap_upvo_zone, pvo); 187990643Sbenno pmap_pvo_entries--; 188090643Sbenno pmap_pvo_remove_calls++; 188177957Sbenno} 188277957Sbenno 188390643Sbennostatic __inline int 188490643Sbennopmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 188577957Sbenno{ 188690643Sbenno int pteidx; 188777957Sbenno 188890643Sbenno /* 188990643Sbenno * We can find the actual pte entry without searching by grabbing 189090643Sbenno * the PTEG index from 3 unused bits in pte_lo[11:9] and by 189190643Sbenno * noticing the HID bit. 189290643Sbenno */ 189390643Sbenno pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 189490643Sbenno if (pvo->pvo_pte.pte_hi & PTE_HID) 189590643Sbenno pteidx ^= pmap_pteg_mask * 8; 189690643Sbenno 189790643Sbenno return (pteidx); 189877957Sbenno} 189977957Sbenno 190090643Sbennostatic struct pvo_entry * 190190643Sbennopmap_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p) 190277957Sbenno{ 190390643Sbenno struct pvo_entry *pvo; 190490643Sbenno int ptegidx; 190590643Sbenno u_int sr; 190677957Sbenno 190790643Sbenno va &= ~ADDR_POFF; 190890643Sbenno sr = va_to_sr(pm->pm_sr, va); 190990643Sbenno ptegidx = va_to_pteg(sr, va); 191090643Sbenno 191190643Sbenno LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 191290643Sbenno if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 191390643Sbenno if (pteidx_p) 191490643Sbenno *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 191590643Sbenno return (pvo); 191690643Sbenno } 191790643Sbenno } 191890643Sbenno 191990643Sbenno return (NULL); 192077957Sbenno} 192177957Sbenno 192290643Sbennostatic struct pte * 192390643Sbennopmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 192477957Sbenno{ 192590643Sbenno struct pte *pt; 192677957Sbenno 192790643Sbenno /* 192890643Sbenno * If we haven't been supplied the ptegidx, calculate it. 192990643Sbenno */ 193090643Sbenno if (pteidx == -1) { 193190643Sbenno int ptegidx; 193290643Sbenno u_int sr; 193377957Sbenno 193490643Sbenno sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr); 193590643Sbenno ptegidx = va_to_pteg(sr, pvo->pvo_vaddr); 193690643Sbenno pteidx = pmap_pvo_pte_index(pvo, ptegidx); 193790643Sbenno } 193890643Sbenno 193990643Sbenno pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 194090643Sbenno 194190643Sbenno if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 194290643Sbenno panic("pmap_pvo_to_pte: pvo %p has valid pte in pvo but no " 194390643Sbenno "valid pte index", pvo); 194490643Sbenno } 194590643Sbenno 194690643Sbenno if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 194790643Sbenno panic("pmap_pvo_to_pte: pvo %p has valid pte index in pvo " 194890643Sbenno "pvo but no valid pte", pvo); 194990643Sbenno } 195090643Sbenno 195190643Sbenno if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 195290643Sbenno if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 195390643Sbenno panic("pmap_pvo_to_pte: pvo %p has valid pte in " 195490643Sbenno "pmap_pteg_table %p but invalid in pvo", pvo, pt); 195577957Sbenno } 195690643Sbenno 195790643Sbenno if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) 195890643Sbenno != 0) { 195990643Sbenno panic("pmap_pvo_to_pte: pvo %p pte does not match " 196090643Sbenno "pte %p in pmap_pteg_table", pvo, pt); 196190643Sbenno } 196290643Sbenno 196390643Sbenno return (pt); 196477957Sbenno } 196577957Sbenno 196690643Sbenno if (pvo->pvo_pte.pte_hi & PTE_VALID) { 196790643Sbenno panic("pmap_pvo_to_pte: pvo %p has invalid pte %p in " 196890643Sbenno "pmap_pteg_table but valid in pvo", pvo, pt); 196990643Sbenno } 197077957Sbenno 197190643Sbenno return (NULL); 197277957Sbenno} 197378880Sbenno 197492654Sjeffstatic void * 197592654Sjeffpmap_pvo_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 197692654Sjeff{ 1977118100Salc static vm_pindex_t color; 197892654Sjeff vm_page_t m; 197992654Sjeff 198092654Sjeff if (bytes != PAGE_SIZE) 198192654Sjeff panic("pmap_pvo_allocf: benno was shortsighted. hit him."); 198292654Sjeff 198392654Sjeff *flags = UMA_SLAB_PRIV; 1984118100Salc /* 1985118100Salc * The color is only a hint. Thus, a data race in the read- 1986118100Salc * modify-write operation below isn't a catastrophe. 1987118100Salc */ 1988118100Salc m = vm_page_alloc(NULL, color++, VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM); 198992654Sjeff if (m == NULL) 199092654Sjeff return (NULL); 199192654Sjeff return ((void *)VM_PAGE_TO_PHYS(m)); 199292654Sjeff} 199392654Sjeff 199478880Sbenno/* 199590643Sbenno * XXX: THIS STUFF SHOULD BE IN pte.c? 199678880Sbenno */ 199790643Sbennoint 199890643Sbennopmap_pte_spill(vm_offset_t addr) 199978880Sbenno{ 200090643Sbenno struct pvo_entry *source_pvo, *victim_pvo; 200190643Sbenno struct pvo_entry *pvo; 200290643Sbenno int ptegidx, i, j; 200390643Sbenno u_int sr; 200490643Sbenno struct pteg *pteg; 200590643Sbenno struct pte *pt; 200678880Sbenno 200790643Sbenno pmap_pte_spills++; 200890643Sbenno 200994836Sbenno sr = mfsrin(addr); 201090643Sbenno ptegidx = va_to_pteg(sr, addr); 201190643Sbenno 201278880Sbenno /* 201390643Sbenno * Have to substitute some entry. Use the primary hash for this. 201490643Sbenno * Use low bits of timebase as random generator. 201578880Sbenno */ 201690643Sbenno pteg = &pmap_pteg_table[ptegidx]; 201790643Sbenno __asm __volatile("mftb %0" : "=r"(i)); 201890643Sbenno i &= 7; 201990643Sbenno pt = &pteg->pt[i]; 202078880Sbenno 202190643Sbenno source_pvo = NULL; 202290643Sbenno victim_pvo = NULL; 202390643Sbenno LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 202478880Sbenno /* 202590643Sbenno * We need to find a pvo entry for this address. 202678880Sbenno */ 202790643Sbenno PMAP_PVO_CHECK(pvo); 202890643Sbenno if (source_pvo == NULL && 202990643Sbenno pmap_pte_match(&pvo->pvo_pte, sr, addr, 203090643Sbenno pvo->pvo_pte.pte_hi & PTE_HID)) { 203190643Sbenno /* 203290643Sbenno * Now found an entry to be spilled into the pteg. 203390643Sbenno * The PTE is now valid, so we know it's active. 203490643Sbenno */ 203590643Sbenno j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 203678880Sbenno 203790643Sbenno if (j >= 0) { 203890643Sbenno PVO_PTEGIDX_SET(pvo, j); 203990643Sbenno pmap_pte_overflow--; 204090643Sbenno PMAP_PVO_CHECK(pvo); 204190643Sbenno return (1); 204290643Sbenno } 204390643Sbenno 204490643Sbenno source_pvo = pvo; 204590643Sbenno 204690643Sbenno if (victim_pvo != NULL) 204790643Sbenno break; 204890643Sbenno } 204990643Sbenno 205078880Sbenno /* 205190643Sbenno * We also need the pvo entry of the victim we are replacing 205290643Sbenno * so save the R & C bits of the PTE. 205378880Sbenno */ 205490643Sbenno if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 205590643Sbenno pmap_pte_compare(pt, &pvo->pvo_pte)) { 205690643Sbenno victim_pvo = pvo; 205790643Sbenno if (source_pvo != NULL) 205890643Sbenno break; 205990643Sbenno } 206090643Sbenno } 206178880Sbenno 206290643Sbenno if (source_pvo == NULL) 206390643Sbenno return (0); 206490643Sbenno 206590643Sbenno if (victim_pvo == NULL) { 206690643Sbenno if ((pt->pte_hi & PTE_HID) == 0) 206790643Sbenno panic("pmap_pte_spill: victim p-pte (%p) has no pvo" 206890643Sbenno "entry", pt); 206990643Sbenno 207078880Sbenno /* 207190643Sbenno * If this is a secondary PTE, we need to search it's primary 207290643Sbenno * pvo bucket for the matching PVO. 207378880Sbenno */ 207490643Sbenno LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx ^ pmap_pteg_mask], 207590643Sbenno pvo_olink) { 207690643Sbenno PMAP_PVO_CHECK(pvo); 207790643Sbenno /* 207890643Sbenno * We also need the pvo entry of the victim we are 207990643Sbenno * replacing so save the R & C bits of the PTE. 208090643Sbenno */ 208190643Sbenno if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 208290643Sbenno victim_pvo = pvo; 208390643Sbenno break; 208490643Sbenno } 208590643Sbenno } 208678880Sbenno 208790643Sbenno if (victim_pvo == NULL) 208890643Sbenno panic("pmap_pte_spill: victim s-pte (%p) has no pvo" 208990643Sbenno "entry", pt); 209090643Sbenno } 209178880Sbenno 209290643Sbenno /* 209390643Sbenno * We are invalidating the TLB entry for the EA we are replacing even 209490643Sbenno * though it's valid. If we don't, we lose any ref/chg bit changes 209590643Sbenno * contained in the TLB entry. 209690643Sbenno */ 209790643Sbenno source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 209878880Sbenno 209990643Sbenno pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 210090643Sbenno pmap_pte_set(pt, &source_pvo->pvo_pte); 210190643Sbenno 210290643Sbenno PVO_PTEGIDX_CLR(victim_pvo); 210390643Sbenno PVO_PTEGIDX_SET(source_pvo, i); 210490643Sbenno pmap_pte_replacements++; 210590643Sbenno 210690643Sbenno PMAP_PVO_CHECK(victim_pvo); 210790643Sbenno PMAP_PVO_CHECK(source_pvo); 210890643Sbenno 210990643Sbenno return (1); 211090643Sbenno} 211190643Sbenno 211290643Sbennostatic int 211390643Sbennopmap_pte_insert(u_int ptegidx, struct pte *pvo_pt) 211490643Sbenno{ 211590643Sbenno struct pte *pt; 211690643Sbenno int i; 211790643Sbenno 211890643Sbenno /* 211990643Sbenno * First try primary hash. 212090643Sbenno */ 212190643Sbenno for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 212290643Sbenno if ((pt->pte_hi & PTE_VALID) == 0) { 212390643Sbenno pvo_pt->pte_hi &= ~PTE_HID; 212490643Sbenno pmap_pte_set(pt, pvo_pt); 212590643Sbenno return (i); 212678880Sbenno } 212790643Sbenno } 212878880Sbenno 212990643Sbenno /* 213090643Sbenno * Now try secondary hash. 213190643Sbenno */ 213290643Sbenno ptegidx ^= pmap_pteg_mask; 213390643Sbenno ptegidx++; 213490643Sbenno for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 213590643Sbenno if ((pt->pte_hi & PTE_VALID) == 0) { 213690643Sbenno pvo_pt->pte_hi |= PTE_HID; 213790643Sbenno pmap_pte_set(pt, pvo_pt); 213890643Sbenno return (i); 213990643Sbenno } 214090643Sbenno } 214178880Sbenno 214290643Sbenno panic("pmap_pte_insert: overflow"); 214390643Sbenno return (-1); 214478880Sbenno} 214584921Sbenno 214690643Sbennostatic boolean_t 214790643Sbennopmap_query_bit(vm_page_t m, int ptebit) 214884921Sbenno{ 214990643Sbenno struct pvo_entry *pvo; 215090643Sbenno struct pte *pt; 215184921Sbenno 215290643Sbenno if (pmap_attr_fetch(m) & ptebit) 215390643Sbenno return (TRUE); 215484921Sbenno 215590643Sbenno LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 215690643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 215784921Sbenno 215890643Sbenno /* 215990643Sbenno * See if we saved the bit off. If so, cache it and return 216090643Sbenno * success. 216190643Sbenno */ 216290643Sbenno if (pvo->pvo_pte.pte_lo & ptebit) { 216390643Sbenno pmap_attr_save(m, ptebit); 216490643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 216590643Sbenno return (TRUE); 216690643Sbenno } 216790643Sbenno } 216884921Sbenno 216990643Sbenno /* 217090643Sbenno * No luck, now go through the hard part of looking at the PTEs 217190643Sbenno * themselves. Sync so that any pending REF/CHG bits are flushed to 217290643Sbenno * the PTEs. 217390643Sbenno */ 217490643Sbenno SYNC(); 217590643Sbenno LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 217690643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 217790643Sbenno 217890643Sbenno /* 217990643Sbenno * See if this pvo has a valid PTE. if so, fetch the 218090643Sbenno * REF/CHG bits from the valid PTE. If the appropriate 218190643Sbenno * ptebit is set, cache it and return success. 218290643Sbenno */ 218390643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 218490643Sbenno if (pt != NULL) { 218590643Sbenno pmap_pte_synch(pt, &pvo->pvo_pte); 218690643Sbenno if (pvo->pvo_pte.pte_lo & ptebit) { 218790643Sbenno pmap_attr_save(m, ptebit); 218890643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 218990643Sbenno return (TRUE); 219090643Sbenno } 219190643Sbenno } 219284921Sbenno } 219384921Sbenno 219490643Sbenno return (TRUE); 219584921Sbenno} 219690643Sbenno 2197110172Sgrehanstatic u_int 2198110172Sgrehanpmap_clear_bit(vm_page_t m, int ptebit, int *origbit) 219990643Sbenno{ 2200110172Sgrehan u_int count; 220190643Sbenno struct pvo_entry *pvo; 220290643Sbenno struct pte *pt; 220390643Sbenno int rv; 220490643Sbenno 220590643Sbenno /* 220690643Sbenno * Clear the cached value. 220790643Sbenno */ 220890643Sbenno rv = pmap_attr_fetch(m); 220990643Sbenno pmap_attr_clear(m, ptebit); 221090643Sbenno 221190643Sbenno /* 221290643Sbenno * Sync so that any pending REF/CHG bits are flushed to the PTEs (so 221390643Sbenno * we can reset the right ones). note that since the pvo entries and 221490643Sbenno * list heads are accessed via BAT0 and are never placed in the page 221590643Sbenno * table, we don't have to worry about further accesses setting the 221690643Sbenno * REF/CHG bits. 221790643Sbenno */ 221890643Sbenno SYNC(); 221990643Sbenno 222090643Sbenno /* 222190643Sbenno * For each pvo entry, clear the pvo's ptebit. If this pvo has a 222290643Sbenno * valid pte clear the ptebit from the valid pte. 222390643Sbenno */ 2224110172Sgrehan count = 0; 222590643Sbenno LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 222690643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 222790643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 222890643Sbenno if (pt != NULL) { 222990643Sbenno pmap_pte_synch(pt, &pvo->pvo_pte); 2230110172Sgrehan if (pvo->pvo_pte.pte_lo & ptebit) { 2231110172Sgrehan count++; 223290643Sbenno pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2233110172Sgrehan } 223490643Sbenno } 223590643Sbenno rv |= pvo->pvo_pte.pte_lo; 223690643Sbenno pvo->pvo_pte.pte_lo &= ~ptebit; 223790643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 223890643Sbenno } 223990643Sbenno 2240110172Sgrehan if (origbit != NULL) { 2241110172Sgrehan *origbit = rv; 2242110172Sgrehan } 2243110172Sgrehan 2244110172Sgrehan return (count); 224590643Sbenno} 224699038Sbenno 224799038Sbenno/* 2248103604Sgrehan * Return true if the physical range is encompassed by the battable[idx] 2249103604Sgrehan */ 2250103604Sgrehanstatic int 2251103604Sgrehanpmap_bat_mapped(int idx, vm_offset_t pa, vm_size_t size) 2252103604Sgrehan{ 2253103604Sgrehan u_int prot; 2254103604Sgrehan u_int32_t start; 2255103604Sgrehan u_int32_t end; 2256103604Sgrehan u_int32_t bat_ble; 2257103604Sgrehan 2258103604Sgrehan /* 2259103604Sgrehan * Return immediately if not a valid mapping 2260103604Sgrehan */ 2261103604Sgrehan if (!battable[idx].batu & BAT_Vs) 2262103604Sgrehan return (EINVAL); 2263103604Sgrehan 2264103604Sgrehan /* 2265103604Sgrehan * The BAT entry must be cache-inhibited, guarded, and r/w 2266103604Sgrehan * so it can function as an i/o page 2267103604Sgrehan */ 2268103604Sgrehan prot = battable[idx].batl & (BAT_I|BAT_G|BAT_PP_RW); 2269103604Sgrehan if (prot != (BAT_I|BAT_G|BAT_PP_RW)) 2270103604Sgrehan return (EPERM); 2271103604Sgrehan 2272103604Sgrehan /* 2273103604Sgrehan * The address should be within the BAT range. Assume that the 2274103604Sgrehan * start address in the BAT has the correct alignment (thus 2275103604Sgrehan * not requiring masking) 2276103604Sgrehan */ 2277103604Sgrehan start = battable[idx].batl & BAT_PBS; 2278103604Sgrehan bat_ble = (battable[idx].batu & ~(BAT_EBS)) | 0x03; 2279103604Sgrehan end = start | (bat_ble << 15) | 0x7fff; 2280103604Sgrehan 2281103604Sgrehan if ((pa < start) || ((pa + size) > end)) 2282103604Sgrehan return (ERANGE); 2283103604Sgrehan 2284103604Sgrehan return (0); 2285103604Sgrehan} 2286103604Sgrehan 2287103604Sgrehan 2288103604Sgrehan/* 228999038Sbenno * Map a set of physical memory pages into the kernel virtual 229099038Sbenno * address space. Return a pointer to where it is mapped. This 229199038Sbenno * routine is intended to be used for mapping device memory, 229299038Sbenno * NOT real memory. 229399038Sbenno */ 229499038Sbennovoid * 229599038Sbennopmap_mapdev(vm_offset_t pa, vm_size_t size) 229699038Sbenno{ 2297103604Sgrehan vm_offset_t va, tmpva, ppa, offset; 2298103604Sgrehan int i; 2299103604Sgrehan 2300103604Sgrehan ppa = trunc_page(pa); 230199038Sbenno offset = pa & PAGE_MASK; 230299038Sbenno size = roundup(offset + size, PAGE_SIZE); 230399038Sbenno 230499038Sbenno GIANT_REQUIRED; 230599038Sbenno 2306103604Sgrehan /* 2307103604Sgrehan * If the physical address lies within a valid BAT table entry, 2308103604Sgrehan * return the 1:1 mapping. This currently doesn't work 2309103604Sgrehan * for regions that overlap 256M BAT segments. 2310103604Sgrehan */ 2311103604Sgrehan for (i = 0; i < 16; i++) { 2312103604Sgrehan if (pmap_bat_mapped(i, pa, size) == 0) 2313103604Sgrehan return ((void *) pa); 2314103604Sgrehan } 2315103604Sgrehan 231699038Sbenno va = kmem_alloc_pageable(kernel_map, size); 231799038Sbenno if (!va) 231899038Sbenno panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 231999038Sbenno 232099038Sbenno for (tmpva = va; size > 0;) { 2321103604Sgrehan pmap_kenter(tmpva, ppa); 232299038Sbenno TLBIE(tmpva); /* XXX or should it be invalidate-all ? */ 232399038Sbenno size -= PAGE_SIZE; 232499038Sbenno tmpva += PAGE_SIZE; 2325103604Sgrehan ppa += PAGE_SIZE; 232699038Sbenno } 232799038Sbenno 232899038Sbenno return ((void *)(va + offset)); 232999038Sbenno} 233099038Sbenno 233199038Sbennovoid 233299038Sbennopmap_unmapdev(vm_offset_t va, vm_size_t size) 233399038Sbenno{ 233499038Sbenno vm_offset_t base, offset; 233599038Sbenno 2336103604Sgrehan /* 2337103604Sgrehan * If this is outside kernel virtual space, then it's a 2338103604Sgrehan * battable entry and doesn't require unmapping 2339103604Sgrehan */ 2340103604Sgrehan if ((va >= VM_MIN_KERNEL_ADDRESS) && (va <= VM_MAX_KERNEL_ADDRESS)) { 2341103604Sgrehan base = trunc_page(va); 2342103604Sgrehan offset = va & PAGE_MASK; 2343103604Sgrehan size = roundup(offset + size, PAGE_SIZE); 2344103604Sgrehan kmem_free(kernel_map, base, size); 2345103604Sgrehan } 234699038Sbenno} 2347