1219820Sjeff/* 2219820Sjeff * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 3272407Shselasky * Copyright (c) 2007, 2008, 2014 Mellanox Technologies. All rights reserved. 4219820Sjeff * 5219820Sjeff * This software is available to you under a choice of one of two 6219820Sjeff * licenses. You may choose to be licensed under the terms of the GNU 7219820Sjeff * General Public License (GPL) Version 2, available from the file 8219820Sjeff * COPYING in the main directory of this source tree, or the 9219820Sjeff * OpenIB.org BSD license below: 10219820Sjeff * 11219820Sjeff * Redistribution and use in source and binary forms, with or 12219820Sjeff * without modification, are permitted provided that the following 13219820Sjeff * conditions are met: 14219820Sjeff * 15219820Sjeff * - Redistributions of source code must retain the above 16219820Sjeff * copyright notice, this list of conditions and the following 17219820Sjeff * disclaimer. 18219820Sjeff * 19219820Sjeff * - Redistributions in binary form must reproduce the above 20219820Sjeff * copyright notice, this list of conditions and the following 21219820Sjeff * disclaimer in the documentation and/or other materials 22219820Sjeff * provided with the distribution. 23219820Sjeff * 24219820Sjeff * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25219820Sjeff * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26219820Sjeff * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27219820Sjeff * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28219820Sjeff * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29219820Sjeff * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30219820Sjeff * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31219820Sjeff * SOFTWARE. 32219820Sjeff */ 33219820Sjeff 34219820Sjeff#include <linux/errno.h> 35219820Sjeff#include <linux/pci.h> 36219820Sjeff#include <linux/delay.h> 37219820Sjeff#include <linux/slab.h> 38219820Sjeff#include <linux/jiffies.h> 39219820Sjeff 40219820Sjeff#include "mlx4.h" 41219820Sjeff 42219820Sjeffint mlx4_reset(struct mlx4_dev *dev) 43219820Sjeff{ 44219820Sjeff void __iomem *reset; 45219820Sjeff u32 *hca_header = NULL; 46219820Sjeff int pcie_cap; 47219820Sjeff u16 devctl; 48219820Sjeff u16 linkctl; 49219820Sjeff u16 vendor; 50219820Sjeff unsigned long end; 51219820Sjeff u32 sem; 52219820Sjeff int i; 53219820Sjeff int err = 0; 54219820Sjeff 55219820Sjeff#define MLX4_RESET_BASE 0xf0000 56219820Sjeff#define MLX4_RESET_SIZE 0x400 57219820Sjeff#define MLX4_SEM_OFFSET 0x3fc 58219820Sjeff#define MLX4_RESET_OFFSET 0x10 59219820Sjeff#define MLX4_RESET_VALUE swab32(1) 60219820Sjeff 61219820Sjeff#define MLX4_SEM_TIMEOUT_JIFFIES (10 * HZ) 62219820Sjeff#define MLX4_RESET_TIMEOUT_JIFFIES (2 * HZ) 63219820Sjeff 64219820Sjeff /* 65219820Sjeff * Reset the chip. This is somewhat ugly because we have to 66219820Sjeff * save off the PCI header before reset and then restore it 67219820Sjeff * after the chip reboots. We skip config space offsets 22 68219820Sjeff * and 23 since those have a special meaning. 69219820Sjeff */ 70219820Sjeff 71219820Sjeff /* Do we need to save off the full 4K PCI Express header?? */ 72219820Sjeff hca_header = kmalloc(256, GFP_KERNEL); 73219820Sjeff if (!hca_header) { 74219820Sjeff err = -ENOMEM; 75219820Sjeff mlx4_err(dev, "Couldn't allocate memory to save HCA " 76219820Sjeff "PCI header, aborting.\n"); 77219820Sjeff goto out; 78219820Sjeff } 79219820Sjeff 80272407Shselasky pcie_cap = pci_pcie_cap(dev->pdev); 81219820Sjeff 82219820Sjeff for (i = 0; i < 64; ++i) { 83219820Sjeff if (i == 22 || i == 23) 84219820Sjeff continue; 85219820Sjeff if (pci_read_config_dword(dev->pdev, i * 4, hca_header + i)) { 86219820Sjeff err = -ENODEV; 87219820Sjeff mlx4_err(dev, "Couldn't save HCA " 88219820Sjeff "PCI header, aborting.\n"); 89219820Sjeff goto out; 90219820Sjeff } 91219820Sjeff } 92219820Sjeff 93219820Sjeff reset = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_RESET_BASE, 94219820Sjeff MLX4_RESET_SIZE); 95219820Sjeff if (!reset) { 96219820Sjeff err = -ENOMEM; 97219820Sjeff mlx4_err(dev, "Couldn't map HCA reset register, aborting.\n"); 98219820Sjeff goto out; 99219820Sjeff } 100219820Sjeff 101219820Sjeff /* grab HW semaphore to lock out flash updates */ 102219820Sjeff end = jiffies + MLX4_SEM_TIMEOUT_JIFFIES; 103219820Sjeff do { 104219820Sjeff sem = readl(reset + MLX4_SEM_OFFSET); 105219820Sjeff if (!sem) 106219820Sjeff break; 107219820Sjeff 108219820Sjeff msleep(1); 109219820Sjeff } while (time_before(jiffies, end)); 110219820Sjeff 111219820Sjeff if (sem) { 112219820Sjeff mlx4_err(dev, "Failed to obtain HW semaphore, aborting\n"); 113219820Sjeff err = -EAGAIN; 114219820Sjeff iounmap(reset); 115219820Sjeff goto out; 116219820Sjeff } 117219820Sjeff 118219820Sjeff /* actually hit reset */ 119219820Sjeff writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET); 120219820Sjeff iounmap(reset); 121219820Sjeff 122272407Shselasky /* wait half a second before accessing device */ 123272407Shselasky msleep(500); 124219820Sjeff 125219820Sjeff end = jiffies + MLX4_RESET_TIMEOUT_JIFFIES; 126219820Sjeff do { 127219820Sjeff if (!pci_read_config_word(dev->pdev, PCI_VENDOR_ID, &vendor) && 128219820Sjeff vendor != 0xffff) 129219820Sjeff break; 130219820Sjeff 131219820Sjeff msleep(1); 132219820Sjeff } while (time_before(jiffies, end)); 133219820Sjeff 134219820Sjeff if (vendor == 0xffff) { 135219820Sjeff err = -ENODEV; 136219820Sjeff mlx4_err(dev, "PCI device did not come back after reset, " 137219820Sjeff "aborting.\n"); 138219820Sjeff goto out; 139219820Sjeff } 140219820Sjeff 141219820Sjeff /* Now restore the PCI headers */ 142219820Sjeff if (pcie_cap) { 143219820Sjeff devctl = hca_header[(pcie_cap + PCI_EXP_DEVCTL) / 4]; 144272407Shselasky if (pcie_capability_write_word(dev->pdev, PCI_EXP_DEVCTL, 145255932Salfred devctl)) { 146219820Sjeff err = -ENODEV; 147219820Sjeff mlx4_err(dev, "Couldn't restore HCA PCI Express " 148219820Sjeff "Device Control register, aborting.\n"); 149219820Sjeff goto out; 150219820Sjeff } 151219820Sjeff linkctl = hca_header[(pcie_cap + PCI_EXP_LNKCTL) / 4]; 152272407Shselasky if (pcie_capability_write_word(dev->pdev, PCI_EXP_LNKCTL, 153255932Salfred linkctl)) { 154219820Sjeff err = -ENODEV; 155219820Sjeff mlx4_err(dev, "Couldn't restore HCA PCI Express " 156219820Sjeff "Link control register, aborting.\n"); 157219820Sjeff goto out; 158219820Sjeff } 159219820Sjeff } 160219820Sjeff 161219820Sjeff for (i = 0; i < 16; ++i) { 162219820Sjeff if (i * 4 == PCI_COMMAND) 163219820Sjeff continue; 164219820Sjeff 165219820Sjeff if (pci_write_config_dword(dev->pdev, i * 4, hca_header[i])) { 166219820Sjeff err = -ENODEV; 167219820Sjeff mlx4_err(dev, "Couldn't restore HCA reg %x, " 168219820Sjeff "aborting.\n", i); 169219820Sjeff goto out; 170219820Sjeff } 171219820Sjeff } 172219820Sjeff 173219820Sjeff if (pci_write_config_dword(dev->pdev, PCI_COMMAND, 174219820Sjeff hca_header[PCI_COMMAND / 4])) { 175219820Sjeff err = -ENODEV; 176219820Sjeff mlx4_err(dev, "Couldn't restore HCA COMMAND, " 177219820Sjeff "aborting.\n"); 178219820Sjeff goto out; 179219820Sjeff } 180219820Sjeff 181219820Sjeffout: 182219820Sjeff kfree(hca_header); 183219820Sjeff 184219820Sjeff return err; 185219820Sjeff} 186